Radiofrequency signal power amplification method and device
    1.
    发明授权
    Radiofrequency signal power amplification method and device 有权
    射频信号功率放大方法及装置

    公开(公告)号:US08242845B2

    公开(公告)日:2012-08-14

    申请号:US12841803

    申请日:2010-07-22

    IPC分类号: H03G3/10

    摘要: A radiofrequency signal power amplification circuit may include a signal input for receiving the radiofrequency signal, an amplification stage coupled to the signal input and having at least one power transistor, a biasing stage for delivering a bias voltage to the amplification stage, and a processing stage. The processing stage may include a processing input coupled to the signal input, a processing output for delivering a bias current modulated at least in amplitude to the biasing stage, and an amplitude modulator coupled between the processing input and the processing output and configured to determine an envelope signal representative of the envelope of the radiofrequency signal, for modulating the amplitude of the envelope signal based on a variable voltage setpoint and for generating the amplitude-modulated bias current based on the modulated envelope signal.

    摘要翻译: 射频信号功率放大电路可以包括用于接收射频信号的信号输入,耦合到信号输入并具有至少一个功率晶体管的放大级,用于将偏置电压传送到放大级的偏置级,以及处理级 。 处理阶段可以包括耦合到信号输入的处理输入,用于将至少以幅度调制的偏置电流传送到偏置级的处理输出以及耦合在处理输入和处理输出之间的幅度调制器,并被配置为确定 信号代表射频信号的包络线,用于基于可变电压设定点调制包络信号的幅度,并且用于基于经调制的包络信号产生幅度调制的偏置电流。

    RADIOFREQUENCY SIGNAL POWER AMPLIFICATION METHOD AND DEVICE
    2.
    发明申请
    RADIOFREQUENCY SIGNAL POWER AMPLIFICATION METHOD AND DEVICE 有权
    无线电信号功率放大方法和装置

    公开(公告)号:US20110018637A1

    公开(公告)日:2011-01-27

    申请号:US12841803

    申请日:2010-07-22

    IPC分类号: H03G3/30 H03F3/04

    摘要: A radiofrequency signal power amplification circuit may include a signal input for receiving the radiofrequency signal, an amplification stage coupled to the signal input and having at least one power transistor, a biasing stage for delivering a bias voltage to the amplification stage, and a processing stage. The processing stage may include a processing input coupled to the signal input, a processing output for delivering a bias current modulated at least in amplitude to the biasing stage, and an amplitude modulator coupled between the processing input and the processing output and configured to determine an envelope signal representative of the envelope of the radiofrequency signal, for modulating the amplitude of the envelope signal based on a variable voltage setpoint and for generating the amplitude-modulated bias current based on the modulated envelope signal.

    摘要翻译: 射频信号功率放大电路可以包括用于接收射频信号的信号输入,耦合到信号输入并具有至少一个功率晶体管的放大级,用于将偏置电压传送到放大级的偏置级,以及处理级 。 处理阶段可以包括耦合到信号输入的处理输入,用于将至少以幅度调制的偏置电流传送到偏置级的处理输出以及耦合在处理输入和处理输出之间的幅度调制器,并被配置为确定 信号代表射频信号的包络线,用于基于可变电压设定点调制包络信号的幅度,并且用于基于经调制的包络信号产生幅度调制的偏置电流。

    BULK ACOUSTIC WAVE RESONATOR FILTER BEING DIGITALLY RECONFIGURABLE, WITH PROCESS
    4.
    发明申请
    BULK ACOUSTIC WAVE RESONATOR FILTER BEING DIGITALLY RECONFIGURABLE, WITH PROCESS 有权
    大容量波形谐振器滤波器数字可重新配置,具有过程

    公开(公告)号:US20090251235A1

    公开(公告)日:2009-10-08

    申请号:US12371415

    申请日:2009-02-13

    IPC分类号: H03H9/02

    CPC分类号: H03H9/605 H03H9/542

    摘要: A filtering circuit with BAW type acoustic resonators having at least a first quadripole and a second quadripole connected in cascade, each quadripole having a branch series with a first acoustic resonator of type BAW and a branch parallel with each branch having an acoustic resonator of type BAW, the first acoustic resonator having a frequency of resonance series approximately equal to the frequency of parallel resonance of the second acoustic resonator, the branch parallel of the first quadripole having a first capacitance connected in series with the second resonator and, in parallel with the capacitance, a first switching transistor to short circuit the capacitance.

    摘要翻译: 具有至少具有级联连接的第一四极和第二四极的BAW型声谐振器的滤波电路,每个四极具有与BAW类型的第一声谐振器的分支系列和与具有BAW型声谐振器的每个分支并联的分支 所述第一声谐振器具有大致等于所述第二声谐振器的并联谐振频率的共振频率,所述第一四极杆的分支并联具有与所述第二谐振器串联连接的第一电容器,并且与所述电容器 第一个开关晶体管使电容短路。

    Bulk acoustic wave resonator filter being digitally reconfigurable, with process
    6.
    发明授权
    Bulk acoustic wave resonator filter being digitally reconfigurable, with process 有权
    具有数字可重构的体声波谐振器滤波器,具有过程

    公开(公告)号:US08665038B2

    公开(公告)日:2014-03-04

    申请号:US12371415

    申请日:2009-02-13

    IPC分类号: H03H9/54 H04B1/10 H04B1/40

    CPC分类号: H03H9/605 H03H9/542

    摘要: A filtering circuit with BAW type acoustic resonators having at least a first quadripole and a second quadripole connected in cascade, each quadripole having a branch series with a first acoustic resonator of type BAW and a branch parallel with each branch having an acoustic resonator of type BAW, the first acoustic resonator having a frequency of resonance series approximately equal to the frequency of parallel resonance of the second acoustic resonator, the branch parallel of the first quadripole having a first capacitance connected in series with the second resonator and, in parallel with the capacitance, a first switching transistor to short circuit the capacitance.

    摘要翻译: 具有至少具有级联连接的第一四极和第二四极的BAW型声谐振器的滤波电路,每个四极具有与BAW类型的第一声谐振器的分支系列和与具有BAW型声谐振器的每个分支并联的分支 所述第一声谐振器具有大致等于所述第二声谐振器的并联谐振频率的共振频率,所述第一四极杆的分支并联具有与所述第二谐振器串联连接的第一电容器,并且与所述电容器 第一个开关晶体管使电容短路。

    PLL-based frequency synthesizer
    9.
    发明申请
    PLL-based frequency synthesizer 审中-公开
    基于PLL的频率合成器

    公开(公告)号:US20060139109A1

    公开(公告)日:2006-06-29

    申请号:US11235787

    申请日:2005-09-27

    IPC分类号: H03L7/00

    摘要: The frequency synthesizer includes a phase-locked loop (PLL). The PLL includes an oscillator controlled to deliver an output signal at a predefined output frequency, a variable frequency divider to convert the output signal into a divided-frequency signal, a phase comparator to produce a signal measuring a phase difference between the divided-frequency signal and a reference signal at a reference frequency, and a loop filter to control the oscillator on the basis of the measurement signal. To increase the speed of convergence of the synthesizer if the set point is changed, the loop filter of the PLL is a fractional, i.e. non-integer, order low-pass filter.

    摘要翻译: 频率合成器包括锁相环(PLL)。 PLL包括被控制以以预定的输出频率传送输出信号的振荡器,用于将输出信号转换成分频信号的可变分频器,相位比较器,以产生测量分频信号之间的相位差的信号 以及参考频率的参考信号,以及环路滤波器,用于根据测量信号控制振荡器。 为了增加合成器的收敛速度,如果设定点改变,PLL的环路滤波器是分数即非整数阶低通滤波器。

    Device and method for generating a signal of parametrizable frequency
    10.
    发明授权
    Device and method for generating a signal of parametrizable frequency 有权
    用于产生可参数频率信号的装置和方法

    公开(公告)号:US08502574B2

    公开(公告)日:2013-08-06

    申请号:US13229478

    申请日:2011-09-09

    IPC分类号: H03L7/06

    摘要: Device for generating a signal of parametrizable frequency comprising a phase locked loop including a generator of a reference signal, a phase-frequency comparator comprising a first input for receiving the reference signal, an oscillator controlled on the basis of the result output by the phase-frequency comparator, a fractional divider coupled between an output of the oscillator and a second input of the phase-frequency comparator, and a selector selectively linking an input of the oscillator either with an input of the generator, or with the output of the oscillator as a function of the multiplication ratio of the fractional divider.

    摘要翻译: 用于生成包括参考信号的发生器的锁相环的参数化频率信号的装置,包括用于接收参考信号的第一输入的相位 - 频率比较器,基于由相位信号输出的结果输出的振荡器, 频率比较器,耦合在振荡器的输出和相位 - 频率比较器的第二输入端之间的分数分频器,以及选择器,选择性地将振荡器的输入与发生器的输入或振荡器的输出相连, 分数分频器的倍率的函数。