Pen
    482.
    外观设计
    Pen 有权

    公开(公告)号:USD659757S1

    公开(公告)日:2012-05-15

    申请号:US29387241

    申请日:2011-03-10

    Applicant: Bin Li

    Designer: Bin Li

    Pyrazolyl Acrylonitrile Compounds and Uses Thereof
    483.
    发明申请
    Pyrazolyl Acrylonitrile Compounds and Uses Thereof 有权
    吡唑基丙烯腈化合物及其用途

    公开(公告)号:US20120035236A1

    公开(公告)日:2012-02-09

    申请号:US13265010

    申请日:2010-04-27

    CPC classification number: C07D231/12 A01N43/56 A01N53/00 C07D231/14 C07D231/16

    Abstract: A kind of pyrazolyl acrylniitrile compounds represented by the structures of formula I or stereoisomers thereof are disclosed in the present invention. Where in: R1 is selected from the group of substituents consisting of H, C1-C4 alkoxy C1-C2 alkyl, C3-C5 alkenyloxy C1-C2 alkyl, C3-C5 alknyloxy C1-C2 alkyl, C1-C4 alkylthio C1-C2 alkyl, C1-C5 alkyl carbonyl, C3-C8 cycloalkyl carbonyl, C1-C5 alkoxy carbonyl or C1-C5 alkylthio carbonyl; R2 is Cl or methyl; R3 is H, methyl, CN, NO2 or halogen. Or its stereoisomers. The Formula I compounds have high insecticidal activities or acaricidal activities, so they can be used as insecticide or acaricide.

    Abstract translation: 在本发明中公开了一种由式I结构或其立体异构体表示的吡唑基丙烯腈化合物。 其中:R1选自H,C1-C4烷氧基C1-C2烷基,C3-C5烯氧基C1-C2烷基,C3-C5烷氧基C1-C2烷基,C1-C4烷硫基C1-C2烷基 ,C 1 -C 5烷基羰基,C 3 -C 8环烷基羰基,C 1 -C 5烷氧基羰基或C 1 -C 5烷硫基羰基; R2是Cl或甲基; R3是H,甲基,CN,NO2或卤素。 或其立体异构体。 式I化合物具有高杀虫活性或杀螨活性,因此可用作杀虫剂或杀螨剂。

    Pen
    484.
    外观设计
    Pen 有权

    公开(公告)号:USD648791S1

    公开(公告)日:2011-11-15

    申请号:US29382823

    申请日:2011-01-07

    Applicant: Bin Li

    Designer: Bin Li

    Write circuit for providing distinctive write currents to a chalcogenide memory cell
    485.
    发明授权
    Write circuit for providing distinctive write currents to a chalcogenide memory cell 有权
    写入电路,为硫族化物存储单元提供独特的写入电流

    公开(公告)号:US08027191B2

    公开(公告)日:2011-09-27

    申请号:US12531849

    申请日:2008-12-01

    CPC classification number: G11C16/10 G11C13/0004 G11C13/0069

    Abstract: A write circuit for providing distinctive write currents to a chalcogenide memory cell is disclosed. The write circuit includes a current amplitude trim module, a current amplification and distribution module, and a write current shaping module. The current amplitude trim module provides a well-compensated current across a predetermined range of temperatures, voltage supplies and process corners intended for programming a chalcogenide memory cell. The current amplification and distribution module amplifies the well-compensated current in order to meet a programming requirement of the chalcogenide memory cell. The write current shaping module supplies an appropriate amount of write “0” current or write “1” current, based on the amplified current, to program the chalcogenide memory cell accordingly.

    Abstract translation: 公开了一种用于向硫族化物存储器单元提供独特写入电流的写入电路。 写入电路包括电流幅度调整模块,电流放大和分配模块以及写入电流整形模块。 电流幅度调整模块提供了在用于编程硫族化物存储器单元的预定温度范围,电压供应和过程角中的良好补偿电流。 当前的放大和分配模块放大了良好补偿的电流,以满足硫族化物存储单元的编程要求。 写入电流整形模块基于放大的电流提供适当量的写入“0”电流或写入“1”电流,以相应地编程硫族化物存储器单元。

    Hardened current mode logic (CML) voter circuit, system and method
    486.
    发明授权
    Hardened current mode logic (CML) voter circuit, system and method 有权
    硬化电流模式逻辑(CML)选举电路,系统和方法

    公开(公告)号:US07965098B2

    公开(公告)日:2011-06-21

    申请号:US12595865

    申请日:2008-12-10

    CPC classification number: H03K19/23

    Abstract: A current mode logic voter circuit includes three two-input split NOR gates. Each two-input split NOR gate receives a corresponding pair of input signals and generates a pair of first output signals responsive to the input signals. A three input split NOR gate is coupled to the two-input split NOR gates to receive the first output signals and generates a second pair of output signals responsive to the first output signals from the two-input split NOR gates. The two and three-input split NOR gates can be formed from current mode logic buffer circuits, and in one embodiment in the three-input split NOR gate the buffer circuits are hardened.

    Abstract translation: 电流模式逻辑选择电路包括三个双输入分频NOR门。 每个双输入分频NOR门接收相应的输入信号对,并根据输入信号产生一对第一输出信号。 三输入分频NOR门耦合到双输入分频NOR门以接收第一输出信号,并响应于来自双输入分频NOR门的第一输出信号产生第二对输出信号。 两个和三个输入的分频NOR门可以由电流模式逻辑缓冲电路形成,并且在一个实施例中,在三输入分频NOR门中,缓冲电路被硬化。

    Read reference circuit for a sense amplifier within a chalcogenide memory device
    487.
    发明授权
    Read reference circuit for a sense amplifier within a chalcogenide memory device 有权
    读取硫属化物存储器件内的读出放大器的参考电路

    公开(公告)号:US07916527B2

    公开(公告)日:2011-03-29

    申请号:US12525482

    申请日:2008-11-26

    Abstract: A read reference circuit for a sense amplifier within a chalcogenide memory device is disclosed. The read reference circuit provides a reference voltage level to the sense amplifier for distinguishing between a logical “0” state and a logical “1” state within a chalcogenide memory cell. In conjunction with a precharge circuit, the read reference circuit generates a selectable read reference current to the sense amplifier in order to detect the logical state of the chalcogenide memory cell. The precharge circuit precharges the bitlines of the chalcogenide memory cell before the sense amplifier detects the logical state of the chalcogenide memory cell.

    Abstract translation: 公开了一种用于硫族化物存储器件内的读出放大器的读取参考电路。 读取参考电路向读出放大器提供参考电压电平,用于区分硫属化物存储单元内的逻辑“0”状态和逻辑“1”状态。 结合预充电电路,读取的参考电路产生可读的读取参考电流到读出放大器,以便检测硫族化物存储单元的逻辑状态。 预充电电路在读出放大器检测到硫族化物存储单元的逻辑状态之前对硫族化物存储单元的位线进行预充电。

    Pen
    489.
    外观设计
    Pen 有权

    公开(公告)号:USD628643S1

    公开(公告)日:2010-12-07

    申请号:US29353398

    申请日:2010-01-07

    Applicant: Bin Li

    Designer: Bin Li

    Pen
    490.
    外观设计
    Pen 有权

    公开(公告)号:USD624965S1

    公开(公告)日:2010-10-05

    申请号:US29338978

    申请日:2009-06-22

    Applicant: Bin Li

    Designer: Bin Li

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