公开(公告)号：US20130335655A1

公开(公告)日：2013-12-19

申请号：US13581306

申请日：2012-06-26

申请人： Cheng-hung Chen

发明人： Cheng-hung Chen

IPC分类号： G02F1/136 ,  H01L33/58

CPC分类号： G02F1/1345 ,  G02F1/133711 ,  G02F1/1339 ,  G02F1/1393

摘要： The present invention provides a substrate for array process of panel display device, which includes a cell switch set and a PVSA mode pad set. Cell switch set includes a plurality of switch elements. PSVA mode pad set includes a data scan pad and a common electrode pad. Data scan pad is connected through some switch elements of cell switch set to a plurality of scan lines and data lines. Common electrode pad is connected through switch element to common electrode line in the area. The present invention further provides a panel display device and manufacturing method of liquid crystal display panel. In this manner, the present invention reduces the number of pads in PSVA mode pad set to simplify peripheral routes.

摘要翻译： 本发明提供一种面板显示装置的阵列处理用基板，其包括单元开关组和PVSA模式焊盘组。 电池开关组包括多个开关元件。 PSVA模式焊盘组包括数据扫描焊盘和公共电极焊盘。 数据扫描焊盘通过单元开关的一些开关元件连接到多条扫描线和数据线。 公共电极焊盘通过开关元件连接到该区域中的公共电极线。 本发明还提供一种液晶显示面板的显示装置及其制造方法。 以这种方式，本发明减少了PSVA模式焊盘组中的焊盘的数量，以简化外围路由。

公开(公告)号：US08609308B1

公开(公告)日：2013-12-17

申请号：US13484434

申请日：2012-05-31

申请人： Pei-Shiang Chen ,  Hung-Chun Wang ,  Jeng-Horng Chen ,  Cheng-Hung Chen ,  Shih-Chi Wang ,  Nian-Fuh Cheng ,  Chia-Chi Lin

发明人： Pei-Shiang Chen ,  Hung-Chun Wang ,  Jeng-Horng Chen ,  Cheng-Hung Chen ,  Shih-Chi Wang ,  Nian-Fuh Cheng ,  Chia-Chi Lin

IPC分类号： G03F9/00 ,  G03C5/00

CPC分类号： G06F17/5068 ,  G03F7/20 ,  H01J37/3174 ,  H01J2237/31764 ,  H01J2237/31769 ,  Y10S430/143

摘要： The present disclosure provides a method of improving a layer to layer overlay error by an electron beam lithography system. The method includes generating a smart boundary of two subfields at the first pattern layer and obeying the smart boundary at all consecutive pattern layers. The same subfield is exposed by the same electron beam writer at all pattern layers. The overlay error caused by the different electron beam at different layer is improved.

公开(公告)号：US20130323648A1

公开(公告)日：2013-12-05

申请号：US13484434

申请日：2012-05-31

申请人： Pei-Shiang Chen ,  Hung-Chun Wang ,  Jeng-Horng Chen ,  Cheng-Hung Chen ,  Shih-Chi Wang ,  Nian-Fuh Cheng ,  Chia-Chi Lin

发明人： Pei-Shiang Chen ,  Hung-Chun Wang ,  Jeng-Horng Chen ,  Cheng-Hung Chen ,  Shih-Chi Wang ,  Nian-Fuh Cheng ,  Chia-Chi Lin

IPC分类号： G03F7/20

CPC分类号： G06F17/5068 ,  G03F7/20 ,  H01J37/3174 ,  H01J2237/31764 ,  H01J2237/31769 ,  Y10S430/143

摘要： The present disclosure provides a method of improving a layer to layer overlay error by an electron beam lithography system. The method includes generating a smart boundary of two subfields at the first pattern layer and obeying the smart boundary at all consecutive pattern layers. The same subfield is exposed by the same electron beam writer at all pattern layers. The overlay error caused by the different electron beam at different layer is improved.

摘要翻译： 本公开提供了一种通过电子束光刻系统改善层间覆盖误差的方法。 该方法包括在第一图案层处生成两个子场的智能边界，并在所有连续图案层处遵循智能边界。 相同的子场在相同的电子束写入器在所有图案层曝光。 改善了不同电子束在不同层面引起的覆盖误差。

公开(公告)号：US20130321728A1

公开(公告)日：2013-12-05

申请号：US13521708

申请日：2012-06-01

申请人： Cheng-hung Chen

发明人： Cheng-hung Chen

IPC分类号： G09G5/02 ,  G02F1/136 ,  H01J9/00

CPC分类号： G02F1/136 ,  G02F1/1309 ,  G02F1/1333 ,  G02F1/133351 ,  G02F1/1345 ,  G02F2001/13775 ,  G09G5/02

摘要： The present Invention provides a substrate for array process of panel display device, which includes a cell switch and a PVSA mode pad set. Cell switch includes a plurality of switches, with each connected to a pad in shorting bar pad set. PSVA mode pad set includes a scan pad and a data pad. Scan pad is connected through some switches of cell switch to scan lines, and data pad is connected through some switches of cell switch to data lines. In this manner, the present invention reduces the number of pads in PSVA mode pad set to simplify peripheral routes.

摘要翻译： 本发明提供一种面板显示装置的阵列处理用基板，其包括单元开关和PVSA模式焊盘组。 单元开关包括多个开关，每个开关连接到短路棒组中的垫。 PSVA模式焊盘组包括扫描焊盘和数据焊盘。 扫描板通过单元开关的一些开关连接到扫描线，数据焊盘通过单元开关的一些开关连接到数据线。 以这种方式，本发明减少了PSVA模式焊盘组中的焊盘的数量，以简化外围路由。

公开(公告)号：US20130321724A1

公开(公告)日：2013-12-05

申请号：US13581308

申请日：2012-06-12

申请人： Cheng-hung Chen

发明人： Cheng-hung Chen

IPC分类号： G02F1/136 ,  H01L33/08 ,  G02F1/1335

CPC分类号： G02F1/136286 ,  G02F2001/133742 ,  G02F2001/136254 ,  G02F2001/136272 ,  G02F2001/13775 ,  H01L2924/0002 ,  H01L2924/00

摘要： A liquid crystal display (LCD) device, an array substrate in the LCD device, and a method of manufacturing the array substrate are proposed. The LCD device includes an array substrate, a color filter (CF) substrate, and a liquid crystal (LC) layer sandwiched between the array substrate and the CF substrate. A voltage-applying circuit, an auxiliary wire, and a first test pad are disposed on the array substrate. The auxiliary wire is adjacent to the voltage-applying circuit. The auxiliary wire and the voltage-applying circuit are made of the same unit and undergo the same process. If the reference wire is examined to be defective, it could refer that the voltage-applying circuit might have a fault after references and comparisons. So the array substrate could be controlled or repaired. reducing the number of defective products.

摘要翻译： 提出了液晶显示（LCD）装置，液晶显示装置中的阵列基板以及阵列基板的制造方法。 LCD装置包括阵列基板，滤色器（CF）基板和夹在阵列基板和CF基板之间的液晶（LC）层。 电压施加电路，辅助导线和第一测试焊盘设置在阵列基板上。 辅助线与电压施加电路相邻。 辅助线和电压施加电路由相同的单元制成并进行相同的处理。 如果参考线被检查为有缺陷，则可以参考电压施加电路在参考和比较之后可能有故障。 因此阵列基板可以被控制或修理。 减少有缺陷的产品数量。

公开(公告)号：US20130231025A1

公开(公告)日：2013-09-05

申请号：US13510330

申请日：2012-03-13

申请人： Cheng-hung Chen

发明人： Cheng-hung Chen

IPC分类号： H01J9/50

CPC分类号： G02F1/1309 ,  G02F1/133703 ,  G02F1/133788 ,  G02F2001/133726

摘要： The present invention discloses a method and a device for manufacturing liquid crystal panel. The method includes: after introducing liquid crystal between two substrates, subjecting the substrates to edge cutting in order to expose a signal pad; supplying an inspection signal to the signal pad to effect inspection, wherein if a defect is found, then repair of the defect is carried out; and after the inspection or after the repair, applying first alignment to have monomers of the liquid crystal polymerized to form pre-tilt angle. The present invention carries out inspection of substrates before an alignment operation is performed to have monomers of liquid crystal polymerized to show pre-tilt angle and if no defect is identified or if defects are identified but are subjected to repairing by a repair process to ensure that no defect exists in the substrates, the liquid crystal monomers are processed to show the pre-tilt angle.

摘要翻译： 本发明公开了一种制造液晶面板的方法和装置。 该方法包括：在两个基板之间引入液晶之后，对基板进行边缘切割以暴露信号垫; 向信号垫提供检查信号以进行检查，其中如果发现缺陷，则进行缺陷的修复; 并且在检查或修理之后，应用第一对准以使液晶的单体聚合以形成预倾角。 在进行对准操作之前，本发明进行基板的检查，以使具有液晶聚合单体以显示预倾角，并且如果没有识别到​​缺陷，或者如果识别出缺陷，但是通过修复过程进行修复，以确保 在基板中不存在缺陷，处理液晶单体以显示预倾角。

公开(公告)号：US20130026491A1

公开(公告)日：2013-01-31

申请号：US13241563

申请日：2011-09-23

申请人： CHENG-HUNG CHEN ,  DER-LIN HSIA ,  CHIA-HUNG HOU

发明人： CHENG-HUNG CHEN ,  DER-LIN HSIA ,  CHIA-HUNG HOU

IPC分类号： H01L33/02 ,  H01L33/60

CPC分类号： H01L33/46 ,  H01L33/007 ,  H01L33/10 ,  H01L33/20

摘要： The present invention discloses a LED structure and a method for manufacturing the LED structure. The LED structure includes a substrate, a reflection layer, a first conducting layer, a light emitting layer, and a second conducting layer. The substrate has a plurality of grooves, and the reflection layer is disposed inside the plurality of grooves. The reflection layer is formed as a reflection block inside each of the grooves. The first conducting layer is disposed on the substrate, that is, the reflection layer is disposed between the first conducting layer and the substrate. The light emitting layer and the second conducting layer are sequentially disposed on the first conducting layer. The light emitting layer generates light when a current pass through the light emitting layer. Accordingly, the light generated by the light emitting layer can be emitted to the same side of the LED structure.

摘要翻译： 本发明公开了一种LED结构及其制造方法。 LED结构包括基板，反射层，第一导电层，发光层和第二导电层。 基板具有多个槽，反射层配置在多个槽内。 反射层在每个槽内形成为反射块。 第一导电层设置在基板上，即，反射层设置在第一导电层和基板之间。 发光层和第二导电层依次设置在第一导电层上。 当电流通过发光层时，发光层产生光。 因此，由发光层产生的光可以发射到LED结构的同一侧。

公开(公告)号：US20130009661A1

公开(公告)日：2013-01-10

申请号：US13376590

申请日：2011-08-26

申请人： Cheng-hung Chen

发明人： Cheng-hung Chen

IPC分类号： G01R31/26

CPC分类号： G02F1/1309 ,  G09G3/006

摘要： The present invention relates to a field of LCD technology, especially to a testing circuit for PSVA and array. The testing circuit for PSVA and array has gate signal lines, data signal lines, a first solder pad and thin-film transistors. Extension lines of the gate signal lines and the data signal lines are each connected to a drain of a corresponding one of the thin-film transistors. Sources of the thin-film transistors corresponding to the data signal lines are connected to each other and connected to the first solder pad. Gates of the thin-film transistors corresponding to the data signal lines are connected to a transfer structure on a substrate. Sources and gates of the thin-film transistors corresponding to the gate signal lines are connected to each other and connected to the transfer structure. Comparing with conventional testing circuit for PSVA and array, techniques provided by the present invention effectively reduces the number of solder pads at glass edges and simplifies complexity of overall circuit.

摘要翻译： 本发明涉及LCD技术领域，尤其涉及用于PSVA和阵列的测试电路。 PSVA和阵列的测试电路具有栅极信号线，数据信号线，第一个焊盘和薄膜晶体管。 栅极信号线和数据信号线的延长线各自连接到相应的一个薄膜晶体管的漏极。 与数据信号线相对应的薄膜晶体管的源极彼此连接并连接到第一焊盘。 对应于数据信号线的薄膜晶体管的栅极连接到衬底上的转移结构。 对应于栅极信号线的薄膜晶体管的源极和栅极彼此连接并连接到转移结构。 与传统的PSVA和阵列测试电路相比，本发明提供的技术有效地减少了玻璃边缘焊盘的数量，简化了整个电路的复杂性。

公开(公告)号：US20120050633A1

公开(公告)日：2012-03-01

申请号：US13218564

申请日：2011-08-26

申请人： Jing-Ru Chen ,  Wei-Hsien Wu ,  Cheng-Hung Chen

发明人： Jing-Ru Chen ,  Wei-Hsien Wu ,  Cheng-Hung Chen

IPC分类号： G02F1/136 ,  H01L33/08

CPC分类号： G02F1/136286 ,  G09G3/3674 ,  G09G2310/0286

摘要： A LCD panel includes a gate driver, an active-matrix array and a switching circuit. The gate driver is disposed on a thin film transistor substrate, and includes a shift register, wherein the shift register has plural output terminals for successively outputting plural gate driving signals. The active-matrix array is disposed on the thin film transistor substrate, and includes plural gate lines, wherein the gate lines are connected with the output terminals of the shift register. The switching circuit is disposed on the thin film transistor substrate, and includes plural switching units, wherein each of the switching units has a first terminal electrically connected with one of the output terminals of the shift register, a control terminal electrically connected with a first input pad, and a second terminal electrically connected with a second input pad.

摘要翻译： LCD面板包括栅极驱动器，有源矩阵阵列和开关电路。 栅极驱动器设置在薄膜晶体管基板上，并且包括移位寄存器，其中移位寄存器具有用于连续输出多个栅极驱动信号的多个输出端子。 有源矩阵阵列设置在薄膜晶体管基板上，并且包括多条栅极线，其中栅极线与移位寄存器的输出端相连。 开关电路设置在薄膜晶体管基板上，并且包括多个开关单元，其中每个开关单元具有与移位寄存器的一个输出端电连接的第一端子，与第一输入端电连接的控制端子 焊盘和与第二输入焊盘电连接的第二端子。

公开(公告)号：US09293073B2

公开(公告)日：2016-03-22

申请号：US13381071

申请日：2011-12-16

申请人： Cheng-Hung Chen

发明人： Cheng-Hung Chen

IPC分类号： G01R31/20 ,  G09G3/00

CPC分类号： G09G3/006

摘要： Disclosed is a testing system, which includes a thin film transistor substrate. The thin film transistor substrate includes a plurality of thin film transistors and a plurality of connecting pads. Each of the thin film transistors includes a first electrode, a second electrode, and a third electrode. The thin film transistor substrate further includes a testing pad. One of the first electrode and the second electrode of each of the thin film transistors is electrically connected with one of the connecting pads. The third electrode and the other one of the first electrode and the second electrode of each of the thin film transistors are electrically connected with the testing pad. The testing system of the present invention is capable of decreasing the cost of the testing system and the complexity of disposed circuits.

摘要翻译： 公开了一种包括薄膜晶体管基板的测试系统。 薄膜晶体管基板包括多个薄膜晶体管和多个连接焊盘。 每个薄膜晶体管包括第一电极，第二电极和第三电极。 薄膜晶体管基板还包括测试垫。 每个薄膜晶体管的第一电极和第二电极之一与连接焊盘中的一个电连接。 每个薄膜晶体管的第三电极和第一电极和第二电极中的另一个与测试焊盘电连接。 本发明的测试系统能够降低测试系统的成本和设置电路的复杂性。