公开(公告)号：US07323713B2

公开(公告)日：2008-01-29

申请号：US11189980

申请日：2005-07-27

Applicant: Nobuaki Ishiga ,  Takuji Yoshida ,  Yuichi Masutani ,  Shingo Nagano

Inventor： Nobuaki Ishiga ,  Takuji Yoshida ,  Yuichi Masutani ,  Shingo Nagano

IPC: H01L29/04

CPC classification number: G02F1/136227 ,  G02F1/133555 ,  G02F2001/136236 ,  H01L21/32139 ,  H01L27/124

Abstract: A method of producing a thin film transistor array substrate which includes an insulating substrate, a display pixel having a pixel electrode connected to a drain electrode, a gate wiring, and a source wiring perpendicular to the gate wiring, comprising forming a first thin metal multi-layer film an upper layer of which includes aluminum, and spreading a photo-resist, forming the photo-resist to a thickness less in an area connected to a second thin metal film than other area, patterning the first thin metal film, reducing a thickness of the photo-resist layer and removing the photo-resist in the area, removing the upper layer in the area to expose a lower layer, forming an interlayer insulating film and patterning it to expose the lower layer in the area, and patterning the second thin metal film to include the area, to connect the lower layer to the second thin metal film.

Abstract translation: 一种制造薄膜晶体管阵列基板的方法，该薄膜晶体管阵列基板包括绝缘基板，具有连接到漏电极的像素电极的显示像素，栅极布线和垂直于栅极布线的源极布线，包括形成第一薄金属多 其上层包括铝，并铺展光致抗蚀剂，在与第二薄金属膜连接的区域中形成光刻胶的厚度小于其它区域，图案化第一薄金属膜，减少 去除该区域中的光致抗蚀剂，去除该区域中的上层以暴露下层，形成层间绝缘膜并将其图案化以暴露该区域中的下层，并将该图案化 第二薄金属膜包括该区域，以将下层连接到第二薄金属膜。

公开(公告)号：US20070103625A1

公开(公告)日：2007-05-10

申请号：US11548488

申请日：2006-10-11

Applicant: Yuichi MASUTANI ,  Shigeaki NOUMI ,  Shingo NAGANO

Inventor： Yuichi MASUTANI ,  Shigeaki NOUMI ,  Shingo NAGANO

IPC: G02F1/1335 ,  G02F1/1343

CPC classification number: G02F1/133555 ,  G02F1/136227

Abstract: A thin film transistor array substrate includes a reflective electrode, a storage capacitor electrode disposed below the reflective electrode with a first insulation layer interposed therebetween, a second insulation layer disposed above the reflective electrode, the second insulation layer having a contact hole in an area where the storage capacitor electrode is not disposed, a transmissive electrode electrically connected to the reflective electrode through the contact hole, and a thickness compensation pattern disposed below the reflective electrode in an area having the contact hole. The thickness compensation pattern is isolated from the storage capacitor electrode.

Abstract translation: 薄膜晶体管阵列基板包括反射电极，设置在反射电极下方的辅助电容电极，其间插入有第一绝缘层，设置在反射电极上方的第二绝缘层，第二绝缘层在其中 不设置保持电容电极，通过接触孔与反射电极电连接的透射电极和设置在具有接触孔的区域中的反射电极下方的厚度补偿图案。 厚度补偿图案与存储电容器电极隔离。

公开(公告)号：US07212180B2

公开(公告)日：2007-05-01

申请号：US10814259

申请日：2004-04-01

Applicant: Yuichi Masutani ,  Shingo Nagano

Inventor： Yuichi Masutani ,  Shingo Nagano

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G02F1/134363 ,  G09G3/3614 ,  G09G3/3696 ,  G09G2300/0434 ,  G09G2320/0219 ,  G09G2320/0247

Abstract: A method of driving a liquid crystal display device of IPS mode is disclosed. The liquid crystal display device includes a pair of substrates, a liquid crystal layer placed between the substrates, gate lines placed above one of the substrates, source lines placed to cross the gate lines with an insulative layer interposed therebetween, a switching element placed near the crossing point of the gate lines and the source lines, and a pixel electrode connected to the source lines through the switching element. A signal voltage required for image display is supplied to the pixel electrode by the source line through the switching element. The method sets an average value of the signal voltage in such a way that an average value of a positive polarity voltage and a negative polarity voltage of the pixel electrode varies with a grayscale to be displayed, and inputs the average value of the signal voltage to the pixel electrode.

Abstract translation: 公开了一种驱动IPS模式的液晶显示装置的方法。 液晶显示装置包括一对基板，位于基板之间的液晶层，位于一个基板上方的栅极线，插入有绝缘层的栅极线与栅极线交叉设置的开关元件， 栅极线和源极线的交叉点，以及通过开关元件连接到源极线的像素电极。 图像显示所需的信号电压通过开关元件由源极线提供给像素电极。 该方法设置信号电压的平均值，使得像素电极的正极性电压和负极性电压的平均值随着要显示的灰度而变化，并将信号电压的平均值输入到 像素电极。

公开(公告)号：US20060262110A1

公开(公告)日：2006-11-23

申请号：US11419072

申请日：2006-05-18

Applicant: Takayuki Fukuda ,  Yukio Ijima ,  Shigeru Yachi ,  Yuichi Masutani

Inventor： Takayuki Fukuda ,  Yukio Ijima ,  Shigeru Yachi ,  Yuichi Masutani

IPC: G09G5/00

CPC classification number: G09G3/3648 ,  G09G2310/06 ,  G09G2320/0233 ,  G09G2360/142

Abstract: A driving method for a display device that includes: plural read signal lines; plural selectors connected to the read signal lines; plural gate signal lines; a photo-sensor connected to one of the read signal lines based on whether the one of the gate signal lines are switched on; and a detection circuit that detects an output value of the photo-sensor and selectively establishes connections with the read signal lines based on whether the selectors are switched on, includes: switching on one of the selectors; switching on the one of the gate signal lines; and detecting the output value. A timing of switching on the one of the gate signal lines is delayed by a specific period from a timing of switching on the one of the selectors. An influence of switching noises to the detection of the output value remains during the specific period.

Abstract translation: 一种显示装置的驱动方法，包括：多条读信号线; 连接到读信号线的多个选择器; 多个门信号线; 基于所述栅极信号线是否被接通而连接到所述读取信号线之一的光电传感器; 以及检测电路，其检测所述光传感器的输出值，并且基于所述选择器是否被接通选择性地建立与所述读取信号线的连接，所述检测电路包括：接通所述选择器中的一个; 接通一条栅极信号线; 并检测输出值。 将栅极信号线中的一个导通的定时从选择器之一切换的定时延迟特定的时间。 开关噪声对输出值的检测的影响在特定期间内保持。

公开(公告)号：US20060256249A1

公开(公告)日：2006-11-16

申请号：US11396458

申请日：2006-04-04

Applicant: Shingo Nagano ,  Yuichi Masutani

Inventor： Shingo Nagano ,  Yuichi Masutani

IPC: G02F1/136 ,  G02F1/1343

CPC classification number: G02F1/134363 ,  G02F2001/136218

Abstract: A liquid display device and a manufacturing method for the display, in which a molecule misalignment of a liquid crystal 300 is reduced, and aperture rate is increased so that short circuit between source lines 2 and common electrodes 6 rarely occurs without adding manufacturing processes, can be obtained. In the liquid crystal display, first electrode patterns 11 are arranged along the source lines 2 in a layer, with a gate insulation film 8 intervening, underneath the source lines 2, and second electrode patterns 12 are arranged along the source lines 2 in a layer, with an interlayer insulation film 9 intervening, above the source lines 2, in positions where the second electrode patterns 12 do not substantially overlap the source lines 2, thereby, a leak electric field from the source lines 2 can be effectively shielded by the electrode patterns 11 arranged underneath the source lines and the electrode patterns 12 arranged above the source lines. Moreover, the first electrode patterns 11 are composed of a conducting film in the same layer as the gate lines 1, and the second electrode patterns 12 are composed of a conducting film in the same layer as the common electrodes 6.

Abstract translation: 液晶显示装置及其制造方法，其中液晶300的分子未对准被减小，孔径率增加，使源极线2和公共电极6之间的短路很少发生而不添加制造工艺，可以 得到。 在液晶显示器中，第一电极图案11沿着源极线2排列成一层，栅极绝缘膜8介于源极线2之下，第二电极图案12沿着源极线2布置在层 在源极线2的上方，在第二电极图案12基本上不与源极线2重叠的位置处插入层间绝缘膜9，从而能够有效地屏蔽源极线2的漏电流 布置在源极线下方的图案11和布置在源极线之上的电极图案12。 此外，第一电极图案11由与栅极线1相同的层中的导电膜构成，并且第二电极图案12由与公共电极6相同的层中的导电膜构成。

公开(公告)号：US20060022199A1

公开(公告)日：2006-02-02

申请号：US11189980

申请日：2005-07-27

Applicant: Nobuaki Ishiga ,  Takuji Yoshida ,  Yuichi Masutani ,  Shingo Nagano

Inventor： Nobuaki Ishiga ,  Takuji Yoshida ,  Yuichi Masutani ,  Shingo Nagano

IPC: H01L29/04

CPC classification number: G02F1/136227 ,  G02F1/133555 ,  G02F2001/136236 ,  H01L21/32139 ,  H01L27/124

Abstract: A method of producing a thin film transistor array substrate which includes an insulating substrate, a display pixel having a pixel electrode connected to a drain electrode, a gate wiring, and a source wiring perpendicular to the gate wiring, comprising forming a first thin metal multi-layer film an upper layer of which includes aluminum, and spreading a photo-resist, forming the photo-resist to a thickness less in an area connected to a second thin metal film than other area, patterning the first thin metal film, reducing a thickness of the photo-resist layer and removing the photo-resist in the area, removing the upper layer in the area to expose a lower layer, forming an interlayer insulating film and patterning it to expose the lower layer in the area, and patterning the second thin metal film to include the area, to connect the lower layer to the second thin metal film.

Abstract translation: 一种制造薄膜晶体管阵列基板的方法，该薄膜晶体管阵列基板包括绝缘基板，具有连接到漏电极的像素电极的显示像素，栅极布线和垂直于栅极布线的源极布线，包括形成第一薄金属多 其上层包括铝，并铺展光致抗蚀剂，在与第二薄金属膜连接的区域中形成光刻胶的厚度小于其它区域，图案化第一薄金属膜，减少 去除该区域中的光致抗蚀剂，去除该区域中的上层以暴露下层，形成层间绝缘膜并将其图案化以暴露该区域中的下层，并将该图案化 第二薄金属膜包括该区域，以将下层连接到第二薄金属膜。

公开(公告)号：US20050212988A1

公开(公告)日：2005-09-29

申请号：US11061532

申请日：2005-02-18

Applicant: Shingo Nagano ,  Yuichi Masutani ,  Hisaharu Oura

Inventor： Shingo Nagano ,  Yuichi Masutani ,  Hisaharu Oura

IPC: G02F1/1343 ,  G02F1/133 ,  G02F1/136 ,  G09G3/20 ,  G09G3/36

CPC classification number: G09G3/3611 ,  G09G3/2011 ,  G09G3/3614 ,  G09G3/3688 ,  G09G3/3696 ,  G09G2300/0434 ,  G09G2310/0248 ,  G09G2310/027 ,  G09G2310/06 ,  G09G2320/0209

Abstract: A liquid crystal display apparatus according to the invention is an in-plane switching liquid crystal display apparatus having gate wirings and source wirings, which intersect one another, and also having pixel electrodes each connected to an associated one of the source wirings, and common electrodes disposed opposite to the pixel electrodes. A scanning signal is inputted to the gate wiring so that one horizontal period has a writing period, in which a pixel potential is written to the pixel electrode, and a nonwriting period, in which no pixel potential is written to the pixel electrode. The pixel potential is outputted to the source wiring in the writing period, while a common potential is inputted to the source wiring in the nonwriting period.

Abstract translation: 根据本发明的液晶显示装置是具有栅极布线和源极布​​线的面内切换液晶显示装置，其彼此相交，并且还具有各自连接到相关联的源极布线的像素电极和公共电极 与像素电极相对设置。 扫描信号被输入到栅极布线，使得一个水平周期具有其中像素电位被写入到像素电极的写入周期和不对像素电极写入像素电位的非写入周期。 在写入期间，将像素电位输出到源极配线，而在非写入期间将公共电位输入到源极配线。

公开(公告)号：US06864939B2

公开(公告)日：2005-03-08

申请号：US10733364

申请日：2003-12-12

Applicant: Yasunori Niwano ,  Yuichi Masutani ,  Ken Nakashima ,  Yuuzou Oodoi ,  Kazuhiro Kobayashi

Inventor： Yasunori Niwano ,  Yuichi Masutani ,  Ken Nakashima ,  Yuuzou Oodoi ,  Kazuhiro Kobayashi

IPC: G02F1/1343 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: G02F1/134363 ,  G02F1/136227

Abstract: An IPS liquid crystal displaying apparatus includes: a TFT array substrate, an opposite substrate opposed to the TFT array substrate and liquid crystal interposed between the TFT array substrate and the opposite substrate, wherein the TFT array substrate is composed of a glass substrate, a gate insulating film formed on the glass substrate, a possivation film formed on the gate insulating film, a plurality of scanning lines for transmitting a scanning signal, a plurality of signal lines for transmitting an image signal, a plurality of pixels arranged in grid like pattern by crossing the plurality of scanning lines with the plurality of signal lines, a plurality of TFTs implementing switching operation of the image signal on the basis of the scanning signals, a plurality of driving electrodes connected with the TFT, a plurality of opposite electrodes arranged in such a manner that each of the plurality of opposite electrodes is opposed to each of the driving electrodes, and a plurality of common lines for mutually connecting each of the opposite electrode of one of the plurality of pixels with the other one of the plurality of pixels, wherein the TFT array substrate is formed on the passivation film, the passivation film being different from a layer provided with the driving electrode and the opposite electrode.

Abstract translation: IPS液晶显示装置包括：TFT阵列基板，与TFT阵列基板相对的相对基板和介于TFT阵列基板和相对基板之间的液晶，其中TFT阵列基板由玻璃基板，栅极 形成在玻璃基板上的绝缘膜，形成在栅极绝缘膜上的成膜，用于传输扫描信号的多条扫描线，用于传输图像信号的多条信号线，以格子状排列的多个像素，通过 与多条信号线交叉的多条扫描线，多个TFT，其基于扫描信号实现图像信号的切换操作，多个与TFT连接的驱动电极，多个相互排列的相对电极 多个相对电极中的每一个与每个驱动电极相对的方式，以及多个 用于将多个像素中的一个的相对电极与多个像素中的另一个相互连接的公共线，其中TFT阵列基板形成在钝化膜上，钝化膜不同于设置有多个像素的层 驱动电极和相对电极。

公开(公告)号：US06838696B2

公开(公告)日：2005-01-04

申请号：US09805039

申请日：2001-03-14

Applicant: Kazuhiro Kobayashi ,  Nobuhiro Nakamura ,  Kazunori Inoue ,  Takuji Yoshida ,  Ken Nakashima ,  Yuichi Masutani ,  Hironori Aoki

Inventor： Kazuhiro Kobayashi ,  Nobuhiro Nakamura ,  Kazunori Inoue ,  Takuji Yoshida ,  Ken Nakashima ,  Yuichi Masutani ,  Hironori Aoki

IPC: G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/04

CPC classification number: G02F1/13458 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136236

Abstract: A thin film transistor array substrate including an insulating substrate, a first metallic pattern formed on the insulating substrate, and an insulating film provided on the first metallic pattern. A semiconductor pattern is provided on the insulating film, and a second metallic pattern is provided on the semiconductor pattern. The second metallic pattern is surrounded by the semiconductor pattern.

Abstract translation: 一种薄膜晶体管阵列基板，包括绝缘基板，形成在所述绝缘基板上的第一金属图案以及设置在所述第一金属图案上的绝缘膜。 半导体图案设置在绝缘膜上，第二金属图案设置在半导体图案上。 第二金属图案被半导体图案包围。

公开(公告)号：US06452656B2

公开(公告)日：2002-09-17

申请号：US09110076

申请日：1998-07-02

Applicant: Yasunori Niwano ,  Yuichi Masutani ,  Ken Nakashima ,  Yuuzou Oodoi ,  Kazuhiro Kobayashi

Inventor： Yasunori Niwano ,  Yuichi Masutani ,  Ken Nakashima ,  Yuuzou Oodoi ,  Kazuhiro Kobayashi

IPC: G02F11343

CPC classification number: G02F1/134363 ,  G02F1/136227

Abstract: An IPS liquid crystal displaying apparatus includes: a TFT array substrate, an opposite substrate opposed to the TFT array substrate and liquid crystal interposed between the TFT array substrate and the opposite substrate, wherein the TFT array substrate is composed of a glass substrate, a gate insulating film formed on the glass substrate, a possivation film formed on the gate insulating film, a plurality of scanning lines for transmitting a scanning signal, a plurality of signal lines for transmitting an image signal, a plurality of pixels arranged in grid like pattern by crossing the plurality of scanning lines with the plurality of signal lines, a plurality of TFTs implementing switching operation of the image signal on the basis of the scanning signals, a plurality of driving electrodes connected with the TFT, a plurality of opposite electrodes arranged in such a manner that each of the plurality of opposite electrodes is opposed to each of the driving electrodes, and a plurality of common lines for mutually connecting each of the opposite electrode of one of the plurality of pixels with the other one of the plurality of pixels, wherein the TFT array substrate is formed on the passivation film, the passivation film being different from a layer provided with the driving electrode and the opposite electrode.

Abstract translation: IPS液晶显示装置包括：TFT阵列基板，与TFT阵列基板相对的相对基板和介于TFT阵列基板和相对基板之间的液晶，其中TFT阵列基板由玻璃基板，栅极 形成在玻璃基板上的绝缘膜，形成在栅极绝缘膜上的成膜，用于传输扫描信号的多条扫描线，用于传输图像信号的多条信号线，以格子状排列的多个像素，通过 与多条信号线交叉的多条扫描线，多个TFT，其基于扫描信号实现图像信号的切换操作，多个与TFT连接的驱动电极，多个相互排列的相对电极 多个相对电极中的每一个与每个驱动电极相对的方式，以及多个 用于将多个像素中的一个的相对电极与多个像素中的另一个相互连接的公共线，其中TFT阵列基板形成在钝化膜上，钝化膜不同于设置有多个像素的层 驱动电极和相对电极。