ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY APPARATUS
    42.
    发明申请
    ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY APPARATUS 有权
    阵列基板及其制造方法,显示装置

    公开(公告)号:US20170012059A1

    公开(公告)日:2017-01-12

    申请号:US15121294

    申请日:2015-11-17

    CPC classification number: H01L27/124 G02F1/136286 H01L27/1262 H01L27/3279

    Abstract: The present invention provides an array substrate and a manufacturing method thereof, and a display apparatus. The array substrate comprises a gate layer, a gate insulating layer, an active layer, a source and drain layer, a scanning line and a signal line formed on a substrate, the signal line is provided in a same layer as the gate layer, the scanning line is provided in a same layer as the source and drain layer, the gate insulating layer is provided between the gate layer, the signal line and the active layer. The array substrate further comprises a first through hole and a second through hole penetrating through the gate insulating layer, the signal line is connected to the source and drain layer via the first through hole, and the scanning line is connected to the gate layer via the second through hole.

    Abstract translation: 本发明提供一种阵列基板及其制造方法以及显示装置。 阵列基板包括形成在基板上的栅极层,栅极绝缘层,有源层,源极和漏极层,扫描线和信号线,信号线设置在与栅极层相同的层中, 扫描线设置在与源极和漏极层相同的层中,栅极绝缘层设置在栅极层,信号线和有源层之间。 阵列基板还包括穿过栅极绝缘层的第一通孔和第二通孔,信号线经由第一通孔连接到源极和漏极层,扫描线经由栅极层经由栅极绝缘层连接到栅极层 第二通孔。

    DISPLAY PANEL, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE

    公开(公告)号:US20240244924A1

    公开(公告)日:2024-07-18

    申请号:US18004332

    申请日:2022-01-29

    CPC classification number: H10K59/80522 H10K59/122

    Abstract: An embodiment of the disclosure provides a display panel comprising a substrate, a display area of the display panel includes a plurality of sub-pixel regions, each sub-pixel includes a first pixel electrode and a second pixel electrode. The display panel further includes an auxiliary electrode connection region including an auxiliary electrode and an electrode connection structure on the substrate, the second pixel electrode is connected to the auxiliary electrode via the electrode connection structure, and an orthogonal projection of the auxiliary electrode connection region on the substrate has no overlap with orthogonal projections of the plurality of sub-pixel regions on the substrate. The electrode connection structure includes a first connection electrode on the auxiliary electrode, a second connection electrode on a side of the first connection electrode facing away the substrate, and a third connection electrode between the first connection electrode and the second connection electrode.

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