Abstract:
Disclosed are an array substrate, a driving method thereof, and a display device. The array substrate comprises a scan driving unit (10) located in a peripheral area and configured to input an enable signal to one terminal of at least one driving control line (Vdd) in a display area so as to drive an OLED device to emit light. The array substrate further comprises at least one compensation control unit (100) and a compensation voltage source (101) configured to provide a compensation voltage (Vc). One terminal of the compensation control unit (100) is connected to the compensation voltage source (101), the other terminal thereof is connected to the other terminal of the at least one driving control line (Vdd), and the compensation control unit (100) is configured to control the compensation voltage source (101) to input the compensation voltage (Vc) to the other terminal of the driving control line (Vdd). The compensation voltage (Vc) is less than or equal to a voltage (VDD) of the enable signal, mura caused by IR Drop can be eliminated.
Abstract:
Provided are an AMOLED pixel unit, a method for driving the same, and a display device. The AMOLED pixel unit includes a compensating unit, a light emitting control unit, a driving transistor, a storage capacitor and an organic light emitting diode, wherein the compensating unit is switched on under the control of a signal on a scan line; the light emitting control unit is switched on under the control of a signal on a light emitting control line; an anode of the organic light emitting diode is connected to a second terminal of the storage capacitor, and a cathode of the organic light emitting diode receives a second power supply signal. Such a circuit can effectively compensate for the drift and the non-uniformity of the threshold voltages of the transistors and the non-uniformity of the voltages of the organic light emitting diodes.
Abstract:
The NAND gate circuit includes at least two input transistors, at least two pull-up modules and at least two input control transistors. A first electrode of each input transistor is connected to a second level output end via the pull-up module. The input control transistor is configured to enable a potential of the control end of the pull-up module connected to the first electrode of the input transistor to be the first level when the input signal connected to the gate electrode of the input control transistor is at a second level. The at least two pull-up modules are configured to cut off the connection between the second level output end and the NAND gate output end when all the input signals are at the second level, and enable the connection therebetween when none of the input signals is at the second level.
Abstract:
An organic electroluminescent display device, a driving method thereof and a display device are provided. The organic electroluminescent display device comprises: a plurality of pixel units arranged in matrix, each of the pixel units comprising a plurality of sub-pixel units for displaying different colors, and in each row of the pixel units, two adjacent pixel units constituting a pixel unit group; and a sub-pixel unit for displaying white between the two adjacent pixel units in each pixel unit group. The area occupied by the sub-pixel unit for displaying white is greater than that occupied by any one sub-pixel unit in the pixel unit. The sub-pixel unit for displaying white is configured such that the luminance of emitted light thereof replaces the luminance of light emitted by one pixel unit of two adjacent pixel units in a frame according to a preset condition.
Abstract:
Provided are a pixel circuit and driving method thereof and a display apparatus. The pixel circuit comprises a first transistor (T1), a second transistor (T2), a third transistor (T3), a storage capacitor (C1), a parasitic capacitor (C2) and a light emitting device (L). A first electrode of the first transistor (T1) is connected to a first power source signal terminal, and its second electrode is connected to a first electrode of the third transistor (T3); the gate of the second transistor (T2) is connected to a first control signal terminal (S1), its first electrode is connected to a data signal terminal (DATA), and its second electrode is connected to the gate of the first transistor (T1); the gate of the third transistor (T3) is connected to a second control signal terminal (S2), and its second electrode is connected to one terminal of the light emitting device (L); one terminal of the storage capacitor (C1) is connected to the gate of the first transistor (T1), and the other terminal of the storage capacitor is connected to one terminal of the light emitting device (L); one terminal of the parasitic capacitor (C2) is connected to one terminal of the light emitting device (L), and the other terminal of the parasitic capacitor (C2) is connected to the other terminal of the light emitting device (L); and the other terminal of the light emitting device (L) is also connected to a second power source signal terminal (ELVSS). The pixel circuit can effectively compensate for the threshold voltage shift of the TFTs and improve the display effect.
Abstract:
A display substrate and a display panel are provided. The display substrate includes: a base substrate; and a plurality of sub-pixels. Each sub-pixel includes a light-emitting element and a pixel circuit; the pixel circuit includes a driving circuit, a data writing circuit, a first control circuit, a second control circuit, and a light-emitting control circuit; the driving circuit is configured to control the driving current flowing through the light-emitting element; the light-emitting control circuit is configured to apply the driving current to the light-emitting element; the first control circuit is configured to write a reference voltage into the driving circuit; the second control circuit is configured to write an initial voltage into the first electrode of the light-emitting element; and orthographic projections of at least part of pixel circuits of every two adjacent sub-pixels in a same row of sub-pixels on the base substrate are mirror-symmetrical.
Abstract:
An image processing method is applied to an electronic device having a display and includes: obtaining pupil coordinates of a user at a current moment; determining a fixation region and a non-fixation region corresponding to the display at the current moment according to the pupil coordinates; rendering an image corresponding to the fixation region according to a first resolution, and rendering an image corresponding to the non-fixation region according to a second resolution, the first resolution being greater than the second resolution; stitching an image corresponding to the fixation region after the rendering and an image corresponding to the non-fixation region after the rendering; and displaying a stitched image on the display.
Abstract:
A display panel includes sub-pixels and a scan driving circuit. The scan driving circuit includes a plurality of stages of shift registers including at least one first shift register and at least one second shift register, and a plurality of clock signal lines including at least one first sub-clock signal line and at least one second sub-clock signal line. Each shift register includes a first sub-circuit and a second sub-circuit. A first sub-clock signal line in the at least one first sub-clock signal line is electrically connected to a first sub-circuit in a first shift register in the at least one first shift register. A second sub-clock signal line in the at least one second sub-clock signal line is electrically connected to one sub-circuit of a first sub-circuit and a second sub-circuit in a second shift register in the at least one second shift register.
Abstract:
Embodiments of the present disclosure provide a display panel and a display device. The display panel includes a base substrate, a plurality of pixel units and a plurality of gate line groups. At least one pixel unit includes a plurality of sub-pixels. At least one sub-pixel includes a sensing transistor and a driving transistor. Each gate line group includes a first gate line and a second gate line; for the first gate line and the second gate line corresponding to the sub-pixels in the same row, the positions of the sensing transistors are closer to the second gate lines, and the positions of the driving transistors are closer to the first gate line, For two sub-pixels close to each other and located in different pixel units in the same row, at least one signal line has a double-layer alignment structure, and the double-layer alignments are electrically connected with each other.
Abstract:
Embodiments of the present disclosure provide a display panel and a display device. The display panel includes a base substrate, a plurality of pixel units and a plurality of gate line groups. At least one pixel unit includes a plurality of sub-pixels. At least one sub-pixel includes a sensing transistor and a driving transistor. Each gate line group includes a first gate line and a second gate line; for the first gate line and the second gate line corresponding to the sub-pixels in the same row, the positions of the sensing transistors are closer to the second gate lines, and the positions of the driving transistors are closer to the first gate line, For two sub-pixels close to each other and located in different pixel units in the same row, at least one signal line has a double-layer alignment structure, and the double-layer alignments are electrically connected with each other.