Abstract:
The present disclosure provides a liquid crystal lens including a liquid crystal cell including a first substrate, a second substrate and a liquid crystal layer arranged between the first and second substrate. The first substrate includes a first base plate, a plurality of transistors arranged on the first base plate, a first electrode electrically connected to one electrode of each of the transistors, and a first polarizer arranged at a side of the first base plate away from the liquid crystal layer. The second substrate includes a second base plate, and a second polarizer arranged at a side of the second base plate away from the liquid crystal layer. The liquid crystal lens further includes a second electrode arranged on the first or second base plate. The first and second base plates are opaque, and each includes a plurality of small apertures which are provided in a one-to-one correspondence manner.
Abstract:
A method of manufacturing an electronic device and an electronic device are disclosed. The manufacturing method including: forming a carbon nanotube electrode pattern on a substrate; placing the substrate on which the electron pattern is formed in a first oxidizing solution, to first dope the carbon nanotubes forming the electrode pattern; and spraying the electrode using a second oxidizing solution to second dope the carbon nanotubes forming the electrode pattern.
Abstract:
A display panel, a driving method for the display panel and a display device. The display panel includes a gate driving circuit, the gate driving circuit includes shift registers of a plurality of stages arranged in sequence, the shift registers of the plurality of stages arranged in sequence are combined into N groups of gate driving sub-circuits, and shift registers in the N groups of gate driving sub-circuits are cascaded, respectively; an m-th group of gate driving sub-circuits in the N groups of gate driving sub-circuits includes a shift register of an m-th stage and a shift register of an (m+L*N)-th stage that are cascaded, where m is an integer that is greater than or equal to 1 and less than or equal to N.
Abstract:
Provided are a display substrate and a display device. The first display region includes at least two domains spaced apart in the first direction and a first space between the at least two domains, the second display region includes at least two domains spaced apart in the first direction and a second space located between the at least two domains of the second display region; each pixel units further includes a discharge line and a common electrode strip, the discharge line includes a first conductive part and a second conductive part, the first conductive part is at the first space, the second conductive part is at the second space, the common electrode strip is at an edge of the first display region adjacent to the data lines, and no common electrode strip is arranged on an edge of the second display region adjacent to the data lines.
Abstract:
A temperature control circuit of a driver chip, a temperature control method of the driver chip, a power management integrated chip, a timing control driver board and a display apparatus are disclosed. The temperature control circuit includes a switching transistor, a comparison circuit and a control circuit; a first electrode of the switching transistor is connected with a first node, a second comparison end and the first electrode or a second electrode of the switching transistor are connected to a second node; the control circuit is configured to output a first reference voltage to the comparison circuit, the comparison circuit is configured to compare a magnitude relationship between a voltage on the second comparison end and the first reference voltage and output a comparison result: the control circuit acquires the comparison result and determines whether an output current on the boost circuit is excessively large.
Abstract:
An electrode structure, a display panel, an electronic device are provided, the electrode structure includes a first electrode portion, a second electrode portion and a conductive connection portion, the first electrode portion includes a first connection bar having a first side and a second side and a plurality of first electrode strips, ends of adjacent first electrode strips away from the first connection bar are open; the second electrode portion includes a second connection bar at a position of the first side away from the second side and a plurality of second electrode strips, the second connection bar includes a third side and a fourth side; the second electrode strips are connected with the second connection bar, ends of adjacent second electrode strips away from the second connection bar are open; ends of the conductive connection portion are connected with the first connection bar and the second connection bar.
Abstract:
A display substrate, including: a base substrate; a plurality of data lines on the base substrate; a first insulating layer on a side of the plurality of data lines away from the base substrate; a plurality of gate lines on a side of the first insulating layer away from the plurality of data lines, where extension directions of the gate and data lines are intersected; a second insulating layer on a side of the plurality of gate lines away from the first insulating layer; and a first electrode on a side of the second insulating layer away from the plurality of gate lines, where at least a portion of an orthographic projection of the first electrode on the base substrate is within an region surrounded by orthographic projections of two adjacent data lines on the base substrate and orthographic projections of two adjacent gate lines on the base substrate.
Abstract:
A display substrate includes a base substrate, a plurality of photosensitive transistor units, a plurality of photosensitive ESD protection units, and at least one common signal line. The base substrate includes a display region, a peripheral region located at a periphery of the display region, and a binding region located at a side of the display region. The plurality of photosensitive transistor units, the plurality of photosensitive ESD protection units and the at least one common signal line are located in the peripheral region. The plurality of photosensitive transistor units is connected with binding pins in the binding region through a plurality of signal lines. At least one photosensitive ESD protection unit is connected with, and located between, at least one signal line and the common signal line.
Abstract:
A thin film transistor and a manufacturing method therefor, an array substrate, and a display panel and device. The thin film transistor includes: a gate (11) and an active layer (12) that are located on one side of a base substrate (10); a gate insulation layer (13) located between the gate (11) and the active layer (12); and a source (14) and a drain (15) that are spaced apart and both are in contact with the active layer (12), wherein a first ratio of the thickness of the gate insulation layer (13) and the thickness of the active layer (12) ranges from 3 to 4.
Abstract:
The present disclosure provides a light strip, including a circuit board. A plurality of LEDs is arranged on the circuit board and spaced apart from each other in an extension direction of the circuit board, a positive connection end and a plurality of negative connection ends are arranged on the circuit board, and a plurality of LEDs is coupled between each negative connection end and the positive connection end. A plurality of LEDs between the first negative connection end and the positive connection end includes a head-end LED and a tail-end LED. The plurality of LEDs between the first negative connection end and the positive connection end includes a first LED and a second LED arranged at opposite sides of a first position in the extension direction of the circuit board. The present disclosure further provides a backlight module and a display module.