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公开(公告)号：US07990677B2
公开(公告)日：2011-08-02
申请号：US12817046
申请日：2010-06-16
申请人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
发明人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
摘要： A multilayer chip capacitor includes: a capacitor body having first and second side surfaces and a bottom surface; a plurality of first and second internal electrodes in the capacitor body; first and second external electrodes having a first polarity and formed on the first and second side surfaces, respectively, to cover a respective lower edge of the side surfaces and to partially extend to the bottom surface; and a third external electrode having a second polarity and formed on the bottom surface. The internal electrodes are disposed in perpendicular to the bottom surface. Each of the first internal electrodes has a first lead drawn to the first side and bottom surfaces and a second lead drawn to the second side and bottom surfaces. Each of the second internal electrodes has a third lead drawn to the bottom surface.
摘要翻译： 一种多层片状电容器包括：具有第一和第二侧表面和底表面的电容器本体; 电容器主体中的多个第一和第二内部电极; 第一和第二外部电极分别具有第一极性并形成在第一和第二侧表面上，以覆盖侧表面的相应下边缘并部分地延伸到底面; 和具有第二极性并形成在底面上的第三外部电极。 内部电极垂直于底面设置。 每个第一内部电极具有被引导到第一侧面和底部表面的第一引线和被引导到第二侧面和底部表面的第二引线。 每个第二内部电极具有被引导到底面的第三引线。
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公开(公告)号：US07961453B2
公开(公告)日：2011-06-14
申请号：US12003884
申请日：2008-01-03
申请人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
发明人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
摘要： A multilayer chip capacitor including: a capacitor body formed of a lamination of a plurality of dielectric layers and having a bottom surface that is a mounting area; a plurality of internal electrodes disposed to be opposite to each other, interposing a dielectric layer there between in the capacitor body and having one lead extended to the bottom surface, respectively; and three or more external electrodes formed on the bottom surface and connected to corresponding internal electrodes via the leads, wherein the internal electrodes are vertically disposed on the bottom surface, and the leads of the internal electrodes having a different polarity from each other, adjacent to each other in a lamination direction, are disposed to be always adjacent to each other in a horizontal direction.
摘要翻译： 一种多层片状电容器，包括：电容器本体，其由多个电介质层的叠层形成，并且具有作为安装区域的底面; 设置成彼此相对的多个内部电极，在电容器主体之间插入介电层，并具有分别延伸到底面的一个引线; 以及三个或更多个外部电极，形成在底表面上并且经由引线连接到相应的内部电极，其中内部电极垂直设置在底部表面上，并且内部电极的引线彼此具有不同的极性， 彼此在层叠方向上彼此沿水平方向布置。
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43.发明申请MULTILAYER CHIP CAPACITOR, MOTHERBOARD APPARATUS HAVING THE SAME, AND POWER DISTRIBUTION NETWORK 有权多层芯片电容器，具有相同功能的主板设备和功率分配网络公开(公告)号：US20090244807A1
公开(公告)日：2009-10-01
申请号：US12270330
申请日：2008-11-13
申请人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
发明人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
IPC分类号： H01G4/005
CPC分类号： H01G4/385 , H01G4/005 , H01G4/30 , H01L2224/16227 , H01L2924/15311 , H01L2924/19105
摘要： There is provided a multilayer chip capacitor including: a capacitor body including first and second capacitor units arranged in a laminated direction; and first to fourth outer electrodes formed on side surfaces of the capacitor body, respectively, wherein the first capacitor unit includes first and second inner electrodes of different polarities alternately arranged in the capacitor body to oppose each other while interposing a corresponding one of dielectric layers, the second capacitor unit includes third and fourth inner electrodes of different polarities alternately arranged in the capacitor body to oppose each other while interposing another corresponding one of the dielectric layers, the first and second capacitor units are electrically insulated from each other, and the first capacitor unit operates in a first frequency range and the second capacitor unit operates in a second frequency range lower than the first frequency range.
摘要翻译： 提供了一种多层片状电容器，包括：电容器体，包括沿层叠方向布置的第一和第二电容器单元; 以及分别形成在电容器主体的侧面上的第一至第四外部电极，其中，所述第一电容器单元包括交替布置在所述电容器体中的第一和第二内部电极，所述第一和第二内部电极彼此相对，同时插入相应的一个电介质层， 所述第二电容器单元包括具有不同极性的第三和第四内部电极，所述第三和第四内部电极交替地布置在所述电容器体中，以相对于彼此相对，同时插入另一个对应的一个所述电介质层，所述第一和第二电容器单元彼此电绝缘， 单元在第一频率范围内操作，并且第二电容器单元在低于第一频率范围的第二频率范围内操作。
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公开(公告)号：US07545624B2
公开(公告)日：2009-06-09
申请号：US11902398
申请日：2007-09-21
申请人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
发明人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
IPC分类号： H01G4/228
摘要： A multilayer chip capacitor including: a capacitor body where a plurality of dielectric layers are deposited, the capacitor body having opposing first and second sides and opposing third and fourth sides; a plurality of layers of internal electrodes deposited alternately with the dielectric layers in the capacitor body; at least one first external electrode formed on the first side; and at least one second external electrode formed on the second side, wherein the first and second external electrodes are staggered with respect to each other and spaced apart from each other at a certain distance in a length direction of the first side.
摘要翻译： 一种多层片状电容器，包括：电容器体，其中沉积有多个电介质层，所述电容器体具有相对的第一和第二侧以及相对的第三和第四侧; 与电容器主体中的电介质层交替沉积的多层内部电极; 形成在所述第一侧上的至少一个第一外部电极; 以及形成在所述第二侧上的至少一个第二外部电极，其中所述第一和第二外部电极相对于彼此交错并且在所述第一侧的长度方向上以一定距离彼此间隔开。
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公开(公告)号：US20090086403A1
公开(公告)日：2009-04-02
申请号：US12237837
申请日：2008-09-25
申请人： Byoung Hwa Lee , Sung Kwon Wi , Sang Soo Park , Min Cheol Park , Dong Seok Park , Hae Suk Chung
发明人： Byoung Hwa Lee , Sung Kwon Wi , Sang Soo Park , Min Cheol Park , Dong Seok Park , Hae Suk Chung
IPC分类号： H01G9/00
摘要： There is provided a multilayer capacitor including an inner connecting conductor of at least one polarity; a plurality of first and second outer electrodes formed on a surface of the body, wherein the inner connecting conductor is connected to a corresponding one of the outer electrodes having identical polarity, a corresponding one of the inner electrodes having identical polarity to the inner connecting conductor includes a plurality of groups each including at least one of the inner electrodes, wherein the inner electrodes of the respective groups are connected to the outer electrodes having identical polarity that are different from one another for each of the groups and electrically connected to the inner connecting conductor through the connected outer electrode.
摘要翻译： 提供一种包括至少一个极性的内连接导体的多层电容器; 形成在所述主体的表面上的多个第一和第二外部电极，其中所述内部连接导体连接到具有相同极性的对应的一个外部电极，相应的一个所述内部电极具有与所述内部连接导体 包括多个组，每个组包括至少一个内部电极，其中各组的内部电极连接到具有与每个组相互不同的极性相同的外部电极，并且电连接到内部连接 导体通过连接的外部电极。
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公开(公告)号：US07502216B2
公开(公告)日：2009-03-10
申请号：US12010018
申请日：2008-01-18
申请人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
发明人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
IPC分类号： H01G4/228
摘要： A multilayer chip capacitor includes: a capacitor body; internal electrodes disposed in the capacitor body, each internal electrode having one or more lead; and external electrodes disposed on first and second side surfaces of the capacitor body to be electrically connected to the internal electrodes through the leads. The average number of leads in each internal electrode is smaller than half (½) of the total number of external electrodes. The leads of the internal electrodes having opposite polarities and adjacent in the lamination direction are disposed to be adjacent to each other as seen from the lamination direction. All the internal electrodes having the same polarity are electrically connected to each other in the capacitor.
摘要翻译： 多层片状电容器包括：电容器本体; 设置在电容器本体中的内部电极，每个内部电极具有一个或多个引线; 以及设置在电容器主体的第一和第二侧面上的外部电极，以通过引线与内部电极电连接。 每个内部电极的引线平均数小于外部电极总数的一半（1/2）。 具有相反极性并且在层叠方向上相邻的内部电极的引线设置成从层叠方向看彼此相邻。 具有相同极性的所有内部电极在电容器中彼此电连接。
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47.发明申请公开(公告)号：US20080310078A1
公开(公告)日：2008-12-18
申请号：US12155805
申请日：2008-06-10
申请人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
发明人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
IPC分类号： H01G4/232
摘要： Disclosed is a method of implementing controlled equivalent series resistance (ESR) having low equivalent series inductance (ESL) of a multi-layer chip capacitor which includes a plurality of internal electrodes each having first polarity or second polarity which is opposite to the first polarity, and dielectric layers each disposed between the internal electrodes of the first polarity and the second polarity, wherein the internal electrodes having the first polarity and the internal electrodes having the second polarity are alternated at least once to form one or more blocks being stacked.
摘要翻译： 公开了一种实现具有低等效串联电感（ESL）的受控等效串联电阻（ESR）的方法，该多层片式电容器包括多个内部电极，每个内部电极具有与第一极性相反的第一极性或第二极性， 以及介电层，其各自设置在第一极性和第二极性的内部电极之间，其中具有第一极性的内部电极和具有第二极性的内部电极至少交替一次以形成一个或多个堆叠的块。
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公开(公告)号：US07292430B2
公开(公告)日：2007-11-06
申请号：US11272877
申请日：2005-11-15
申请人： Byoung Hwa Lee , Chang Hoon Shim , Kyong Nam Hwang , Dong Seok Park , Sang Soo Park , Min Cheol Park
发明人： Byoung Hwa Lee , Chang Hoon Shim , Kyong Nam Hwang , Dong Seok Park , Sang Soo Park , Min Cheol Park
IPC分类号： H01G4/228
摘要： A multi-layer chip capacitor includes a capacitor body; first and second internal electrodes alternately arranged therein and separated by dielectric layers, each of the internal electrodes having at least one opening formed at one or more sides thereof; first and second conductive vias passing through the openings and electrically connected to the first and second internal electrodes, respectively; first and second terminal electrodes of opposite polarities formed on one or more side faces of the capacitor body; and first and second lowermost electrode patterns being coplanar, each pattern including a via contact portion and a lead portion extending therefrom. The first and second lowermost electrode patterns are connected to the first and second terminal electrodes, respectively, through the respective lead portions of the lowermost patterns.
摘要翻译： 多层片式电容器包括电容器体; 第一和第二内部电极交替地布置在其中并由电介质层分离，每个内部电极具有形成在其一侧或多侧的至少一个开口; 第一和第二导电通孔分别穿过开口并电连接到第一和第二内部电极; 形成在电容器主体的一个或多个侧面上的相反极性的第一和第二端子电极; 并且第一和第二最低电极图案是共面的，每个图案包括通孔接触部分和从其延伸的引线部分。 第一和第二最下面的电极图案分别通过最下面图案的相应引线部分连接到第一和第二端子电极。
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公开(公告)号：US07046500B2
公开(公告)日：2006-05-16
申请号：US11068757
申请日：2005-03-02
申请人： Byoung Hwa Lee , Dong Seok Park , Min Cheol Park , Sang Soo Park , Chang Hoon Shim , Kyung Nam Hwang
发明人： Byoung Hwa Lee , Dong Seok Park , Min Cheol Park , Sang Soo Park , Chang Hoon Shim , Kyung Nam Hwang
摘要： A laminated ceramic capacitor includes a ceramic block formed by laminating a plurality of ceramic sheets, a plurality of external electrodes formed on outer surfaces of the ceramic block facing each other, and set as a positive terminal and a negative terminal, respectively, one or more first and second internal electrodes alternately arranged within the ceramic block such that electric currents flow in opposite directions in the internal electrodes, and a plurality of withdrawing patterns for connecting the first and second internal electrodes to the external electrodes, respectively.
摘要翻译： 层叠陶瓷电容器包括通过层叠多个陶瓷片而形成的陶瓷块，形成在彼此相对的陶瓷块的外表面上的多个外部电极，分别设置为正极端子和负极端子，一个或多个 第一和第二内部电极交替地布置在陶瓷块内，使得电流在内部电极中沿相反方向流动，以及多个用于将第一和第二内部电极连接到外部电极的抽出图案。
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公开(公告)号：US06940710B1
公开(公告)日：2005-09-06
申请号：US11029677
申请日：2005-01-06
摘要： A multilayered chip capacitor including a capacitor main body including a plurality of dielectric layers, which are laminated; at least one pair of first and second internal electrodes, each of which is formed on the corresponding one of the plural dielectric layers and includes at least one lead extended to one end of the corresponding dielectric layer; a plurality of external terminals formed on the outer surface of the capacitor main body, and respectively connected to the first and second internal electrodes through the leads; and at least one opened region, formed through the inner area of each of the first and second internal electrodes, for branching the flow of current so as to increase the offset quantity of parasitic inductances between the first and second internal electrodes.
摘要翻译： 一种多层片状电容器，其包括层叠有多个电介质层的电容器主体; 至少一对第一和第二内部电极，每个所述第一和第二内部电极形成在所述多个电介质层中的相应一个上，并且包括至少一个延伸到所述相应电介质层的一端的引线; 多个外部端子，形成在电容器主体的外表面上，分别通过引线连接到第一和第二内部电极; 以及通过第一和第二内部电极的每一个的内部区域形成的至少一个开放区域，用于分流电流，以增加第一和第二内部电极之间的寄生电感的偏移量。
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