公开(公告)号：US20110051517A1

公开(公告)日：2011-03-03

申请号：US12547449

申请日：2009-08-25

申请人： Man Mui ,  Yingda Dong ,  Binh Le ,  Deepanshu Dutta

发明人： Man Mui ,  Yingda Dong ,  Binh Le ,  Deepanshu Dutta

IPC分类号： G11C16/04 ,  G11C16/06

CPC分类号： G11C11/5628 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/3418 ,  G11C16/3427

摘要： Partial speed and full speed programming are achieved for a non-volatile memory system. During a program operation, in a first time period, bit lines of storage elements to be inhibited are pre-charged, while bit line of storage elements to be programmed at a partial speed and bit lines of storage elements to be programmed at a full speed are fixed. In a second time period, the bit lines of storage elements to be programmed at the partial speed are driven higher, while the bit lines of storage elements to be inhibited are floated and the bit line of storage elements to be programmed remain fixed. In a third time period, the bit lines of storage elements to be inhibited are driven higher while the bit lines of the storage elements to be programmed at the partial speed or the full speed are floated so that they couple higher.

摘要翻译： 非易失性存储器系统实现了部分速度和全速编程。 在编程操作期间，在第一时间段中，要禁止的存储元件的位线被预充电，而要以部分速度编程的存储元件的位线和要全速编程的存储元件的位线 是固定的 在第二时间段中，以部分速度编程的存储元件的位线被驱动得较高，而待禁止的存储元件的位线被浮置，并且待编程的存储元件的位线保持固定。 在第三时间段中，待被禁止的存储元件的位线被驱动得较高，而以部分速度或全速编程的存储元件的位线被浮动，使得它们耦合得更高。

公开(公告)号：US07719902B2

公开(公告)日：2010-05-18

申请号：US12126375

申请日：2008-05-23

申请人： Yingda Dong ,  Man L. Mui ,  Jeffrey W. Lutze ,  Shinji Sato ,  Gerrit Jan Hemink

发明人： Yingda Dong ,  Man L. Mui ,  Jeffrey W. Lutze ,  Shinji Sato ,  Gerrit Jan Hemink

IPC分类号： G11C16/06

CPC分类号： G11C11/5628 ,  G11C16/0483 ,  G11C16/32 ,  G11C16/3418 ,  G11C16/3427

摘要： Channel boosting is improved in non-volatile storage to reduce program disturb. A pre-charge module voltage source is used to pre-charge bit lines during a programming operation. The pre-charge module voltage source is coupled to a substrate channel via the bit lines to boost the channel. An additional source of boosting is provided by electromagnetically coupling a voltage from a conductive element to the bit lines and the channel. To achieve this, the bit lines and the channel are allowed to float together by disconnecting the bit lines from the voltage sources. The conductive element can be a source line, power supply line or substrate body, for instance, which receives an increasing voltage during the pre-charging and is proximate to the bit lines.

摘要翻译： 在非易失性存储器中改善通道增强以减少程序干扰。 预充电模块电压源用于在编程操作期间对位线进行预充电。 预充电模块电压源通过位线耦合到衬底通道以升高通道。 通过将来自导电元件的电压电磁耦合到位线和通道来提供额外的升压源。 为了实现这一点，通过将位线与电压源断开来允许位线和通道浮动在一起。 导电元件可以是例如在预充电期间接收增加的电压并且靠近位线的源极线，电源线或衬底主体。

公开(公告)号：US07706189B2

公开(公告)日：2010-04-27

申请号：US11753963

申请日：2007-05-25

申请人： Yingda Dong ,  Jeffrey W. Lutze ,  Dana Lee

发明人： Yingda Dong ,  Jeffrey W. Lutze ,  Dana Lee

IPC分类号： G11C16/04

CPC分类号： G11C16/0483 ,  G11C16/10 ,  G11C16/12

摘要： To program one or more non-volatile storage elements, a set of programming pulses are applied to at least one selected non-volatile storage element and one or more particular unselected non-volatile storage elements, for example, via a common word line. A boosting voltage is applied to other unselected non-volatile storage elements during the programming process in order to boost the channels of the unselected non-volatile storage elements so that programming will be inhibited. Each of the programming pulses has a first intermediate magnitude, a second intermediate magnitude and a third magnitude. In one embodiment, the first intermediate magnitude is similar to or the same as the boosting voltage. The second intermediate magnitude is greater than the first intermediate magnitude, but less then the third magnitude. Such an arrangement can reduce the effects of program disturb.

摘要翻译： 为了对一个或多个非易失性存储元件进行编程，例如通过公共字线将一组编程脉冲施加到至少一个选定的非易失性存储元件和一个或多个特定未选择的非易失性存储元件。 在编程过程期间将升压电压施加到其它未选择的非易失性存储元件，以便增强未选择的非易失性存储元件的通道，从而禁止编程。 每个编程脉冲具有第一中间幅度，第二中间幅度和第三幅度。 在一个实施例中，第一中间幅度与升压电压相似或相同。 第二中间幅度大于第一中间幅度，但小于第三幅度。 这样的布置可以减少节目干扰的影响。

公开(公告)号：US07656703B2

公开(公告)日：2010-02-02

申请号：US11753958

申请日：2007-05-25

申请人： Yingda Dong ,  Jeffrey W. Lutze ,  Dana Lee

发明人： Yingda Dong ,  Jeffrey W. Lutze ,  Dana Lee

IPC分类号： G11C16/04

CPC分类号： G11C16/12 ,  G11C16/0483 ,  G11C16/10

摘要： To program one or more non-volatile storage elements, a set of programming pulses are applied to at least one selected non-volatile storage element and one or more particular unselected non-volatile storage elements, for example, via a common word line. A boosting voltage is applied to other unselected non-volatile storage elements during the programming process in order to boost the channels of the unselected non-volatile storage elements so that programming will be inhibited. Each of the programming pulses has a first intermediate magnitude, a second intermediate magnitude and a third magnitude. In one embodiment, the first intermediate magnitude is similar to or the same as the boosting voltage. The second intermediate magnitude is greater than the first intermediate magnitude, but less then the third magnitude. Such an arrangement can reduce the effects of program disturb.

摘要翻译： 为了对一个或多个非易失性存储元件进行编程，例如通过公共字线将一组编程脉冲施加到至少一个选定的非易失性存储元件和一个或多个特定未选择的非易失性存储元件。 在编程过程期间将升压电压施加到其它未选择的非易失性存储元件，以便增强未选择的非易失性存储元件的通道，使得编程将被禁止。 每个编程脉冲具有第一中间幅度，第二中间幅度和第三幅度。 在一个实施例中，第一中间幅度与升压电压相似或相同。 第二中间幅度大于第一中间幅度，但小于第三幅度。 这样的布置可以减少节目干扰的影响。

公开(公告)号：US07623386B2

公开(公告)日：2009-11-24

申请号：US11609804

申请日：2006-12-12

申请人： Yingda Dong ,  Jeffrey W. Lutze

发明人： Yingda Dong ,  Jeffrey W. Lutze

IPC分类号： G11C16/04

CPC分类号： G11C16/3418 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/3427 ,  G11C2211/565

摘要： Program disturb is reduced in non-volatile storage by boosting unselected NAND strings in an array so that a source side channel, on a source side of a selected word line, is boosted before a drain side channel, on a drain side of the selected word line. In one approach, a first boost mode is used when the selected word line is a lower or intermediate word line. In the first boost mode, boosting of the source and drain side channels is initiated concurrently. A second boost mode is used when the selected word line is a higher word line. In the second boost mode, boosting of the source side channel occurs early relative to the boosting of the drain side channel. Either boost mode include an isolation voltage which tends to isolate the source and drain side channels from one another.

摘要翻译： 在非易失性存储器中通过升高阵列中的未选择的NAND串来减少非易失性存储器中的编程干扰，使得在所选字线的漏极侧之前，在所选字线的源极侧的源极通道被提升在漏极侧通道之前 线。 在一种方法中，当所选字线是较低或中间字线时，使用第一升压模式。 在第一升压模式中，同时启动源极和漏极侧通道的升压。 当所选字线是较高字线时，使用第二升压模式。 在第二升压模式中，源极侧沟道的升压相对于漏极侧沟道的升压而早期发生。 升压模式包括易于将源极和漏极侧通道彼此隔离的隔离电压。

公开(公告)号：US07577026B2

公开(公告)日：2009-08-18

申请号：US12060487

申请日：2008-04-01

申请人： Yingda Dong ,  Jeffrey W. Lutze

发明人： Yingda Dong ,  Jeffrey W. Lutze

IPC分类号： G11C16/12

CPC分类号： G11C16/3418

摘要： Program disturb is reduced during programming of non-volatile storage by providing a boosting scheme in which isolation voltage are applied to two word lines to create a source side channel region on a source side of one isolation word line, an intermediate channel region between the isolation word lines and a drain side channel region on a drain side of the other isolation word line. Further, during a programming operation, the source and drain side channel regions are boosted early while the intermediate channel region is boosted later, when a program pulse is applied. This approach prevents charge leakage from the intermediate channel region to the source side, avoiding disturb of already programmed storage elements, while also allowing electrons to flow from the intermediate channel region to the drain side channel region, which makes the boosting of the intermediate channel region easier.

摘要翻译： 在非易失性存储器的编程期间通过提供一种升压方案来减少在非易失性存储器编程期间的编程干扰，其中隔离电压施加到两个字线以在一个隔离字线的源极侧产生源极侧沟道区，隔离层之间的中间沟道区 字线和另一个隔离字线的漏极侧的漏极侧沟道区。 此外，在编程操作期间，当施加编程脉冲时，源极和漏极侧通道区域早期被提升，而中间沟道区域稍后升压。 这种方法防止从中间通道区域到源极的电荷泄漏，避免已经编程的存储元件的干扰，同时还允许电子从中间沟道区域流到漏极侧沟道区域，这使得中间沟道区域的升压 更轻松。

公开(公告)号：US20090010065A1

公开(公告)日：2009-01-08

申请号：US12211348

申请日：2008-09-16

申请人： Jeffrey W. Lutze ,  Yingda Dong

发明人： Jeffrey W. Lutze ,  Yingda Dong

IPC分类号： G11C16/10

CPC分类号： G11C16/3418

摘要： A non-volatile storage system which reduces program disturb. Multiple boosting modes are implemented while programming non-volatile storage. For example, self-boosting, local self-boosting, erased area self-boosting and revised erased area self-boosting may be used. One or more switching criteria are used to determine when to switch to a different boosting mode. The boosting mode may be used to prevent program disturb in unselected NAND strings while storage elements are being programmed in selected NAND strings. By switching boosting modes, an optimal boosting mode can be used as conditions change. The boosting mode can be switched based on various criteria such as program pulse number, program pulse amplitude, program pass number, the position of a selected word line, whether coarse or fine programming is used, whether a storage element reaches a program condition and/or a number of program cycles of the non-volatile storage device.

摘要翻译： 一种减少程序干扰的非易失性存储系统。 在编程非易失性存储时实现多种升压模式。 例如，可以使用自我增强，局部自我增强，消除区域自增强和修改的擦除区域自增强。 使用一个或多个切换标准来确定何时切换到不同的升压模式。 当存储元件被编程在所选择的NAND串中时，升压模式可用于防止未选择的NAND串中的程序干扰。 通过切换升压模式，可以在条件变化时使用最佳升压模式。 可以基于各种标准来切换升压模式，例如程序脉冲数，程序脉冲幅度，程序通过次数，所选字线的位置，是使用粗调还是精细编程，存储元件是否达到程序状态和/ 或非易失性存储设备的多个程序周期。

公开(公告)号：US07463531B2

公开(公告)日：2008-12-09

申请号：US11618606

申请日：2006-12-29

申请人： Gerrit Jan Hemink ,  Yingda Dong ,  Jeffrey W. Lutze ,  Dana Lee

发明人： Gerrit Jan Hemink ,  Yingda Dong ,  Jeffrey W. Lutze ,  Dana Lee

IPC分类号： G11C16/06

CPC分类号： G11C16/3418 ,  G11C7/1048 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/3427

摘要： Unselected groups of non-volatile storage elements are boosted during programming to reduce or eliminate program disturb for targeted, but unselected memory cells connected to a selected word line. Prior to applying a program voltage to the selected word line and boosting the unselected groups, the unselected groups are pre-charged to further reduce or eliminate program disturb by providing a larger boosted potential for the unselected groups. During pre-charging, one or more pre-charge enable signals are provided at different voltages for particular non-volatile storage elements.

摘要翻译： 在编程期间，未选择的非易失性存储元件组被提升以减少或消除连接到所选字线的目标但未选择的存储器单元的程序干扰。 在将程序电压施加到所选择的字线并升高未选择的组之前，未选择的组被预先充电，以通过为未选择的组提供更大的增强电位来进一步减少或消除程序干扰。 在预充电期间，对于特定的非易失性存储元件，以不同的电压提供一个或多个预充电使能信号。

公开(公告)号：US07460404B1

公开(公告)日：2008-12-02

申请号：US11745082

申请日：2007-05-07

申请人： Yingda Dong ,  Jeffrey W. Lutze ,  Shih-Chung Lee ,  Gerrit Jan Hemink ,  Ken Oowada

发明人： Yingda Dong ,  Jeffrey W. Lutze ,  Shih-Chung Lee ,  Gerrit Jan Hemink ,  Ken Oowada

IPC分类号： G11C16/00

CPC分类号： G11C16/12 ,  G11C16/0483

摘要： Program disturb is reduced in non-volatile storage by preventing source side boosting in selected NAND strings. A self-boosting mode which includes an isolation word line is used. A channel area of an inhibited NAND string is boosted on a source side of the isolation word line before the channel is boosted on a drain side of the isolation word line. Further, storage elements near the isolation word line are kept in a conducting state during the source side boosting so that the source side channel is connected to the drain side channel. In this way, in selected NAND strings, source side boosting can not occur and thus program disturb due to source side boosting can be prevented. After the source side boosting, the source side channel is isolated from the drain side channel, and drain side boosting is performed.

摘要翻译： 在非易失性存储器中通过防止所选择的NAND串中的源极升压来减少编程干扰。 使用包括隔离字线的自增强模式。 禁止的NAND串的通道区域在隔离字线的漏极侧的通道升压之前在隔离字线的源极侧被升压。 此外，在源侧升压期间，隔离字线附近的存储元件保持导通状态，使得源极侧沟道连接到漏极侧沟道。 以这种方式，在选择的NAND串中，不能发生源侧升压，因此可以防止由于源极侧升压而导致的编程干扰。 在源侧升压之后，源侧沟道与漏极侧沟道隔离，并且进行漏极侧升压。

公开(公告)号：US20080291736A1

公开(公告)日：2008-11-27

申请号：US11753963

申请日：2007-05-25

申请人： Yingda Dong ,  Jeffrey W. Lutze ,  Dana Lee

发明人： Yingda Dong ,  Jeffrey W. Lutze ,  Dana Lee

IPC分类号： G11C11/34

CPC分类号： G11C16/0483 ,  G11C16/10 ,  G11C16/12

摘要： To program one or more non-volatile storage elements, a set of programming pulses are applied to at least one selected non-volatile storage element and one or more particular unselected non-volatile storage elements, for example, via a common word line. A boosting voltage is applied to other unselected non-volatile storage elements during the programming process in order to boost the channels of the unselected non-volatile storage elements so that programming will be inhibited. Each of the programming pulses has a first intermediate magnitude, a second intermediate magnitude and a third magnitude. In one embodiment, the first intermediate magnitude is similar to or the same as the boosting voltage. The second intermediate magnitude is greater than the first intermediate magnitude, but less then the third magnitude. Such an arrangement can reduce the effects of program disturb.

摘要翻译： 为了对一个或多个非易失性存储元件进行编程，例如通过公共字线将一组编程脉冲施加到至少一个选定的非易失性存储元件和一个或多个特定未选择的非易失性存储元件。 在编程过程期间将升压电压施加到其它未选择的非易失性存储元件，以便增强未选择的非易失性存储元件的通道，从而禁止编程。 每个编程脉冲具有第一中间幅度，第二中间幅度和第三幅度。 在一个实施例中，第一中间幅度与升压电压相似或相同。 第二中间幅度大于第一中间幅度，但小于第三幅度。 这样的布置可以减少节目干扰的影响。