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公开(公告)号：US09135181B2
公开(公告)日：2015-09-15
申请号：US13280869
申请日：2011-10-25
CPC分类号： G06F12/0888 , G06F12/0246
摘要： A method for managing cache memory in a flash cache architecture. The method includes providing a storage cache controller, at least a flash memory comprising a flash controller, and at least a backend storage device, and maintaining read cache metadata for tracking on the flash memory cached data to be read, and write cache metadata for tracking on the flash memory data expected to be cached.
摘要翻译： 一种用于在闪存缓存架构中管理高速缓存存储器的方法。 该方法包括提供存储高速缓存控制器，至少包括闪存控制器的闪速存储器，以及至少后端存储设备，并且维护读取高速缓存元数据，用于跟踪要读取的闪速存储器缓存的数据，以及写入用于跟踪的高速缓存元数据 闪存数据预计将被缓存。
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公开(公告)号：US09037951B2
公开(公告)日：2015-05-19
申请号：US13516627
申请日：2010-12-16
申请人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Robert Haas , Xiao-Yu Hu , Ilias Iliadas , Thomas Mittelholzer
发明人： Roy D. Cideciyan , Evangelos S. Eleftheriou , Robert Haas , Xiao-Yu Hu , Ilias Iliadas , Thomas Mittelholzer
CPC分类号： G06F11/1008 , G06F11/1012 , G06F11/1068 , G06F11/108
摘要： Methods and apparatus are provided for controlling data management operations including storage of data in solid state storage of a solid state storage system. Input data is stored in successive groups of data write locations in the solid state storage. Each group comprises a set of write locations in each of a plurality of logical subdivisions of the solid state storage. The input data to be stored in each group is encoded in accordance with first and second linear error correction codes. The encoding is performed by constructing from the input data to be stored in each group a logical array of rows and columns of data symbols. The rows and columns are respectively encoded in accordance with the first and second linear error correction codes to produce an encoded array in which all rows correspond to respective first codewords and columns correspond to respective second codewords.
摘要翻译： 提供了用于控制数据管理操作的方法和装置，包括固态存储系统的固态存储中的数据的存储。 输入数据存储在固态存储器中的连续的数据写入位置组中。 每个组包括在固态存储器的多个逻辑子部分的每一个中的一组写入位置。 要存储在每个组中的输入数据根据第一和第二线性纠错码进行编码。 通过从输入数据中构成数据符号的行和列的逻辑阵列，来构成编码。 行和列分别根据第一和第二线性纠错码编码以产生编码阵列，其中所有行对应于相应的第一码字和列对应于相应的第二码字。
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公开(公告)号：US20150052413A1
公开(公告)日：2015-02-19
申请号：US14358609
申请日：2011-05-25
申请人： Evangelos S. Eleftheriou , Robert Haas , Xiao-Yu Hu , Dung Nguyen
发明人： Evangelos S. Eleftheriou , Robert Haas , Xiao-Yu Hu , Dung Nguyen
IPC分类号： H03M13/11
CPC分类号： H03M13/1105 , H03M13/1108 , H03M13/2957
摘要： It is provided a method for decoding a sequence of bits encoded by a LPDC code. The method comprises providing a set of bit states, including a first state and a second state, and a set of conditions to change a bit state including a first condition 5 and a second condition. The first condition and the second condition are different. The method comprises reading the value of each bit of the sequence, associating each bit to a respective state of the set according to the values as read, determining that an evaluated condition is met and changing the state of the target bit as a result of the condition being met. The method may then set the value of the target bit of the 10 sequence according to the state thereof. Such a method provides a solution for decoding a sequence of bits encoded by a LDPC code with better performance than the classic bit-flipping algorithm with only a slight increase in complexity.
摘要翻译： 提供了一种用于解码由LPDC码编码的比特序列的方法。 该方法包括提供一组位状态，包括第一状态和第二状态，以及一组条件以改变包括第一条件5和第二状态的位状态。 第一个条件和第二个条件是不同的。 该方法包括读取序列的每个比特的值，根据读取的值将每个比特与组的相应状态相关联，确定满足评估条件并改变目标比特的状态作为结果 条件得到满足 然后，该方法可以根据其状态设置10序列的目标比特的值。 这种方法提供了一种解码方案，用于以比典型的比特翻转算法更好的性能来解码由LDPC码编码的比特序列，只有稍微增加的复杂度。
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公开(公告)号：US08930624B2
公开(公告)日：2015-01-06
申请号：US13412412
申请日：2012-03-05
申请人： Michael T. Benhase , Stephen L. Blinick , Evangelos S. Eleftheriou , Lokesh M. Gupta , Robert Haas , Xiao-Yu Hu , Ioannis Koltsidas , Roman A. Pletka
发明人： Michael T. Benhase , Stephen L. Blinick , Evangelos S. Eleftheriou , Lokesh M. Gupta , Robert Haas , Xiao-Yu Hu , Ioannis Koltsidas , Roman A. Pletka
CPC分类号： G06F12/128 , G06F12/126
摘要： Provided are a computer program product, system, and method for managing data in a first cache and a second cache. A reference count is maintained in the second cache for the page when the page is stored in the second cache. It is determined that the page is to be promoted from the second cache to the first cache. In response to determining that the reference count is greater than zero, the page is added to a Least Recently Used (LRU) end of an LRU list in the first cache. In response to determining that the reference count is less than or equal to zero, the page is added to a Most Recently Used (LRU) end of the LRU list in the first cache.
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公开(公告)号：US08688897B2
公开(公告)日：2014-04-01
申请号：US13080655
申请日：2011-04-05
CPC分类号： G06F12/0246 , G06F12/0871 , G06F12/0897 , G06F2212/222 , G06F2212/7202
摘要： Provided are a system, method, and computer program product for managing cache memory to cache data units in at least one storage device. A cache controller is coupled to at least two flash bricks, each comprising a flash memory. Metadata indicates a mapping of the data units to the flash bricks caching the data units, wherein the metadata is used to determine the flash bricks on which the cache controller caches received data units. The metadata is updated to indicate the flash brick having the flash memory on which data units are cached.
摘要翻译： 提供了一种用于管理高速缓冲存储器以在至少一个存储设备中缓存数据单元的系统，方法和计算机程序产品。 高速缓存控制器耦合到至少两个闪存块，每个闪存块包括闪存。 元数据表示数据单元与缓存数据单元的闪存块的映射，其中元数据用于确定高速缓存控制器高速缓存接收的数据单元的闪存块。 更新元数据以指示闪存块具有缓存数据单元的闪存。
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46.发明授权Optimizing locations of data accessed by client applications interacting with a storage system 有权优化与存储系统交互的客户端应用程序访问的数据的位置公开(公告)号：US08661196B2
公开(公告)日：2014-02-25
申请号：US13209514
申请日：2011-08-15
申请人： Evangelos S. Eleftheriou , Robert Galbraith , Adrian C. Gerhard , Robert Haas , Xiao-Yu Hu , Murali N. Iyer , Ioannis Koltsidas , Timothy J. Larson , Steven P. Norgaard , Roman Pletka
发明人： Evangelos S. Eleftheriou , Robert Galbraith , Adrian C. Gerhard , Robert Haas , Xiao-Yu Hu , Murali N. Iyer , Ioannis Koltsidas , Timothy J. Larson , Steven P. Norgaard , Roman Pletka
IPC分类号： G06F12/00
CPC分类号： G06F11/1076 , G06F3/061 , G06F3/0662 , G06F3/0685
摘要： A method for optimizing locations of physical data accessed by one or more client applications interacting with a storage system, with the storage system comprising at least two redundancy groups having physical memory spaces and data bands. Each of the data bands corresponds to physical data stored on several of the physical memory spaces. A virtualized logical address space includes client data addresses utilizable by the one or more client applications. A storage controller is configured to map the client data addresses onto the data bands, such that a mapping is obtained, wherein the one or more client applications can access physical data corresponding to the data bands.
摘要翻译： 一种用于优化由与存储系统交互的一个或多个客户端应用访问的物理数据的位置的方法，其中所述存储系统包括具有物理存储器空间和数据带的至少两个冗余组。 每个数据带对应于存储在几个物理存储器空间上的物理数据。 虚拟化逻辑地址空间包括由一个或多个客户端应用程序可使用的客户机数据地址。 存储控制器被配置为将客户端数据地址映射到数据带上，使得获得映射，其中一个或多个客户端应用可以访问对应于数据带的物理数据。
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公开(公告)号：US08402242B2
公开(公告)日：2013-03-19
申请号：US12511577
申请日：2009-07-29
IPC分类号： G06F12/00
CPC分类号： B62D35/001 , G06F12/0246 , G06F2212/1044 , G06F2212/7205 , G06F2212/7211 , G11C16/349 , G11C16/3495
摘要： A memory management system and method for managing memory blocks of a memory device of a computer. The system includes a free block data structure including free memory blocks for writing, and sorting the free memory blocks in a predetermined order based on block write-erase endurance cycle count and receiving new user-write requests to update existing data and relocation write requests to relocate existing data separately, a user-write block pool for receiving youngest blocks holding user-write data (i.e., any page being updated frequently) from the free block data structure, a relocation block pool for receiving oldest blocks holding relocation data (i.e., any page being updated infrequently) from the free block data structure, and a garbage collection pool structure for selecting at least one of user-write blocks and relocation blocks for garbage collection, wherein the selected block is moved back to the free block data structure upon being relocated and erased.
摘要翻译： 一种用于管理计算机的存储器件的存储器块的存储器管理系统和方法。 该系统包括一个空闲块数据结构，包括用于写入的空闲存储器块，并且基于块写擦除耐久循环计数以预定顺序对可用存储器块进行排序，并且接收新的用户写入请求以更新现有数据和重定位写请求 重新定位现有数据，用于从空闲块数据结构接收持有用户写入数据（即，任何频繁更新的页面）的最小块的用户写入块池，用于接收保存重定位数据的最旧块的重定位块池（即， 任何不经常更新的页面）以及用于选择用于垃圾回收的用户写入块和重定位块中的至少一个的垃圾收集池结构，其中所选择的块被移动回到空闲块数据结构 被搬迁和删除。
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公开(公告)号：US08285946B2
公开(公告)日：2012-10-09
申请号：US12637897
申请日：2009-12-15
IPC分类号： G06F13/26
CPC分类号： G06F12/0246 , G06F2212/7208
摘要： Exemplary embodiments include a method for reducing access contention in a flash-based memory system, the method including selecting a chip stripe in a free state, from a memory device having a plurality of channels and a plurality of memory blocks, wherein the chip stripe includes a plurality of pages, setting the ship stripe to a write state, setting a write queue head in each of the plurality of channels, for each of the plurality of channels in the flash stripe, setting a write queue head to a first free page in a chip belonging to the channel from the chip stripe, allocating write requests according to a write allocation scheduler among the channels, generating a page write and in response to the page write, incrementing the write queue head, and setting the chip stripe into an on-line state when it is full.
摘要翻译： 示例性实施例包括一种用于减少基于闪存的存储器系统中的访问争用的方法，该方法包括从具有多个信道的存储器件和多个存储器块中选择处于空闲状态的芯片条带，其中芯片条带包括 多个页面，将所述条纹设置为写入状态，为所述多个通道中的每一个设置所述多个通道中的每一个中的写入队列头部，将所述写入队列头部设置到所述第一自由页面中的第一自由页面 属于来自芯片条带的信道的芯片，根据写入分配调度器在信道之间分配写请求，产生页写入，并响应于页写，增加写队列头，并将片段条设置为on 线状态当它满了。
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公开(公告)号：US20120110247A1
公开(公告)日：2012-05-03
申请号：US13280869
申请日：2011-10-25
IPC分类号： G06F12/02
CPC分类号： G06F12/0888 , G06F12/0246
摘要： A method for managing cache memory in a flash cache architecture. The method includes providing a storage cache controller, at least a flash memory comprising a flash controller, and at least a backend storage device, and maintaining read cache metadata for tracking on the flash memory cached data to be read, and write cache metadata for tracking on the flash memory data expected to be cached.
摘要翻译： 一种用于在闪存缓存架构中管理高速缓冲存储器的方法。 该方法包括提供存储高速缓存控制器，至少包括闪存控制器的闪速存储器，以及至少后端存储设备，并且维护读取高速缓存元数据，用于跟踪要读取的闪速存储器缓存的数据，以及写入用于跟踪的高速缓存元数据 闪存数据预计将被缓存。
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50.发明申请CONTAINER MARKER SCHEME FOR REDUCING WRITE AMPLIFICATION IN SOLID STATE DEVICES 有权用于减少固体装置中的写入放大的集装箱标记方案公开(公告)号：US20110066788A1
公开(公告)日：2011-03-17
申请号：US12559959
申请日：2009-09-15
CPC分类号： G11C16/349 , G11C16/3495
摘要： A solid state storage device and method are provided. Multiple blocks are configured as storage memory for a solid state storage device, and each block includes multiple pages. A controller is configured to operate the solid state storage device. A free block of the multiple blocks is assigned a marker level by the controller. For a particular page of the multiple pages, each particular page of data is written to a block of the multiple blocks with a marker level corresponding to a level of dynamicity calculated by the controller for that particular page.
摘要翻译： 提供了一种固态存储装置和方法。 多个块被配置为固态存储设备的存储存储器，并且每个块包括多个页面。 控制器被配置为操作固态存储设备。 多个块的空闲块由控制器分配一个标记级别。 对于多页的特定页面，每个特定的数据页面被写入多个块的块，其中标记级别对应于由该控制器为该特定页面计算的动态水平。
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