Data management in solid state storage devices
    1.
    发明授权
    Data management in solid state storage devices 有权
    固态存储设备中的数据管理

    公开(公告)号:US09176817B2

    公开(公告)日:2015-11-03

    申请号:US13617571

    申请日:2012-09-14

    IPC分类号: G11C29/00 G06F11/10 H03M13/05

    摘要: A mechanism is provided for controlling a solid state storage device in which the solid state storage comprises erasable blocks each comprising a plurality of data write locations. Input data is stored in successive groups of data write locations, each group comprising write locations in a set of erasable blocks in each of a plurality of logical subdivisions of the solid state storage. The input data is error correction encoded such that each group contains an error correction code for the input data in that group. Metadata, indicating the location of input data in the solid state storage, is maintained in memory. An indication of validity of data stored in each data write location is also maintained. Prior to erasing a block, valid input data is recovered from the group containing write locations in that block. The recovered data is then re-stored as new input data.

    摘要翻译: 提供一种用于控制固态存储装置的机构,其中固态存储器包括每个包括多个数据写入位置的可擦除块。 输入数据被存储在连续的数据写入位置组中,每个组包括在固态存储器的多个逻辑分区中的每一个中的一组可擦除块中的写入位置。 输入数据被纠错编码,使得每个组包含用于该组中的输入数据的纠错码。 指示固态存储器中的输入数据的位置的元数据被保存在存储器中。 还保持了存储在每个数据写入位置中的数据的有效性的指示。 在擦除块之前,从包含该块中的写入位置的组中恢复有效的输入数据。 然后将恢复的数据重新存储为新的输入数据。

    Data Management in Solid State Storage Devices
    4.
    发明申请
    Data Management in Solid State Storage Devices 有权
    固态存储设备中的数据管理

    公开(公告)号:US20120266050A1

    公开(公告)日:2012-10-18

    申请号:US13516053

    申请日:2010-12-16

    IPC分类号: H03M13/05 G06F11/10

    摘要: A mechanism is provided for controlling a solid state storage device in which the solid state storage comprises erasable blocks each comprising a plurality of data write locations. Input data is stored in successive groups of data write locations, each group comprising write locations in a set of erasable blocks in each of a plurality of logical subdivisions of the solid state storage. The input data is error correction encoded such that each group contains an error correction code for the input data in that group. Metadata, indicating the location of input data in the solid state storage, is maintained in memory, An indication of validity of data stored in each data write location is also maintained, Prior to erasing a block, valid input data is recovered from the or each said group containing write locations in that block. The recovered data is then re-stored as new input data.

    摘要翻译: 提供了一种用于控制固态存储装置的机构,其中固态存储器包括每个包括多个数据写入位置的可擦除块。 输入数据被存储在连续的数据写入位置组中,每个组包括在固态存储器的多个逻辑分区中的每一个中的一组可擦除块中的写入位置。 输入数据被纠错编码,使得每个组包含用于该组中的输入数据的纠错码。 指示固态存储器中的输入数据的位置的元数据被保持在存储器中,还保持存储在每个数据写入位置中的数据的有效性的指示。在擦除块之前,有效的输入数据从该或每个 该组在该块中包含写入位置。 然后将恢复的数据重新存储为新的输入数据。

    Data management in solid state storage systems
    6.
    发明授权
    Data management in solid state storage systems 有权
    固态存储系统中的数据管理

    公开(公告)号:US09037951B2

    公开(公告)日:2015-05-19

    申请号:US13516627

    申请日:2010-12-16

    IPC分类号: G06F11/10 G11C29/00

    摘要: Methods and apparatus are provided for controlling data management operations including storage of data in solid state storage of a solid state storage system. Input data is stored in successive groups of data write locations in the solid state storage. Each group comprises a set of write locations in each of a plurality of logical subdivisions of the solid state storage. The input data to be stored in each group is encoded in accordance with first and second linear error correction codes. The encoding is performed by constructing from the input data to be stored in each group a logical array of rows and columns of data symbols. The rows and columns are respectively encoded in accordance with the first and second linear error correction codes to produce an encoded array in which all rows correspond to respective first codewords and columns correspond to respective second codewords.

    摘要翻译: 提供了用于控制数据管理操作的方法和装置,包括固态存储系统的固态存储中的数据的存储。 输入数据存储在固态存储器中的连续的数据写入位置组中。 每个组包括在固态存储器的多个逻辑子部分的每一个中的一组写入位置。 要存储在每个组中的输入数据根据第一和第二线性纠错码进行编码。 通过从输入数据中构成数据符号的行和列的逻辑阵列,来构成编码。 行和列分别根据第一和第二线性纠错码编码以产生编码阵列,其中所有行对应于相应的第一码字和列对应于相应的第二码字。

    DECODING OF LDPC CODE
    7.
    发明申请
    DECODING OF LDPC CODE 有权
    LDPC码的解码

    公开(公告)号:US20150052413A1

    公开(公告)日:2015-02-19

    申请号:US14358609

    申请日:2011-05-25

    IPC分类号: H03M13/11

    摘要: It is provided a method for decoding a sequence of bits encoded by a LPDC code. The method comprises providing a set of bit states, including a first state and a second state, and a set of conditions to change a bit state including a first condition 5 and a second condition. The first condition and the second condition are different. The method comprises reading the value of each bit of the sequence, associating each bit to a respective state of the set according to the values as read, determining that an evaluated condition is met and changing the state of the target bit as a result of the condition being met. The method may then set the value of the target bit of the 10 sequence according to the state thereof. Such a method provides a solution for decoding a sequence of bits encoded by a LDPC code with better performance than the classic bit-flipping algorithm with only a slight increase in complexity.

    摘要翻译: 提供了一种用于解码由LPDC码编码的比特序列的方法。 该方法包括提供一组位状态,包括第一状态和第二状态,以及一组条件以改变包括第一条件5和第二状态的位状态。 第一个条件和第二个条件是不同的。 该方法包括读取序列的每个比特的值,根据读取的值将每个比特与组的相应状态相关联,确定满足评估条件并改变目标比特的状态作为结果 条件得到满足 然后,该方法可以根据其状态设置10序列的目标比特的值。 这种方法提供了一种解码方案,用于以比典型的比特翻转算法更好的性能来解码由LDPC码编码的比特序列,只有稍微增加的复杂度。

    Cache memory management in a flash cache architecture
    9.
    发明授权
    Cache memory management in a flash cache architecture 失效
    缓存内存管理在闪存缓存架构中

    公开(公告)号:US08688897B2

    公开(公告)日:2014-04-01

    申请号:US13080655

    申请日:2011-04-05

    摘要: Provided are a system, method, and computer program product for managing cache memory to cache data units in at least one storage device. A cache controller is coupled to at least two flash bricks, each comprising a flash memory. Metadata indicates a mapping of the data units to the flash bricks caching the data units, wherein the metadata is used to determine the flash bricks on which the cache controller caches received data units. The metadata is updated to indicate the flash brick having the flash memory on which data units are cached.

    摘要翻译: 提供了一种用于管理高速缓冲存储器以在至少一个存储设备中缓存数据单元的系统,方法和计算机程序产品。 高速缓存控制器耦合到至少两个闪存块,每个闪存块包括闪存。 元数据表示数据单元与缓存数据单元的闪存块的映射,其中元数据用于确定高速缓存控制器高速缓存接收的数据单元的闪存块。 更新元数据以指示闪存块具有缓存数据单元的闪存。