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41.发明授权公开(公告)号：US11348026B2
公开(公告)日：2022-05-31
申请号：US16778295
申请日：2020-01-31
Applicant: D-WAVE SYSTEMS INC.
Inventor： Murray C. Thom , Aidan P. Roy , Fabian A. Chudak , Zhengbing Bian , William G. Macready , Robert B. Israel , Kelly T. R. Boothby , Sheir Yarkoni , Yanbo Xue , Dmytro Korenkevych
IPC: G06N10/00
Abstract: Computational systems implement problem solving using hybrid digital/quantum computing approaches. A problem may be represented as a problem graph which is larger and/or has higher connectivity than a working and/or hardware graph of a quantum processor. A quantum processor may be used determine approximate solutions, which solutions are provided as initial states to one or more digital processors which may implement classical post-processing to generate improved solutions. Techniques for solving problems on extended, more-connected, and/or “virtual full yield” variations of the processor's actual working and/or hardware graphs are provided. A method of operation in a computational system comprising a quantum processor includes partitioning a problem graph into sub-problem graphs, and embedding a sub-problem graph onto the working graph of the quantum processor. The quantum processor and a non-quantum processor-based device generate partial samples. A controller causes a processing operation on the partial samples to generate complete samples.
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42.发明授权公开(公告)号：US11127893B2
公开(公告)日：2021-09-21
申请号：US16098801
申请日：2017-05-03
Applicant: D-WAVE SYSTEMS INC.
Inventor： Mark W. Johnson , Paul I. Bunyk , Andrew J. Berkley , Richard G. Harris , Kelly T. R. Boothby , Loren J. Swenson , Emile M. Hoskinson , Christopher B. Rich , Jan E. S. Johansson
Abstract: Approaches useful to operation of scalable processors with ever larger numbers of logic devices (e.g., qubits) advantageously take advantage of QFPs, for example to implement shift registers, multiplexers (i.e., MUXs), de-multiplexers (i.e., DEMUXs), and permanent magnetic memories (i.e., PMMs), and the like, and/or employ XY or XYZ addressing schemes, and/or employ control lines that extend in a “braided” pattern across an array of devices. Many of these described approaches are particularly suited for implementing input to and/or output from such processors. Superconducting quantum processors comprising superconducting digital-analog converters (DACs) are provided. The DACs may use kinetic inductance to store energy via thin-film superconducting materials and/or series of Josephson junctions, and may use single-loop or multi-loop designs. Particular constructions of energy storage elements are disclosed, including meandering structures. Galvanic connections between DACs and/or with target devices are disclosed, as well as inductive connections.
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Patent Agency Ranking
43.发明授权公开(公告)号：US11100418B2
公开(公告)日：2021-08-24
申请号：US16275816
申请日：2019-02-14
Applicant: D-WAVE SYSTEMS INC.
Inventor： Paul I. Bunyk , James King , Murray C. Thom , Mohammad H. Amin , Anatoly Yu Smirnov , Sheir Yarkoni , Trevor M. Lanting , Andrew D. King , Kelly T. R. Boothby
Abstract: The systems, devices, articles, and methods described herein generally relate to analog computers, for example quantum processors comprising qubits, couplers, and, or cavities. Analog computers, for example quantum processor based computers, are the subject of various sources of error which can hinder operation, potentially reducing computational accuracy and speed. Sources of error can be broadly characterized, for example as i) a background susceptibility do to inherently characteristics of the circuitry design, ii) as an h/J ratio imbalance, iii) bit flip errors, iv) fidelity, and v) Anderson localization, and various combinations of the aforesaid.
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44.发明申请公开(公告)号：US20200311591A1
公开(公告)日：2020-10-01
申请号：US16830650
申请日：2020-03-26
Applicant: D-WAVE SYSTEMS INC.
Inventor： William W. Bernoudy , Mohammad H. Amin , James A. King , Jeremy P. Hilton , Richard G. Harris , Andrew J. Berkley , Kelly T. R. Boothby
Abstract: A hybrid computing system for solving a computational problem includes a digital processor, a quantum processor having qubits and coupling devices that together define a working graph of the quantum processor, and at least one nontransitory processor-readable medium communicatively coupleable to the digital processor which stores at least one of processor-executable instructions or data. The digital processor receives a computational problem, and programs the quantum processor with a first set of bias fields and a first set of coupling strengths. The quantum processor generates samples as potential solutions to an approximation of the problem. The digital processor updates the approximation by determining a second set of bias fields based at least in part on the first set of bias fields and a first set of mean fields that are based at least in part on the first set of samples and coupling strengths of one or more virtual coupling devices.
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公开(公告)号：US20200234172A1
公开(公告)日：2020-07-23
申请号：US16741208
申请日：2020-01-13
Applicant: D-WAVE SYSTEMS INC.
Inventor： James A. King , William W. Bernoudy , Kelly T. R. Boothby , Pau Farré Pérez
Abstract: Systems and methods are described for operating a hybrid computing system using cluster contraction for converting large, dense input to reduced input that can be easily mapped into a quantum processor. The reduced input represents the global structure of the problem. Techniques involve partitioning the input variables into clusters and contracting each cluster. The input variables can be partitioned using an Unweighted Pair Group Method with Arithmetic Mean algorithm. The quantum processor returns samples based on the reduced input and the samples are expanded to correspond to the original input.
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46.发明申请公开(公告)号：US20200167685A1
公开(公告)日：2020-05-28
申请号：US16778295
申请日：2020-01-31
Applicant: D-WAVE SYSTEMS INC.
Inventor： Murray C. Thom , Aidan P. Roy , Fabian A. Chudak , Zhengbing Bian , William G. Macready , Robert B. Israel , Kelly T. R. Boothby , Sheir Yarkoni , Yanbo Xue , Dmytro Korenkevych
IPC: G06N10/00
Abstract: Computational systems implement problem solving using hybrid digital/quantum computing approaches. A problem may be represented as a problem graph which is larger and/or has higher connectivity than a working and/or hardware graph of a quantum processor. A quantum processor may be used determine approximate solutions, which solutions are provided as initial states to one or more digital processors which may implement classical post-processing to generate improved solutions. Techniques for solving problems on extended, more-connected, and/or “virtual full yield” variations of the processor's actual working and/or hardware graphs are provided. A method of operation in a computational system comprising a quantum processor includes partitioning a problem graph into sub-problem graphs, and embedding a sub-problem graph onto the working graph of the quantum processor. The quantum processor and a non-quantum processor-based device generate partial samples. A controller causes a processing operation on the partial samples to generate complete samples.
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公开(公告)号：US20190220771A1
公开(公告)日：2019-07-18
申请号：US16307382
申请日：2017-06-07
Applicant: D-WAVE SYSTEMS INC.
Inventor： Kelly T. R. Boothby , Paul I. Bunyk
Abstract: Topologies for analog computing systems may include cells of qubits which may implement a tripartite graph and cross substantially orthogonally. Qubits may have an H-shape or an l-shape, qubits may change direction within a cell. Topologies may be comprised of two or more different sub-topologies. Qubits may be communicatively coupled to non-adjacent cells by long-range couplers. Long-range couplers may change direction within a cell. A cell may have two or more different type of long-range couplers. A cell may have shifted qubits, more than one type of inter-cell couplers, more than one type of intra-cell couplers and long-range couplers.
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