Abstract:
The present invention provides a method of fabricating a flash memory cell without silicide formation on the source regions. A liquid deposition oxide layer is formed selectively only on a common source region by using a mask layer. The liquid deposition oxide layer is formed on the common source region in order to cover the common source region. Therefore, once a salicide step is performed, a silicide layer will not form on the common source region.
Abstract:
A method and apparatus for an improved multiple channel sensor interface circuit is described which comprises a plurality of input integrator circuits (35) coupled in parallel; a switched capacitor multiplexer (37) coupled to the input integrator circuits (35); and an output integrator stage (39) coupled to the switched capacitor multiplexer (37). An additional embodiment is described wherein a multiple channel voltage sensor interface circuit comprising a plurality of switched capacitor storage elements (S26 . . . S28) is coupled to a plurality of inputs; a plurality of integrator amplifiers (51, 53) is coupled to the switched capacitor storage elements (C22 . . . C30); and timing circuitry is coupled to the switched capacitor storage elements (C221 . . . C30) and to integrator amplifiers (51, 53) operable to selectively enable sampling of the inputs.
Abstract:
The method plans a predetermined circuit pattern on an inner surface of a constructive object and plans a contact portion on an outer surface of the constructive object for external electric connection. Laser is used to scan an area in which both the circuit pattern and the contact portion are located. A through hole is formed to make both the circuit pattern and the contact portion uninsulated and to form an irregular roughened surface on the area scanned by heat of the laser. A layer of conductive material is deposited on the roughened surface by a mixture of a catalyst solution and metal powder. The constructive object is immersed in a reaction tank to implement electroless plating to gradually thicken the layer of conductive material to become a conductor. The conductor penetrating the through hole makes the circuit pattern and the contact portion electrically connected.
Abstract:
A coil module includes a first coil set; a second coil set, including a first coil body, a second coil body and an insulative separator disposed between the first coil body and the second coil body, the separator having an adopting hole, the first coil body having an open winding surrounding the adapting hole and fixed on a side of the separator, the second coil body having an open winding surrounding the adapting hole and fixed on another side of the separator; and a coil base sheathing the second coil set with exposing the adopting hole. The first coil set surrounds the adopting hole and is fixed on the coil base to form a coil module.
Abstract:
The present invention relates to a high-voltage battery charging simulation system that includes a simulation high-voltage battery pack, a simulation battery management system, a multi-party communication device, and a charging station. The voltage of the simulation high-voltage battery pack can be calculated and updated immediately by the simulation battery management system to simulate the feature of real battery pack, so that it can detect the operation of the multi-party communication device and the charging station.
Abstract:
An array structure, which includes a TFT, a passivation layer, a pixel electrode, a first connecting layer and a first spacer is provided. The TFT includes a gate, a source and a drain. The passivation layer overlays the TFT. The pixel electrode is located on the passivation layer. The first connecting layer is located on the pixel electrode and electrically connected to the pixel electrode and the drain. The first spacer is located on the first connecting layer.
Abstract:
A method for fabricating a silicon-oxide-nitride-oxide-silicon (SONOS) non-volatile memory cell, wherein the method comprises steps as following: a pad oxide layer and a first hard mask layer are sequentially formed on a substrate. The pad oxide layer and the first hard mask layer are then etched through to form an opening exposing a portion of the substrate. Subsequently, an oxide-nitride-oxide (ONO) structure with a size substantially less than or equal to the opening is formed to coincide with the portion of the substrate exposed from the opening.
Abstract:
A monitor method and a monitor apparatus for monitoring a data of hardware are provided. The data has private information, identification information and at least one first network transmission address. The monitor apparatus comprises a storage unit and a processing unit. The data is stored in the storage unit according to the identification information. The processing unit is configured to record the identification information and the at least one first network transmission address of the data in a mark information table. In response to a sending system call, when a transmission is arranged to transmit the private information of the data to a second network transmission address which is different from the at least one first network transmission address, the processing unit will output a signal to cease the transmission.