公开(公告)号：US20190042127A1

公开(公告)日：2019-02-07

申请号：US15868627

申请日：2018-01-11

Applicant: Intel Corporation

Inventor： Scott J. Weber ,  David Greenhill ,  Sean R. Atsatt ,  Ravi Prakash Gutala ,  Aravind Raghavendra Dasu ,  Jun Pin Tan

IPC: G06F3/06 ,  G06F12/0802

Abstract: An integrated circuit device may cache configuration data to enable rapid configuration from fabric cache memory. The integrated circuit device may include programmable logic fabric having configuration memory and programmable logic elements controlled by the configuration memory, and sector-aligned memory apart from the programmable logic fabric. A first sector of the configuration memory may be programmed with first configuration data. The sector-aligned memory may include a first sector of sector-aligned memory that may cache the first configuration data while the configuration memory is programmed with the first configuration data a first time. A second sector of sector-aligned memory may cache second configuration data for a second sector of the configuration memory in parallel while the first sector of sector-aligned memory caches the first configuration data for the first sector of the configuration memory.

公开(公告)号：US20190041923A1

公开(公告)日：2019-02-07

申请号：US15855457

申请日：2017-12-27

Applicant: Intel Corporation

Inventor： Sean R. Atsatt ,  Scott J. Weber ,  Aravind Raghavendra Dasu ,  Ravi Prakash Gutala

IPC: G06F1/20 ,  H03K19/0175 ,  H03K19/003 ,  H03K19/00 ,  G05B15/02

Abstract: An integrated circuit assembly may include an integrated circuit having a plurality of programmable logic sectors and an interposer circuit positioned adjacent to the integrated circuit. The interposer circuit may include at least one voltage regulator that distributes a voltage to at least one of the plurality of programmable logic sectors and at least one thermal sensor that measures a temperature of the at least one of the plurality of programmable logic sectors.