公开(公告)号：US11003003B2

公开(公告)日：2021-05-11

申请号：US16918453

申请日：2020-07-01

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Isao Suzumura ,  Hajime Watakabe

IPC: G02F1/1333 ,  G02F1/1368 ,  G02F1/1335 ,  G02F1/1362 ,  H01L27/12 ,  G09F9/30 ,  H05K1/18 ,  G02F1/1339 ,  H01L27/32 ,  H01L51/00

Abstract: The purpose of the invention is to realize the flexible display device of high reliability; specifically in a structure that a bending area is in a terminal area, and in that disconnection of the wiring does not occur in the bending area. The concrete structure is that: a display device having a display area, a driving circuit area and a bending area comprising: a first thin film transistor and a first interlayer insulating film are formed in the display area, a second thin film transistor and a second interlayer insulating film are formed in the driving circuit area, terminal wirings to connects the display area and the driving circuit area are formed in the bending area.

公开(公告)号：US10761354B2

公开(公告)日：2020-09-01

申请号：US16153861

申请日：2018-10-08

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Isao Suzumura ,  Hajime Watakabe

IPC: G02F1/1333 ,  G02F1/1368 ,  G02F1/1335 ,  G02F1/1362 ,  H01L27/12 ,  G09F9/30 ,  H05K1/18 ,  G02F1/1339 ,  H01L27/32 ,  H01L51/00

Abstract: The purpose of the invention is to realize the flexible display device of high reliability; specifically in a structure that a bending area is in a terminal area, and in that disconnection of the wiring does not occur in the bending area. The concrete structure is that: a display device having a display area, a driving circuit area and a bending area comprising: a first thin film transistor and a first interlayer insulating film are formed in the display area, a second thin film transistor and a second interlayer insulating film are formed in the driving circuit area, terminal wirings to connects the display area and the driving circuit area are formed in the bending area.

公开(公告)号：US10727254B2

公开(公告)日：2020-07-28

申请号：US16447000

申请日：2019-06-20

Applicant: Japan Display Inc.

Inventor： Toshinari Sasaki ,  Hajime Watakabe ,  Akihiro Hanada ,  Marina Shiokawa

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/423 ,  H01L29/49

Abstract: A semiconductor device includes a oxide semiconductor layer, a gate electrode arranged above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first insulation layer arranged above the oxide semiconductor layer and arranged with a first aperture part, wiring including an aluminum layer arranged above the first insulation layer, the wiring being electrically connected to the oxide semiconductor layer via the first aperture part, a barrier layer including aluminum oxide above the first insulation layer, above the wiring and covering a side surface of the wiring, and an organic insulation layer arranged above the barrier layer.

公开(公告)号：US10439010B2

公开(公告)日：2019-10-08

申请号：US15686781

申请日：2017-08-25

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada

IPC: H01L27/32 ,  G02F1/1362 ,  G02F1/1368 ,  G09G3/3225 ,  G09G3/36 ,  H01L27/12 ,  H01L29/786

Abstract: The purpose of the present invention is to form both LTPS TFT and semiconductor TFT in a same substrate. The feature of the display device to realize the above purpose is that: a display device having a display area containing a pixel comprising: the pixel includes a first TFT having an oxide semiconductor, a gate insulating film is formed on the oxide semiconductor, a first gate electrode is formed on the gate insulating film, a first source/drain electrode formed by a metal or an alloy contacts a source or a drain of the semiconductor the first gate electrode and the first source/drain electrode are formed by the same material.

公开(公告)号：US10373982B2

公开(公告)日：2019-08-06

申请号：US15619677

申请日：2017-06-12

Applicant: Japan Display Inc.

Inventor： Toshinari Sasaki ,  Hajime Watakabe ,  Akihiro Hanada ,  Marina Shiokawa

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/423 ,  H01L29/49

Abstract: A semiconductor device includes a oxide semiconductor layer, a gate electrode arranged above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first insulation layer arranged above the oxide semiconductor layer and arranged with a first aperture part, wiring including an aluminum layer arranged above the first insulation layer, the wiring being electrically connected to the oxide semiconductor layer via the first aperture part, a barrier layer including aluminum oxide above the first insulation layer, above the wiring and covering a side surface of the wiring, and an organic insulation layer arranged above the barrier layer.

公开(公告)号：US10317763B2

公开(公告)日：2019-06-11

申请号：US15723300

申请日：2017-10-03

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Isao Suzumura ,  Hirokazu Watanabe ,  Akihiro Hanada

IPC: H01L29/10 ,  H01L29/12 ,  G02F1/1368 ,  H01L21/8234 ,  H01L21/473 ,  H01L23/522 ,  H01L23/532 ,  H01L21/768 ,  H01L29/786 ,  H01L27/12 ,  H01L51/50

Abstract: A display device comprising: a first TFT using silicon (Si) and a second TFT using oxide semiconductor are formed on a substrate, a distance between the silicon (Si) and the substrate is smaller than a distance between the oxide semiconductor and the substrate, a source/drain electrode of the first TFT connects with the silicon (Si) via a first through hole, a source/drain electrode of the second TFT connects with the oxide semiconductor via a second through hole, metal films are made on the oxide semiconductor sandwiching a channel of the oxide semiconductor in a plan view, the channel has a channel width, an AlO layer is formed on the metal films and the oxide semiconductor, the second source/drain electrode and the metal films are connected via the second through hole formed in the AlO layer.

公开(公告)号：US20170365624A1

公开(公告)日：2017-12-21

申请号：US15619677

申请日：2017-06-12

Applicant: Japan Display Inc.

Inventor： Toshinari Sasaki ,  Hajime Watakabe ,  Akihiro Hanada ,  Marina Shiokawa

IPC: H01L27/12 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/7869

Abstract: A semiconductor device includes a oxide semiconductor layer, a gate electrode arranged above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first insulation layer arranged above the oxide semiconductor layer and arranged with a first aperture part, wiring including an aluminum layer arranged above the first insulation layer, the wiring being electrically connected to the oxide semiconductor layer via the first aperture part, a barrier layer including aluminum oxide above the first insulation layer, above the wiring and covering a side surface of the wiring, and an organic insulation layer arranged above the barrier layer.

公开(公告)号：US12213351B2

公开(公告)日：2025-01-28

申请号：US17570396

申请日：2022-01-07

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Toshinari Sasaki ,  Ryo Onodera

IPC: H10K59/124 ,  H10K59/121

Abstract: According to one embodiment, in a first concentration of an impurity element contained in a first impurity region, a second concentration of the impurity element contained in a second impurity region, a third concentration of the impurity element contained in a third impurity region, and a fourth concentration of the impurity element contained in a high-concentration impurity region, the third concentration is equal to the fourth concentration, the third concentration is higher than the first concentration, and the first concentration is higher than the second concentration.

公开(公告)号：US12191398B2

公开(公告)日：2025-01-07

申请号：US17579740

申请日：2022-01-20

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Takuo Kaitoh ,  Masashi Tsubuku

IPC: H01L29/78 ,  H01L29/786

Abstract: The purpose of the present invention is to suppress a variation in a threshold voltage (Δ Vth) in a Thin Film Transistor (TFT) using an oxide semiconductor. The present invention takes a structure as follows to attain this purpose. A semiconductor device having TFT using an oxide semiconductor including: a channel region, a source region, a drain region, and a transition region between the channel region and the source region and between the channel region and the drain region, in which a resistivity of the transition region is smaller than that of the channel region, and larger than that of the source region or the drain region; a source electrode is formed overlapping the source region, and a drain electrode is formed overlapping the drain region; and a thickness of the transition region of the oxide semiconductor is larger than a thickness of the channel region of the oxide semiconductor.

公开(公告)号：US12181759B2

公开(公告)日：2024-12-31

申请号：US18457350

申请日：2023-08-29

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Hitoshi Tanaka

IPC: G02F1/1362

Abstract: According to one embodiment, a display device includes a transparent semiconductor, a first insulating layer, a gate electrode, a second insulating layer, a source electrode, a third insulating layer, a transparent electrode which is in contact with the semiconductor in a second contact hole penetrating the first insulating layer, the second insulating layer and the third insulating layer, a fourth insulating layer, a color filter, and a pixel electrode electrically connected to the transparent electrode. The first insulating layer and the second insulating layer are silicon oxide layers. At least one of the third insulating layer and the fourth insulating layer is a silicon nitride layer.