公开(公告)号：US10396187B2

公开(公告)日：2019-08-27

申请号：US15880673

申请日：2018-01-26

Applicant: Japan Display Inc.

Inventor： Toshinari Sasaki ,  Masahiro Watabe ,  Masayoshi Fuchi ,  Isao Suzumura ,  Marina Shiokawa

IPC: H01L29/66 ,  H01L21/385 ,  H01L29/786 ,  H01L21/477

Abstract: A semiconductor device including a first oxide insulating layer, a barrier layer above the first oxide insulating layer, the barrier layer including an opening, a second oxide insulating layer above the first oxide insulating layer at a position overlapping the opening, an oxide semiconductor layer facing the first oxide insulating layer interposed by the second oxide insulating layer at a position overlapping the opening, a gate electrode facing the oxide semiconductor layer at side opposite to the first oxide insulating layer with respect to the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate electrode. A contained amount of oxygen in the first oxide insulating layer is larger than a contained amount of oxygen in the second oxide insulating layer.

公开(公告)号：US10580801B2

公开(公告)日：2020-03-03

申请号：US15978464

申请日：2018-05-14

Applicant: Japan Display Inc.

Inventor： Isao Suzumura ,  Hajime Watakabe ,  Akihiro Hanada ,  Hirokazu Watanabe ,  Yohei Yamaguchi ,  Marina Shiokawa ,  Ryotaro Kimura

IPC: G02F1/1343 ,  G02F1/1368 ,  G02F1/1362 ,  G02F1/1337 ,  H01L27/12 ,  H01L29/786 ,  G02F1/1333 ,  H01L27/32

Abstract: The purpose of the invention is to form a flexible display device where the substrate is made of resin, wherein the TFT can be annealed in high temperature; consequently, a reliability of the TFT is improved. The concrete measure is as follows. A display device having a pixel electrode and a TFT including a semiconductor layer on a substrate comprising: a source region of the semiconductor layer connects with a source electrode, a drain region of the semiconductor layer connects with a drain electrode; the pixel electrode connects with the source electrode; the drain electrode connects with a video signal line; a distance between the drain electrode and the substrate is smaller than a distance between the semiconductor and the substrate, the semiconductor layer is formed between the pixel electrode and the substrate.

公开(公告)号：US10461100B2

公开(公告)日：2019-10-29

申请号：US15953614

申请日：2018-04-16

Applicant: Japan Display Inc.

Inventor： Toshinari Sasaki ,  Marina Shiokawa

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/24 ,  H01L29/66

Abstract: A semiconductor device including a substrate, a first insulating layer above the substrate, a first transistor including a first oxide semiconductor layer above the first insulating layer, and a second transistor including a second oxide semiconductor layer above the first insulating layer, a composition of the second oxide semiconductor layer being different from a composition of the first oxide semiconductor layer.

公开(公告)号：US20190312064A1

公开(公告)日：2019-10-10

申请号：US16447000

申请日：2019-06-20

Applicant: Japan Display Inc.

Inventor： Toshinari SASAKI ,  Hajime Watakabe ,  Akihiro Hanada ,  Marina Shiokawa

IPC: H01L27/12 ,  H01L29/786

Abstract: A semiconductor device includes a oxide semiconductor layer, a gate electrode arranged above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first insulation layer arranged above the oxide semiconductor layer and arranged with a first aperture part, wiring including an aluminum layer arranged above the first insulation layer, the wiring being electrically connected to the oxide semiconductor layer via the first aperture part, a barrier layer including aluminum oxide above the first insulation layer, above the wiring and covering a side surface of the wiring, and an organic insulation layer arranged above the barrier layer.

公开(公告)号：US10727254B2

公开(公告)日：2020-07-28

申请号：US16447000

申请日：2019-06-20

Applicant: Japan Display Inc.

Inventor： Toshinari Sasaki ,  Hajime Watakabe ,  Akihiro Hanada ,  Marina Shiokawa

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/423 ,  H01L29/49

Abstract: A semiconductor device includes a oxide semiconductor layer, a gate electrode arranged above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first insulation layer arranged above the oxide semiconductor layer and arranged with a first aperture part, wiring including an aluminum layer arranged above the first insulation layer, the wiring being electrically connected to the oxide semiconductor layer via the first aperture part, a barrier layer including aluminum oxide above the first insulation layer, above the wiring and covering a side surface of the wiring, and an organic insulation layer arranged above the barrier layer.

公开(公告)号：US10373982B2

公开(公告)日：2019-08-06

申请号：US15619677

申请日：2017-06-12

Applicant: Japan Display Inc.

Inventor： Toshinari Sasaki ,  Hajime Watakabe ,  Akihiro Hanada ,  Marina Shiokawa

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/423 ,  H01L29/49

Abstract: A semiconductor device includes a oxide semiconductor layer, a gate electrode arranged above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first insulation layer arranged above the oxide semiconductor layer and arranged with a first aperture part, wiring including an aluminum layer arranged above the first insulation layer, the wiring being electrically connected to the oxide semiconductor layer via the first aperture part, a barrier layer including aluminum oxide above the first insulation layer, above the wiring and covering a side surface of the wiring, and an organic insulation layer arranged above the barrier layer.

公开(公告)号：US20170365624A1

公开(公告)日：2017-12-21

申请号：US15619677

申请日：2017-06-12

Applicant: Japan Display Inc.

Inventor： Toshinari Sasaki ,  Hajime Watakabe ,  Akihiro Hanada ,  Marina Shiokawa

IPC: H01L27/12 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/7869

Abstract: A semiconductor device includes a oxide semiconductor layer, a gate electrode arranged above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first insulation layer arranged above the oxide semiconductor layer and arranged with a first aperture part, wiring including an aluminum layer arranged above the first insulation layer, the wiring being electrically connected to the oxide semiconductor layer via the first aperture part, a barrier layer including aluminum oxide above the first insulation layer, above the wiring and covering a side surface of the wiring, and an organic insulation layer arranged above the barrier layer.

公开(公告)号：US20180342536A1

公开(公告)日：2018-11-29

申请号：US15978464

申请日：2018-05-14

Applicant: Japan Display Inc.

Inventor： Isao Suzumura ,  Hajime Watakabe ,  Akihiro Hanada ,  Hirokazu Watanabe ,  Yohei Yamaguchi ,  Marina Shiokawa ,  Ryotaro Kimura

IPC: H01L27/12 ,  H01L29/786 ,  G02F1/1362 ,  G02F1/1368 ,  G02F1/1333

CPC classification number: H01L27/124 ,  G02F1/133305 ,  G02F1/134363 ,  G02F1/136209 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136295 ,  G02F2202/104 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/1266 ,  H01L27/127 ,  H01L27/3248 ,  H01L27/3262 ,  H01L29/78603 ,  H01L29/78618 ,  H01L29/78633 ,  H01L29/78648 ,  H01L29/78678 ,  H01L29/7869

Abstract: The purpose of the invention is to form a flexible display device where the substrate is made of resin, wherein the TFT can be annealed in high temperature; consequently, a reliability of the TFT is improved. The concrete measure is as follows. A display device having a pixel electrode and a TFT including a semiconductor layer on a substrate comprising: a source region of the semiconductor layer connects with a source electrode, a drain region of the semiconductor layer connects with a drain electrode; the pixel electrode connects with the source electrode; the drain electrode connects with a video signal line; a distance between the drain electrode and the substrate is smaller than a distance between the semiconductor and the substrate, the semiconductor layer is formed between the pixel electrode and the substrate.

公开(公告)号：US20180286890A1

公开(公告)日：2018-10-04

申请号：US15923026

申请日：2018-03-16

Applicant: Japan Display Inc.

Inventor： Isao Suzumura ,  Yohei Yamaguchi ,  Hajime Watakabe ,  Akihiro Hanada ,  Hirokazu Watanabe ,  Marina Shiokawa

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/49 ,  H01L21/02 ,  H01L21/465 ,  H01L21/4763 ,  H01L29/66

Abstract: The purpose of the invention is to improve reliability of the TFT of the oxide semiconductor. The invention is characterized as follows. A display device comprising: a substrate including a display area where plural pixels are formed, the pixel includes a first TFT of a first oxide semiconductor; a first gate insulating film is formed on the first oxide semiconductor, a gate electrode is formed on the first gate insulating film, an interlayer insulating film is formed over the gate electrode; the gate insulating film includes a first silicon oxide film, the gate electrode includes a first gate layer made of a second oxide semiconductor and a second gate layer made of metal or alloy; the interlayer insulating film has a first interlayer insulating film including a second silicon oxide film, and a second interlayer insulating film including a first aluminum oxide film on the first interlayer insulating film.

公开(公告)号：US20180226498A1

公开(公告)日：2018-08-09

申请号：US15880673

申请日：2018-01-26

Applicant: Japan Display Inc.

Inventor： Toshinari SASAKI ,  Masahiro Watabe ,  Masayoshi Fuchi ,  Isao Suzumura ,  Marina Shiokawa

IPC: H01L29/66 ,  H01L21/385 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L21/385 ,  H01L21/477 ,  H01L29/78609 ,  H01L29/7869

Abstract: A semiconductor device including a first oxide insulating layer, a barrier layer above the first oxide insulating layer, the barrier layer including an opening, a second oxide insulating layer above the first oxide insulating layer at a position overlapping the opening, an oxide semiconductor layer facing the first oxide insulating layer interposed by the second oxide insulating layer at a position overlapping the opening, a gate electrode facing the oxide semiconductor layer at side opposite to the first oxide insulating layer with respect to the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate electrode. A contained amount of oxygen in the first oxide insulating layer is larger than a contained amount of oxygen in the second oxide insulating layer.