公开(公告)号：US07245541B2

公开(公告)日：2007-07-17

申请号：US11216369

申请日：2005-08-31

申请人： Jeffery W. Janzen

发明人： Jeffery W. Janzen

IPC分类号： G11C7/00

CPC分类号： G06F13/4086

摘要： A method and apparatus are provided for active termination control in a memory by an module register providing an active termination control signal to the memory. The module register monitors a system command bus for read and write commands. In response to detecting a read or write command, the module register generates an active termination control signal to the memory. The memory turns on active termination based on information programmed into one or more mode registers of the memory. The memory maintains the active termination in an on state for a predetermined time based on information programmed into one or more mode registers of the memory.

摘要翻译： 提供了一种方法和装置，用于通过模块寄存器向存储器中的主动终止控制提供活动终止控制信号给存储器。 模块寄存器监视系统命令总线以进行读写命令。 响应于检测到读或写命令，模块寄存器产生到存储器的有效终止控制信号。 存储器根据编程到存储器的一个或多个模式寄存器中的信息，开启有效终止。 存储器基于编程到存储器的一个或多个模式寄存器中的信息，将活动终止维持在接通状态达预定时间。

公开(公告)号：US07200062B2

公开(公告)日：2007-04-03

申请号：US10931564

申请日：2004-08-31

申请人： Thomas H. Kinsely ,  Jeffery W. Janzen

发明人： Thomas H. Kinsely ,  Jeffery W. Janzen

IPC分类号： G11C7/00

CPC分类号： G11C11/40611 ,  G11C11/406 ,  G11C11/40615 ,  G11C11/40618 ,  G11C11/40622

摘要： A dynamic random access memory device includes a mode register that is programmed with a delay value. In some embodiments, a offset code is also stored in the memory device. The memory device uses the delay value, which may be added to or multiplied by the offset code, to delay the initiation of a received auto-refresh or self-refresh command. A large number of dynamic random access memory devices in a system may be provided with different delay values and possibly offset codes so that the memory device do not all perform refreshes simultaneously in response to an auto-refresh or self-refresh command issued to all of the memory devices simultaneously. As a result, the peak current drawn by the memory devices resulting from the auto-refresh command or self-refresh command is maintained at a relatively low value.

摘要翻译： 动态随机存取存储器件包括用延迟值编程的模式寄存器。 在一些实施例中，偏移代码也存储在存储器件中。 存储器件使用延迟值，该延迟值可以被添加到偏移代码或乘以偏移代码，以延迟接收的自动刷新或自刷新命令的启动。 可以为系统中的大量动态随机存取存储器件提供不同的延迟值和可能的偏移代码，使得存储器件不是都响应于自动刷新或自刷新命令而同时执行刷新 同时存储设备。 结果，由自动刷新命令或自刷新命令产生的存储器件所绘制的峰值电流保持在较低的值。

公开(公告)号：US07130228B2

公开(公告)日：2006-10-31

申请号：US11217056

申请日：2005-08-31

申请人： Jeffery W. Janzen

发明人： Jeffery W. Janzen

IPC分类号： G11C7/00

CPC分类号： G06F13/4086

摘要： A method and apparatus are provided for active termination control in a memory by a module register providing an active termination control signal to the memory. The module register monitors a system command bus for read and write commands. In response to detecting a read or write command, the module register generates an active termination control signal to the memory.

摘要翻译： 提供了一种方法和装置，用于通过模块寄存器向存储器中的主动终止控制提供活动终止控制信号给存储器。 模块寄存器监视系统命令总线以进行读写命令。 响应于检测到读或写命令，模块寄存器产生到存储器的有效终止控制信号。

公开(公告)号：US07124260B2

公开(公告)日：2006-10-17

申请号：US10228781

申请日：2002-08-26

申请人： Paul A. LaBerge ,  Jeffery W. Janzen

发明人： Paul A. LaBerge ,  Jeffery W. Janzen

IPC分类号： G06F12/00

CPC分类号： G11C7/22 ,  G11C7/12 ,  G11C2207/2281 ,  G11C2207/229

摘要： A method of operating a memory device includes placing the memory device in a persistent auto precharge mode of operation, applying a disable command to the memory device, and disabling the persistent auto precharge mode of operation in response to the applied disable command. Memory devices operating according this method may be used in memory systems that infrequently experience page hits, such as server systems, while the ability to disable the persistent auto precharge mode allows such memory devices to be used in systems that frequently experience page hits, such as graphics or input/output applications.

摘要翻译： 一种操作存储器件的方法包括：将存储器件置于持续自动预充电操作模式中，对存储器件施加禁用命令，以及响应于应用的禁用命令禁用持续自动预充电操作模式。 根据这种方法运行的内存设备可能会用于经常遇到页面命中的内存系统（如服务器系统），而禁用持续自动预充电模式的功能允许将这种内存设备用于经常访问页面命中的系统，例如 图形或输入/输出应用程序。

公开(公告)号：US07035159B2

公开(公告)日：2006-04-25

申请号：US10816424

申请日：2004-04-01

申请人： Jeffery W. Janzen ,  Scott Schaefer ,  Todd D. Farrell

发明人： Jeffery W. Janzen ,  Scott Schaefer ,  Todd D. Farrell

IPC分类号： G11C17/18

CPC分类号： G11C11/4074 ,  G11C5/00 ,  G11C5/143 ,  G11C7/04 ,  G11C16/20 ,  G11C29/02 ,  G11C29/028 ,  G11C2029/4402 ,  G11C2029/5006

摘要： A technique for storing accurate operating current values using programmable elements on memory devices. More specifically, programmable elements, such as antifuses, located on a memory device are programmed with measured operating current values corresponding to the memory device, during fabrication. The memory device may be incorporated into a memory module that is incorporated into a system. Once the memory module is incorporated into a system, the programmable elements may be accessed such that the system can be configured to optimally operate in accordance with the operating current values measured for each memory device in the system.

公开(公告)号：US20120113705A1

公开(公告)日：2012-05-10

申请号：US13348895

申请日：2012-01-12

申请人： Jeffery W. Janzen

发明人： Jeffery W. Janzen

IPC分类号： G11C5/06

CPC分类号： G11C7/1078 ,  G11C5/02 ,  G11C5/04 ,  G11C7/109 ,  G11C7/22 ,  G11C7/225 ,  G11C11/4093 ,  G11C11/4096 ,  G11C2207/2254 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/01055

摘要： Embodiments of the present invention relate to configurable inputs and/or outputs for memory and memory stacking applications in processor-based systems. More specifically, embodiments of the present invention include processor-based systems with volatile-memory having memory devices that include a die having a circuit configured for enablement by a particular signal, an input pin configured to receive the particular signal, and a path selector configured to selectively designate a signal path to the circuit from the input pin.

摘要翻译： 本发明的实施例涉及用于基于处理器的系统中的存储器和存储器堆叠应用的可配置输入和/或输出。 更具体地，本发明的实施例包括具有易失性存储器的基于处理器的系统，其具有存储器件，存储器件包括具有被配置为通过特定信号启用的电路的管芯，被配置为接收特定信号的输入引脚和配置为 以选择性地从输入引脚指定电路的信号路径。

公开(公告)号：US08045415B2

公开(公告)日：2011-10-25

申请号：US12707491

申请日：2010-02-17

申请人： Jeffery W. Janzen ,  Scott Schaefer ,  Todd D. Farrell

发明人： Jeffery W. Janzen ,  Scott Schaefer ,  Todd D. Farrell

IPC分类号： G11C17/18

CPC分类号： G11C11/4074 ,  G11C5/00 ,  G11C5/143 ,  G11C7/04 ,  G11C16/20 ,  G11C29/02 ,  G11C29/028 ,  G11C2029/4402 ,  G11C2029/5006

摘要： Techniques are disclosed for reading operating parameters from programmable elements on memory devices to configure a memory system. More specifically, programmable elements, such as antifuses, located on a memory device are programmed during fabrication with measured operating parameters corresponding to the memory device. Operating parameters may include, for example, operating current values, operating voltages, or timing parameters. The memory device may be incorporated into a memory module that is incorporated into a system. Once the memory module is incorporated into a system, the programmable elements may be accessed such that the memory system can be configured to optimally operate in accordance with the operating parameters measured for each memory device in the system.

摘要翻译： 公开了用于从存储器设备上的可编程元件读取操作参数以配置存储器系统的技术。 更具体地，位于存储器件上的诸如反熔丝的可编程元件在制造期间被编程，其中测量的操作参数对应于存储器件。 操作参数可以包括例如工作电流值，工作电压或时序参数。 存储器件可以并入到并入到系统中的存储器模块中。 一旦存储器模块被并入到系统中，可以访问可编程元件，使得可以将存储器系统配置成根据为系统中的每个存储器件测量的操作参数进行最佳操作。

公开(公告)号：US20110103122A1

公开(公告)日：2011-05-05

申请号：US12986947

申请日：2011-01-07

申请人： Jeffery W. Janzen

发明人： Jeffery W. Janzen

IPC分类号： G11C5/04

CPC分类号： G06F13/1684 ,  G11C5/025 ,  G11C5/04

摘要： An apparatus and method couples memory devices in a memory module to a memory hub on the module such that signals traveling from the hub to the devices have approximately the same propagation time regardless of which device is involved. Specifically, the devices are arranged around the hub in pairs, with each pair of devices being oriented such that a functional group of signals for each device in the pair, such as the data bus signals, are positioned adjacent each other on a circuit board of the module. This allows for a data and control-address busses having approximately the same electrical characteristics to be routed between the hub and each of the devices. This physical arrangement of devices allows high speed operation of the module. In one example, the hub is located in the center of the module and eight devices, four pairs, are positioned around the hub.

摘要翻译： 装置和方法将存储器模块中的存储器件耦合到模块上的存储器集线器，使得从集线器传输到设备的信号具有大致相同的传播时间，而不管涉及哪个设备。 具体地，设备成对地布置在集线器周围，每对设备被定向成使得成对中的每个设备（例如数据总线信号）的功能信号组彼此相邻地定位在 模块。 这允许具有大致相同电特性的数据和控制地址总线在集线器和每个设备之间路由。 这种设备的物理布置允许模块的高速运行。 在一个示例中，集线器位于模块的中心，并且四个对设置在集线器周围的八个设备。

公开(公告)号：US20100142251A1

公开(公告)日：2010-06-10

申请号：US12707491

申请日：2010-02-17

申请人： Jeffery W. Janzen ,  Scott Schaefer ,  Todd D. Farrell

发明人： Jeffery W. Janzen ,  Scott Schaefer ,  Todd D. Farrell

IPC分类号： G11C5/06 ,  G06F12/00 ,  G11C17/18

CPC分类号： G11C11/4074 ,  G11C5/00 ,  G11C5/143 ,  G11C7/04 ,  G11C16/20 ,  G11C29/02 ,  G11C29/028 ,  G11C2029/4402 ,  G11C2029/5006

摘要： Techniques are disclosed for reading operating parameters from programmable elements on memory devices to configure a memory system. More specifically, programmable elements, such as antifuses, located on a memory device are programmed during fabrication with measured operating parameters corresponding to the memory device. Operating parameters may include, for example, operating current values, operating voltages, or timing parameters. The memory device may be incorporated into a memory module that is incorporated into a system. Once the memory module is incorporated into a system, the programmable elements may be accessed such that the memory system can be configured to optimally operate in accordance with the operating parameters measured for each memory device in the system.

摘要翻译： 公开了用于从存储器设备上的可编程元件读取操作参数以配置存储器系统的技术。 更具体地，位于存储器件上的诸如反熔丝的可编程元件在制造期间被编程，其中测量的操作参数对应于存储器件。 操作参数可以包括例如工作电流值，工作电压或时序参数。 存储器件可以并入到并入到系统中的存储器模块中。 一旦存储器模块被并入到系统中，可以访问可编程元件，使得可以将存储器系统配置成根据为系统中的每个存储器件测量的操作参数进行最佳操作。

公开(公告)号：US20100122061A1

公开(公告)日：2010-05-13

申请号：US12690790

申请日：2010-01-20

申请人： Jeffery W. Janzen ,  Scott Schaefer ,  Todd D. Farrell

发明人： Jeffery W. Janzen ,  Scott Schaefer ,  Todd D. Farrell

IPC分类号： G06F12/02

CPC分类号： G06F1/206 ,  G06F1/3203 ,  G06F1/3275 ,  G11C5/04 ,  G11C7/04 ,  G11C7/20 ,  G11C2029/4402 ,  Y02D10/13 ,  Y02D10/14

摘要： Systems, memory modules and methods of configuring systems including memory modules are provided. The memory modules include device parameters specifically corresponding to memory devices of the memory module. The device parameters may be retrieved from a database, and the system may be configured in accordance with the device parameters retrieved from the database.

摘要翻译： 提供了系统，存储器模块和配置包括存储器模块的系统的方法。 存储器模块包括特别对应于存储器模块的存储器件的器件参数。 可以从数据库检索设备参数，并且可以根据从数据库检索的设备参数来配置系统。