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    TECHNIQUES FOR CONFIGURING MEMORY SYSTEMS USING ACCURATE OPERATING PARAMETERS
    1.
    发明申请
    TECHNIQUES FOR CONFIGURING MEMORY SYSTEMS USING ACCURATE OPERATING PARAMETERS 失效
    使用精确的操作参数配置存储器系统的技术

    公开(公告)号：US20090147609A1

    公开(公告)日：2009-06-11

    申请号：US12366550

    申请日：2009-02-05

    Applicant: Jeffery W. Janzen ,  Scott Schaefer ,  Todd D. Farrell

    Inventor： Jeffery W. Janzen ,  Scott Schaefer ,  Todd D. Farrell

    IPC: G11C17/16 ,  G11C7/00

    CPC classification number: G11C11/4074 ,  G11C5/00 ,  G11C5/143 ,  G11C7/04 ,  G11C16/20 ,  G11C29/02 ,  G11C29/028 ,  G11C2029/4402 ,  G11C2029/5006

    Abstract: Techniques are disclosed for reading operating parameters from programmable elements on memory devices to configure a memory system. More specifically, programmable elements, such as antifuses, located on a memory device are programmed during fabrication with measured operating parameters corresponding to the memory device. Operating parameters may include, for example, operating current values, or voltage and timing parameters. The memory device may be incorporated into a memory module that is incorporated into a system. Once the memory module is incorporated into a system, the programmable elements may be accessed such that the memory system can be configured to optimally operate in accordance with the operating parameters measured for each memory device in the system.

    Abstract translation: 公开了用于从存储器设备上的可编程元件读取操作参数以配置存储器系统的技术。 更具体地，位于存储器件上的诸如反熔丝的可编程元件在制造期间被编程，其中测量的操作参数对应于存储器件。 操作参数可以包括例如工作电流值或电压和定时参数。 存储器件可以并入到并入到系统中的存储器模块中。 一旦存储器模块被并入到系统中，可以访问可编程元件，使得可以将存储器系统配置成根据为系统中的每个存储器件测量的操作参数进行最佳操作。

    Techniques for implementing accurate operating current values stored in a database
    2.
    发明授权
    Techniques for implementing accurate operating current values stored in a database 失效
    用于实现存储在数据库中的精确操作电流值的技术

    公开(公告)号：US07483315B2

    公开(公告)日：2009-01-27

    申请号：US11452773

    申请日：2006-06-14

    Applicant: Jeffery W. Janzen ,  Scott Schaefer ,  Todd D. Farrell

    Inventor： Jeffery W. Janzen ,  Scott Schaefer ,  Todd D. Farrell

    IPC: G11C7/06

    CPC classification number: G06F1/206 ,  G06F1/3203 ,  G06F1/3275 ,  G11C5/04 ,  G11C7/04 ,  G11C7/20 ,  G11C2029/4402 ,  Y02D10/13 ,  Y02D10/14

    Abstract: Memory modules and methods for fabricating and implementing memory modules wherein unique operating current values corresponding to specific memory devices on the memory modules are accessed from a database such that the operating current values may be implemented to improve system performance. Memory modules comprising a number of volatile memory devices may be fabricated. Operating current values corresponding to the specific memory devices on the memory module may be stored in a database and accessed during fabrication or during implementation of the memory modules in a system. System performance may be optimized by implementing the unique operating current values corresponding to the specific memory devices on the memory modules.

    Abstract translation: 用于制造和实现存储器模块的存储器模块和方法，其中对应于存储器模块上的特定存储器件的独特工作电流值从数据库访问，使得可以实现工作电流值以提高系统性能。 可以制造包括多个易失性存储器件的存储器模块。 对应于存储器模块上的特定存储器件的工作电流值可以存储在数据库中，并且在系统中的存储器模块的制造期间或实现期间被访问。 可以通过实现与存储器模块上的特定存储器设备相对应的独特的工作电流值来优化系统性能。

    Techniques for implementing accurate operating current values stored in a database
    5.
    发明申请
    Techniques for implementing accurate operating current values stored in a database 有权
    用于实现存储在数据库中的精确操作电流值的技术

    公开(公告)号：US20050219915A1

    公开(公告)日：2005-10-06

    申请号：US10816241

    申请日：2004-04-01

    Applicant: Jeffery Janzen ,  Scott Schaefer ,  Todd Farrell

    Inventor： Jeffery Janzen ,  Scott Schaefer ,  Todd Farrell

    IPC: G11C5/00

    CPC classification number: G06F1/206 ,  G06F1/3203 ,  G06F1/3275 ,  G11C5/04 ,  G11C7/04 ,  G11C7/20 ,  G11C2029/4402 ,  Y02D10/13 ,  Y02D10/14

    Abstract: Memory modules and methods for fabricating and implementing memory modules wherein unique operating current values corresponding to specific memory devices on the memory modules are accessed from a database such that the operating current values may be implemented to improve system performance. Memory modules comprising a number of volatile memory devices may be fabricated. Operating current values corresponding to the specific memory devices on the memory module may be stored in a database and accessed during fabrication or during implementation of the memory modules in a system. System performance may be optimized by implementing the unique operating current values corresponding to the specific memory devices on the memory modules.

    Abstract translation: 用于制造和实现存储器模块的存储器模块和方法，其中对应于存储器模块上的特定存储器件的独特工作电流值从数据库访问，使得可以实现工作电流值以提高系统性能。 可以制造包括多个易失性存储器件的存储器模块。 对应于存储器模块上的特定存储器件的工作电流值可以存储在数据库中，并且在系统中的存储器模块的制造期间或实现期间被访问。 可以通过实现与存储器模块上的特定存储器设备相对应的独特的工作电流值来优化系统性能。

    Low power memory module using restricted RAM activation
    7.
    发明授权
    Low power memory module using restricted RAM activation 失效

    公开(公告)号：US06625049B2

    公开(公告)日：2003-09-23

    申请号：US10035728

    申请日：2001-12-20

    Applicant: Scott Schaefer

    Inventor： Scott Schaefer

    IPC: G11C506

    CPC classification number: G11C7/22 ,  G11C8/12

    Abstract: A memory module for an electronic device is disclosed which provides means for reducing the amount of power necessary to access a desired number of data bits. This provides a design of memory modules which requires fewer DRAMs to be turned on during a read or write cycle than present module designs, thereby using much less power.

    Memory array using selective device activation
    9.
    发明授权
    Memory array using selective device activation 失效

    公开(公告)号：US5719817A

    公开(公告)日：1998-02-17

    申请号：US727836

    申请日：1996-10-15

    Applicant: Scott Schaefer

    Inventor： Scott Schaefer

    IPC: G11C7/22 ,  G11C8/12 ,  G11C7/00

    CPC classification number: G11C7/22 ,  G11C8/12

    Abstract: A memory array for an electronic device comprises a design which requires fewer memory devices to be activated to access a plurality of data bits, thereby reducing the amount of power required to access the data bits. The design comprises the use of a plurality of memory devices, each of which has a plurality of arrays and data out lines.

    Auto-precharge during bank selection
    10.
    发明授权
    Auto-precharge during bank selection 失效
    银行选择期间自动预充电

    公开(公告)号：US5636173A

    公开(公告)日：1997-06-03

    申请号：US480154

    申请日：1995-06-07

    Applicant: Scott Schaefer

    Inventor： Scott Schaefer

    IPC: G11C7/10 ,  G11C7/12 ,  G11C8/00

    CPC classification number: G11C8/04 ,  G11C7/1072 ,  G11C7/12

    Abstract: A synchronous dynamic random access memory (SDRAM) is responsive to command signals and includes a first bank memory array and a second bank memory array. A command decoder/controller responds to command signals to initiate, in a first system clock cycle, an active command controlling an active operation on the first bank memory array and to initiate, in a second system clock cycle, a transfer read or write command controlling a read or write transfer operation for transferring data from or to the first bank memory array. The command controller responds to the active command to automatically initiate, in the second system clock cycle, a precharge command controlling a precharge operation on the second bank memory array.

    Abstract translation: 同步动态随机存取存储器（SDRAM）响应于命令信号并且包括第一存储体阵列和第二存储体阵列。 命令解码器/控制器响应于命令信号，以在第一系统时钟周期中启动控制第一存储体阵列上的有效操作的有效命令，并且在第二系统时钟周期中启动传输读或写命令控制 用于从第一组存储器阵列传送数据的读或写转移操作。 命令控制器响应于激活命令，在第二系统时钟周期中自动地启动控制第二存储体阵列上的预充电操作的预充电指令。

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