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公开(公告)号：US06524901B1
公开(公告)日：2003-02-25
申请号：US10176228
申请日：2002-06-20
申请人： Jigish D. Trivedi
发明人： Jigish D. Trivedi
IPC分类号： H01L21338
CPC分类号： H01L29/66545 , H01L21/28114 , H01L29/42376
摘要： Methods for forming notched gates and semiconductor devices utilizing the notched gates are provided. The methods utilize the formation of a dummy gate on a substrate. The dummy gate is etched to form notches in the dummy gate, and sidewall spacers are formed on the sidewalls of the notched dummy gate. The dummy gate is removed, and a notched gate is formed. The methods allow the height and depth of the notches to be independently controlled, and transistors having shorter channel lengths are formed.
摘要翻译： 提供了用于形成具有凹口的栅极和半导体器件的方法。 该方法利用在衬底上形成虚拟栅极。 蚀刻虚拟栅极以在虚拟栅极中形成凹口，并且在缺口伪栅极的侧壁上形成侧壁间隔物。 去除虚拟栅极，形成有缺口的栅极。 这些方法允许独立地控制凹口的高度和深度，并且形成具有较短沟道长度的晶体管。
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公开(公告)号：US06468905B1
公开(公告)日：2002-10-22
申请号：US09596231
申请日：2000-06-13
申请人： Yongjun Hu , Jigish D. Trivedi
发明人： Yongjun Hu , Jigish D. Trivedi
IPC分类号： H01L2144
CPC分类号： H01L21/76895 , H01L21/76889 , H01L23/49866 , H01L2924/0002 , Y10S257/915 , Y10T428/12576 , H01L2924/00
摘要： Methods of forming refractory metal silicide components are described. In accordance with one implementation, a refractory metal layer is formed over a substrate. A silicon-containing structure is formed over the refractory metal layer and a silicon diffusion restricting layer is formed over at least some of the silicon-containing structure. The substrate is subsequently annealed at a temperature which is sufficient to cause a reaction between at least some of the refractory metal layer and at least some of the silicon-containing structure to at least partially form a refractory metal silicide component. In accordance with one aspect of the invention, a silicon diffusion restricting layer is formed over or within the refractory metal layer in a step which is common with the forming of the silicon diffusion restricting layer over the silicon-containing structure. In a preferred implementation, the silicon diffusion restricting layers are formed by exposing the substrate to nitridizing conditions which are sufficient to form a nitride-containing layer over the silicon-containing structure, and a refractory metal nitride compound within the refractory metal layer. A preferred refractory metal is titanium.
摘要翻译： 描述形成难熔金属硅化物组分的方法。 根据一个实施方案，在衬底上形成难熔金属层。 在难熔金属层之上形成含硅结构，并且在至少一些含硅结构上形成硅扩散限制层。 随后在足以使至少一些难熔金属层与至少一些含硅结构之间的反应至少部分地形成难熔金属硅化物组分的温度下进行退火。 根据本发明的一个方面，在与含硅结构上形成硅扩散限制层相同的步骤中，在难熔金属层之上或之内形成硅扩散限制层。 在优选的实施方案中，硅扩散限制层是通过将衬底暴露于足以在含硅结构上形成含氮化物层的氮化条件和难熔金属层内的难熔金属氮化物化合物而形成的。 优选的难熔金属是钛。
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公开(公告)号：US6127270A
公开(公告)日：2000-10-03
申请号：US910908
申请日：1997-08-13
申请人： Yongjun Hu , Jigish D. Trivedi
发明人： Yongjun Hu , Jigish D. Trivedi
IPC分类号： H01L21/768 , H01L23/498 , H01L21/44
CPC分类号： H01L21/76895 , H01L21/76889 , H01L23/49866 , H01L2924/0002 , Y10S257/915 , Y10T428/12576
摘要： Methods of forming refractory metal silicide components are described. In accordance with one implementation, a refractory metal layer is formed over a substrate. A silicon-containing structure is formed over the refractory metal layer and a silicon diffusion restricting layer is formed over at least some of the silicon-containing structure. The substrate is subsequently annealed at a temperature which is sufficient to cause a reaction between at least some of the refractory metal layer and at least some of the silicon-containing structure to at least partially form a refractory metal silicide component. In accordance with one aspect of the invention, a silicon diffusion restricting layer is formed over or within the refractory metal layer in a step which is common with the forming of the silicon diffusion restricting layer over the silicon-containing structure. In a preferred implementation, the silicon diffusion restricting layers are formed by exposing the substrate to nitridizing conditions which are sufficient to form a nitride-containing layer over the silicon-containing structure, and a refractory metal nitride compound within the refractory metal layer. A preferred refractory metal is titanium.
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公开(公告)号：US5847463A
公开(公告)日：1998-12-08
申请号：US916356
申请日：1997-08-22
申请人： Jigish D. Trivedi , Ravi Iyer
发明人： Jigish D. Trivedi , Ravi Iyer
IPC分类号： H01L21/60 , H01L21/768 , H01L23/485 , H01L23/532 , H01L29/45 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/76865 , H01L21/76843 , H01L21/76846 , H01L21/7685 , H01L21/76855 , H01L21/76856 , H01L21/76864 , H01L21/76895 , H01L21/76897 , H01L23/485 , H01L23/53223 , H01L23/53238 , H01L23/53257 , H01L29/456 , H01L2221/1078 , H01L2924/0002
摘要： A method of forming a local interconnect structure is provided. A first barrier layer comprising sputtered titanium nitride is formed over a topographical structure situated upon a field oxide region within a semiconductor substrate. A hard mask layer comprising tungsten silicide is formed over the first barrier layer. A photoresist layer is then formed over the hard mask layer. The hard mask layer is selectively removed from above an adjacent gate stack on the semiconductor substrate using an etch that is selective to the first barrier layer. The first barrier layer is selectively removed using an etch that is selective to the hard mask layer. A silica layer is formed over the hard mask layer. A recess is formed in the silica layer that is aligned with an active area within the semiconductor substrate. The recess is filled with an electrically conductive material. A second method of forming a local interconnect structure is provided comprising forming a first barrier layer comprising sputter titanium nitride over a semiconductor substrate having a topographical structure situated upon a field oxide region within the semiconductor substrate. A first electrically conductive layer comprising tungsten is then formed over the first barrier layer using chemical vapor deposition. The first electrically conductive layer provides good step coverage over the topographical structure. A second barrier layer comprising sputtered titanium nitride is formed over the first electrically conductive layer. A hard mask layer comprising polysilicon or silica is then formed over the second barrier layer. The hard mask is selectively removed from above an adjacent gate stack on the semiconductor substrate with an etch that is selective to the second barrier layer. The second barrier layer, the first conductive layer, and the first barrier layer are selectively removed, thereby exposing the underlying gate stack on the semiconductor substrate using a chemical etch selective to the hard mask layer. A silica layer is then formed with a recess therein that is filled with an electrically conductive material to form an active area contact through the local interconnect structure.
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公开(公告)号：US08319280B2
公开(公告)日：2012-11-27
申请号：US13231554
申请日：2011-09-13
IPC分类号： H01L29/66
CPC分类号： H01L29/66621 , H01L27/10876
摘要： Semiconductor memory devices having recessed access devices are disclosed. In some embodiments, a method of forming the recessed access device includes forming a device recess in a substrate material that extends to a first depth in the substrate that includes a gate oxide layer in the recess. The device recess may be extended to a second depth that is greater that the first depth to form an extended portion of the device recess. A field oxide layer may be provided within an interior of the device recess that extends inwardly into the interior of the device recess and into the substrate. Active regions may be formed in the substrate that abut the field oxide layer, and a gate material may be deposited into the device recess.
摘要翻译： 公开了具有凹陷接入装置的半导体存储器件。 在一些实施例中，形成凹陷进入装置的方法包括在衬底材料中形成器件凹部，该衬底材料延伸到衬底中的第一深度，该第一深度包括凹陷中的栅极氧化物层。 装置凹部可以延伸到大于第一深度的第二深度，以形成装置凹部的延伸部分。 场氧化物层可以设置在器件凹部的内部，其内部延伸到器件凹部的内部并进入衬底。 活性区域可以形成在衬底中，其邻接场氧化物层，并且栅极材料可以沉积到器件凹部中。
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公开(公告)号：US20120199908A1
公开(公告)日：2012-08-09
申请号：US13445711
申请日：2012-04-12
申请人： Suraj Mathew , Jigish D. Trivedi
发明人： Suraj Mathew , Jigish D. Trivedi
IPC分类号： H01L27/12
CPC分类号： G11C7/00 , H01L21/84 , H01L27/108 , H01L27/10802 , H01L27/10882 , H01L27/1203 , H01L29/7841
摘要： A method of forming capacitorless DRAM over localized silicon-on-insulator comprises the following steps: A silicon substrate is provided, and an array of silicon studs is defined within the silicon substrate. An insulator layer is defined atop at least a portion of the silicon substrate, and between the silicon studs. A silicon-over-insulator layer is defined surrounding the silicon studs atop the insulator layer, and a capacitorless DRAM is formed within and above the silicon-over-insulator layer.
摘要翻译： 在局部绝缘体上形成无电容器DRAM的方法包括以下步骤：提供硅衬底，并且硅衬底阵列限定在硅衬底内。 绝缘体层限定在硅衬底的至少一部分之上，并且在硅柱之间。 围绕绝缘体层上方的硅柱的绝缘体层被限定，并且在绝缘体上硅层内部和上方形成无电容的DRAM。
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47.发明申请Methods of Forming Recessed Access Devices Associated with Semiconductor Constructions 有权形成与半导体结构相关的嵌入式接入设备的方法公开(公告)号：US20110117725A1
公开(公告)日：2011-05-19
申请号：US13012675
申请日：2011-01-24
IPC分类号： H01L21/76
CPC分类号： H01L27/10876 , H01L27/10823
摘要： The invention includes methods of forming recessed access devices. A substrate is provided to have recessed access device trenches therein. A pair of the recessed access device trenches are adjacent one another. Electrically conductive material is formed within the recessed access device trenches, and source/drain regions are formed proximate the electrically conductive material. The electrically conductive material and source/drain regions together are incorporated into a pair of adjacent recessed access devices. After the recessed access device trenches are formed within the substrate, an isolation region trench is formed between the adjacent recessed access devices and filled with electrically insulative material to form a trenched isolation region.
摘要翻译： 本发明包括形成凹入进入装置的方法。 提供基板以在其中具有凹入的接入装置沟槽。 一对凹进的接入设备沟槽彼此相邻。 导电材料形成在凹进的存取装置沟槽内，源极/漏极区域靠近导电材料形成。 导电材料和源极/漏极区域一起被并入一对相邻的凹进入器件中。 在凹陷的访问设备沟槽形成在衬底内之后，在相邻的凹进的访问设备之间形成隔离区沟槽，并且填充有电绝缘材料以形成沟槽隔离区域。
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公开(公告)号：US07919829B2
公开(公告)日：2011-04-05
申请号：US11846427
申请日：2007-08-28
IPC分类号： H01L29/00
CPC分类号： H01L21/76224 , H01L21/76227
摘要： A method of depositing dielectric material into sub-micron spaces and resultant structures is provided. After a trench is etched in the surface of a wafer, a silicon nitride barrier is deposited into the trench. The silicon nitride layer has a high nitrogen content near the trench walls to protect the walls. The silicon nitride layer further from the trench walls has a low nitrogen content and a high silicon content, to allow improved adhesion. The trench is then filled with a spin-on precursor. A densification or reaction process is then applied to convert the spin-on material into an insulator. The resulting trench has a well-adhered insulator which helps the insulating properties of the trench.
摘要翻译： 提供了将电介质材料沉积到亚微米空间和结构中的方法。 在晶片的表面蚀刻沟槽之后，将氮化硅屏障沉积到沟槽中。 氮化硅层在沟壁附近具有高氮含量以保护壁。 进一步从沟槽壁的氮化硅层具有低的氮含量和高的硅含量，以提高粘附性。 然后用旋涂前体填充沟槽。 然后施加致密化或反应过程以将旋涂材料转化成绝缘体。 所得的沟槽具有良好粘附的绝缘体，其有助于沟槽的绝缘性能。
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公开(公告)号：US07897460B2
公开(公告)日：2011-03-01
申请号：US12051620
申请日：2008-03-19
IPC分类号： H01L21/336
CPC分类号： H01L27/10876 , H01L27/10823
摘要： The invention includes methods of forming recessed access devices. A substrate is provided to have recessed access device trenches therein. A pair of the recessed access device trenches are adjacent one another. Electrically conductive material is formed within the recessed access device trenches, and source/drain regions are formed proximate the electrically conductive material. The electrically conductive material and source/drain regions together are incorporated into a pair of adjacent recessed access devices. After the recessed access device trenches are formed within the substrate, an isolation region trench is formed between the adjacent recessed access devices and filled with electrically insulative material to form a trenched isolation region.
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公开(公告)号：US20110020988A1
公开(公告)日：2011-01-27
申请号：US12897999
申请日：2010-10-05
申请人： SURAJ MATHEW , Jigish D. Trivedi
发明人： SURAJ MATHEW , Jigish D. Trivedi
CPC分类号： G11C7/00 , H01L21/84 , H01L27/108 , H01L27/10802 , H01L27/10882 , H01L27/1203 , H01L29/7841
摘要： A method of forming capacitorless DRAM over localized silicon-on-insulator comprises the following steps: A silicon substrate is provided, and an array of silicon studs is defined within the silicon substrate. An insulator layer is defined atop at least a portion of the silicon substrate, and between the silicon studs. A silicon-over-insulator layer is defined surrounding the silicon studs atop the insulator layer, and a capacitorless DRAM is formed within and above the silicon-over-insulator layer.
摘要翻译： 在局部绝缘体上形成无电容器DRAM的方法包括以下步骤：提供硅衬底，并且硅衬底阵列限定在硅衬底内。 绝缘体层限定在硅衬底的至少一部分之上，并且在硅柱之间。 围绕绝缘体层上方的硅柱的绝缘体层被限定，并且在绝缘体上硅层内部和上方形成无电容的DRAM。
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