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    Multicore Processor and Method of Use That Adapts Core Functions Based on Workload Execution
    41.
    发明申请
    Multicore Processor and Method of Use That Adapts Core Functions Based on Workload Execution 有权
    多核处理器和基于工作负载执行的核心功能的使用方法

    公开(公告)号：US20100049963A1

    公开(公告)日：2010-02-25

    申请号：US12197357

    申请日：2008-08-25

    申请人： Robert H. Bell, JR. ,  Louis Bennie Capps, JR. ,  Thomas Edward Cook ,  Glenn G. Daves ,  Ronald Edward Newhart ,  Michael A. Paolini ,  Michael Jay Shapiro

    发明人： Robert H. Bell, JR. ,  Louis Bennie Capps, JR. ,  Thomas Edward Cook ,  Glenn G. Daves ,  Ronald Edward Newhart ,  Michael A. Paolini ,  Michael Jay Shapiro

    IPC分类号： G06F9/00

    CPC分类号： G06F15/7871

    摘要： A processor has multiple cores with each core having an associated function to support processor operations. The functions performed by the cores are selectively altered to improve processor operations by balancing the resources applied for each function. For example, each core comprises a field programmable array that is selectively and dynamically programmed to perform a function, such as a floating point function or a fixed point function, based on the number of operations that use each function. As another example, a processor is built with a greater number of cores than can be simultaneously powered, each core associated with a function, so that cores having functions with lower utilization are selectively powered down.

    摘要翻译： 处理器具有多个核心，每个核心具有相关功能以支持处理器操作。 通过平衡应用于每个功能的资源，选择性地改变由核执行的功能以改善处理器操作。 例如，每个核心包括一个现场可编程阵列，该阵列可以根据使用每个功能的操作次数，选择性地和动态地编程来执行诸如浮点函数或固定点功能的功能。 作为另一示例，处理器被构建为具有比可以同时供电的更多数量的核，每个核与功能相关联，使得具有较低利用率的功能的核被选择性地关机。

    Dynamic instruction execution using distributed transaction priority registers
    44.
    发明申请
    Dynamic instruction execution using distributed transaction priority registers 审中-公开
    使用分布式事务优先级寄存器的动态指令执行

    公开(公告)号：US20090138683A1

    公开(公告)日：2009-05-28

    申请号：US11946615

    申请日：2007-11-28

    申请人： Louis B. Capps, JR. ,  Robert H. Bell, JR.

    发明人： Louis B. Capps, JR. ,  Robert H. Bell, JR.

    IPC分类号： G06F9/30

    CPC分类号： G06F9/3851 ,  G06F9/30101 ,  G06F9/5011 ,  G06F2209/507 ,  Y02D10/22

    摘要： A method, system and program are provided for dynamically assigning priority values to instruction threads in a computer system based on one or more predetermined thread performance tests, and using the assigned instruction priorities to determine how resources are used in the system. By storing the assigning priority values in thread priority registers distributed throughout the computer system, instructions from different threads that are dispatched through the system are allocated system resources based on the priority values assigned to the respective instruction threads. Priority values for individual threads may be updated with control software which tests thread performance and uses the test results to apply predetermined adjustment policies. The test results may be used to optimize the workload allocation of system resources by dynamically assigning thread priority values to individual threads using any desired policy, such as achieving thread execution balance relative to thresholds and to performance of other threads, reducing thread response time, lowering power consumption, etc.

    摘要翻译： 提供了一种方法，系统和程序，用于基于一个或多个预定的线程性能测试来动态地为计算机系统中的指令线程分配优先级值，并且使用所分配的指令优先级来确定如何在系统中使用资源。 通过将分配的优先级值存储在整个计算机系统中分配的线程优先级寄存器中，基于分配给各个指令线程的优先级值，分配来自系统调度的不同线程的指令被分配给系统资源。 可以使用测试线程性能的控制软件更新各个线程的优先级值，并使用测试结果来应用预定的调整策略。 测试结果可用于通过使用任何期望的策略动态地将线程优先级值分配给各个线程来优化系统资源的工作量分配，例如实现相对于阈值的线程执行平衡以及其他线程的性能，减少线程响应时间，降低 功耗等

    Augmenting of Automated Clustering-Based Trace Sampling Methods by User-Directed Phase Detection
    45.
    发明申请
    Augmenting of Automated Clustering-Based Trace Sampling Methods by User-Directed Phase Detection 有权
    通过用户定向相位检测来增强基于自动聚类的跟踪采样方法

    公开(公告)号：US20090055153A1

    公开(公告)日：2009-02-26

    申请号：US11842337

    申请日：2007-08-21

    申请人： Robert H. Bell, JR. ,  Wen-Tzer Thomas Chen ,  Pattabi R. Seshadri ,  John-David Wellman

    发明人： Robert H. Bell, JR. ,  Wen-Tzer Thomas Chen ,  Pattabi R. Seshadri ,  John-David Wellman

    IPC分类号： G06F9/455

    CPC分类号： G06F9/455 ,  G06F11/3636 ,  G06F11/3664

    摘要： Computer implemented method, system, and computer usable program code for simulating processor operation in a data processing system. An instruction trace is generated, wherein the instruction trace includes markers specified by a user for identifying interval boundaries for at least one interval of the instruction trace. The instruction trace is divided into a plurality of intervals in consideration of the markers, and the plurality of intervals are formed into a plurality of interval clusters, wherein each interval cluster represents one phase of execution of the instruction trace. At least one interval from each of the plurality of interval clusters is selected as a trace sample to provide a plurality of trace samples, wherein each selected interval is of at least a minimum size, a simulation is performed using the plurality of trace samples, and a result of the simulation is provided to the user.

    摘要翻译： 用于在数据处理系统中模拟处理器操作的计算机实现的方法，系统和计算机可用程序代码。 生成指令轨迹，其中指令轨迹包括由用户指定的用于识别指令轨迹的至少一个间隔的间隔边界的标记。 考虑到标记，指令轨迹被分成多个间隔，并且多个间隔被形成为多个间隔簇，其中每个间隔簇表示指令轨迹的执行的一个阶段。 选择来自多个间隔群集中的每一个的至少一个间隔作为跟踪样本以提供多个跟踪样本，其中每个选择的间隔至少为最小尺寸，使用多个迹线样本进行模拟，以及 向用户提供模拟的结果。

    Scaling Instruction Intervals to Identify Collection Points for Representative Instruction Traces
    46.
    发明申请
    Scaling Instruction Intervals to Identify Collection Points for Representative Instruction Traces 失效
    缩放指令间隔以识别代表性指令跟踪的收集点

    公开(公告)号：US20080307203A1

    公开(公告)日：2008-12-11

    申请号：US11758031

    申请日：2007-06-05

    申请人： Robert H. Bell, JR. ,  Wen-Tzer T. Chen ,  Richard J. Eickemeyer ,  Venkat R. Indukuru ,  Pattabi M. Seshadri ,  Madhavi G. Valluri

    发明人： Robert H. Bell, JR. ,  Wen-Tzer T. Chen ,  Richard J. Eickemeyer ,  Venkat R. Indukuru ,  Pattabi M. Seshadri ,  Madhavi G. Valluri

    IPC分类号： G06F9/30

    CPC分类号： G06F11/36

    摘要： A method, system, and computer program product are provided for identifying instructions to obtain representative traces. A phase instruction budget is calculated for each phase in a set of phases. The phase instruction budget is based on a weight associated with each phase and a global instruction budget. A starting index and an ending index are identified for instructions within a set of intervals in each phase in order to meet the phase instruction budget for that phase, thereby forming a set of interval indices. A determination is made as to whether the instructions within the set of interval indices meet the global instruction budget. Responsive to the global instruction budget being met, the set of interval indices are output as collection points for the representative traces.

    摘要翻译： 提供方法，系统和计算机程序产品用于识别指令以获得代表性迹线。 针对一组阶段中的每个阶段计算相位指令预算。 相位指令预算基于与每个阶段相关联的权重和全局指令预算。 为了满足该阶段的相位指令预算，为每个阶段的一组间隔内的指令识别开始索引和结束索引，从而形成一组间隔索引。 确定区间指标集内的指令是否符合全球指令预算。 响应于满足全球指令预算，间隔指数的集合作为代表性跟踪的收集点输出。