公开(公告)号：US07064393B2

公开(公告)日：2006-06-20

申请号：US10783844

申请日：2004-02-20

申请人： Markus Paul Josef Mergens ,  Cornelius Christian Russ ,  John Armer ,  Koen Gerard Maria Verhaege ,  Phillip Czeslaw Jozwiak

发明人： Markus Paul Josef Mergens ,  Cornelius Christian Russ ,  John Armer ,  Koen Gerard Maria Verhaege ,  Phillip Czeslaw Jozwiak

IPC分类号： H01L23/62

CPC分类号： H01L27/0262 ,  H01L27/0292

摘要： An electrostatic discharge (ESD) protection device having high holding current for latch-up immunity. The ESD protection circuit is formed in a semiconductor integrated circuit (IC) having protected circuitry. The ESD protection device includes a silicon controlled rectifier (SCR) coupled between a protected supply line of the IC and ground. A trigger device is coupled from the supply line to a first gate of the SCR, and a first substrate resistor is coupled between the first gate and ground. A first shunt resistor is coupled between the first gate and ground, wherein the shunt resistor has a resistance value lower than the substrate resistor.

公开(公告)号：US06898062B2

公开(公告)日：2005-05-24

申请号：US10822912

申请日：2004-04-12

申请人： Cornelius Christian Russ ,  John Armer ,  Markus Paul Josef Mergens ,  Phillip Czeslaw Jozwiak

发明人： Cornelius Christian Russ ,  John Armer ,  Markus Paul Josef Mergens ,  Phillip Czeslaw Jozwiak

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8238 ,  H01L27/02 ,  H01L27/06 ,  H01L27/092 ,  H02H9/00

CPC分类号： H01L29/0847 ,  H01L27/0266 ,  H01L29/0653 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

摘要： An ESD protection circuit for a semiconductor integrated circuit (IC) having protected circuitry, includes an SCR having at least one finger. Each finger includes a PNP transistor and an NPN transistor, where an emitter of the PNP and NPN transistors is respectively coupled between an I/O pad of the IC and ground, a base of the PNP transistor being coupled to a collector of the NPN transistor, and a base of the NPN transistor being coupled to a collector of the PNP transistor. The NPN transistor of each finger further includes a first gate for triggering said finger. A PMOS transistor includes a source and a drain respectively coupled to the I/O pad of the IC and the first gate of the NPN transistor. Further, a gate of the PMOS transistor is coupled to a supply voltage of the IC.

摘要翻译： 具有受保护电路的半导体集成电路（IC）的ESD保护电路包括具有至少一个手指的SCR。 每个手指包括PNP晶体管和NPN晶体管，其中PNP和NPN晶体管的发射极分别耦合在IC的I / O焊盘和地之间，PNP晶体管的基极耦合到NPN晶体管的集电极 ，并且NPN晶体管的基极耦合到PNP晶体管的集电极。 每个手指的NPN晶体管还包括用于触发所述手指的第一门。 PMOS晶体管包括分别耦合到IC的I / O焊盘和NPN晶体管的第一栅极的源极和漏极。 此外，PMOS晶体管的栅极耦合到IC的电源电压。

公开(公告)号：US06850397B2

公开(公告)日：2005-02-01

申请号：US10648545

申请日：2003-08-25

申请人： Cornelius Christian Russ ,  Markus Paul Josef Mergens ,  John Armer ,  Koen Gerard Maria Verhaege

发明人： Cornelius Christian Russ ,  Markus Paul Josef Mergens ,  John Armer ,  Koen Gerard Maria Verhaege

IPC分类号： H01L27/02 ,  H01L29/74 ,  H02H9/04 ,  H01L23/62

CPC分类号： H01L27/0262 ,  H01L29/87

摘要： An electrostatic discharge (ESD) protection device, for protecting power lines of an integrated circuit. In one embodiment, the ESD protection device includes a first silicon controlled rectifier (SCR) coupled between a first power line and a second power line, and a second SCR coupled anti-parallel to the first SCR between the first and second power lines. A first trigger device is coupled to the first power line and a first trigger gate of the first SCR, and a second trigger device coupled to the second power line and a first trigger gate of the second SCR. The trigger devices and the SCRs provide power-down-mode-compatible operation of the power lines, as well as ESD protection.

摘要翻译： 一种静电放电（ESD）保护装置，用于保护集成电路的电源线。 在一个实施例中，ESD保护装置包括耦合在第一电力线和第二电力线之间的第一可控硅整流器（SCR）和与第一和第二电力线之间的第一SCR反并联的第二SCR。 第一触发装置耦合到第一SCR的第一电源线和第一触发栅极，以及耦合到第二电力线的第二触发装置和第二SCR的第一触发栅极。 触发器件和SCR提供电源线的掉电模式兼容操作以及ESD保护。

公开(公告)号：US06803633B2

公开(公告)日：2004-10-12

申请号：US10099263

申请日：2002-03-15

申请人： Markus Paul Josef Mergens ,  Cornelius Christian Russ ,  John Armer ,  Koen Gerard Maria Verhaege ,  Phillip Czeslaw Jozwiak

发明人： Markus Paul Josef Mergens ,  Cornelius Christian Russ ,  John Armer ,  Koen Gerard Maria Verhaege ,  Phillip Czeslaw Jozwiak

IPC分类号： H01L2362

CPC分类号： H01L27/0262 ,  H01L27/0292

摘要： An electrostatic discharge (ESD) protection device having high holding current for latch-up immunity. The ESD protection circuit is formed in a semiconductor integrated circuit (IC) having protected circuitry. The ESD protection device includes a silicon controlled rectifier (SCR) coupled between a protected supply line of the IC and ground. A trigger device is coupled from the supply line to a first gate of the SCR, and a first substrate resistor is coupled between the first gate and ground. A first shunt resistor is coupled between the first gate and ground, wherein the shunt resistor has a resistance value lower than the substrate resistor.

公开(公告)号：US06768616B2

公开(公告)日：2004-07-27

申请号：US10099600

申请日：2002-03-15

申请人： Markus Paul Josef Mergens ,  Cornelius Christian Russ ,  John Armer ,  Koen Gerard Maria Verhaege

发明人： Markus Paul Josef Mergens ,  Cornelius Christian Russ ,  John Armer ,  Koen Gerard Maria Verhaege

IPC分类号： H02H322

CPC分类号： H01L27/0262 ,  H01L27/0251 ,  H01L29/866 ,  H03K17/0812 ,  H03K17/0814 ,  H03K17/305

摘要： An electrostatic discharge (ESD) protection circuit in a semiconductor integrated circuit (IC) having protected circuitry. In one embodiment, the ESD protection circuit includes a pad, adapted for connection to a protected circuit node of the IC, and an ESD protection device, which is coupled between the pad and ground. A diode turn-on device is coupled in a forward conduction direction from the pad to a first gate of the ESD protection device. In a second embodiment, the ESD protection circuit is an SCR having an anode coupled to a first voltage supply line, and a cathode coupled to ground. A parasitic capacitance is coupled between each the voltage supply line and the grounded cathode.

摘要翻译： 具有保护电路的半导体集成电路（IC）中的静电放电（ESD）保护电路。 在一个实施例中，ESD保护电路包括适于连接到IC的受保护电路节点的焊盘和耦合在焊盘和接地之间的ESD保护装置。 二极管导通装置从正面传导方向耦合到ESD保护装置的第一栅极。 在第二实施例中，ESD保护电路是具有耦合到第一电压供应线的阳极和耦合到地的阴极的SCR。 寄生电容耦合在每个电源线和接地阴极之间。

公开(公告)号：US06583972B2

公开(公告)日：2003-06-24

申请号：US09881422

申请日：2001-06-14

申请人： Koen Gerard Maria Verhaege ,  Markus Paul Josef Mergens ,  Cornelius Christian Russ ,  John Armer ,  Phillip Czeslaw Jozwiak

发明人： Koen Gerard Maria Verhaege ,  Markus Paul Josef Mergens ,  Cornelius Christian Russ ,  John Armer ,  Phillip Czeslaw Jozwiak

IPC分类号： H02H900

CPC分类号： H01L27/0266 ,  H01L2924/0002 ,  H01L2924/00

摘要： A multi-finger electro-static discharge (ESD) protection circuit has at least two first resistive channels defining input fingers. At least two field effect transistor (FET) channels, each having a drain and source are connected to corresponding ones of the at least two input fingers. The gate terminals of at least one of the at least two FETs are configured to be biased by an ESD potential applied to the drain electrodes to reduce the turn-on potential of the ESD device. At least two second resistive channels are connected between a corresponding one of the source terminals of the at least two FETs and a circuit return path.