Method And System For Memory Block Flushing
    41.
    发明申请
    Method And System For Memory Block Flushing 有权
    内存块冲洗的方法和系统

    公开(公告)号:US20080307164A1

    公开(公告)日:2008-12-11

    申请号:US12036023

    申请日:2008-02-22

    申请人: Alan W. Sinclair

    发明人: Alan W. Sinclair

    IPC分类号: G06F12/00

    摘要: A method and system for flushing physical memory blocks in a memory device is disclosed. The method includes detecting a quantity of available memory, background flushing partially obsolete memory blocks if the quantity decreases to a background activation threshold, disabling the background flushing if the quantity increases to a background deactivation threshold, foreground flushing the partially obsolete memory blocks if the quantity decreases to a foreground activation threshold, and disabling the foreground flushing if the quantity increases to a foreground deactivation threshold. The thresholds may be adaptively defined. The background flushing may occur when the host interface is idle. The foreground flushing may interleave writing operations with flushing operations while a write command is unfinished. The system includes a memory for receiving data with a host write command, and a controller for detecting a quantity of available memory and enabling and disabling background and foreground flushing depending on adaptive thresholds.

    摘要翻译: 公开了一种用于冲洗存储器件中物理存储器块的方法和系统。 该方法包括检测可用存储器的数量,如果数量减少到背景激活阈值,则背景冲洗部分过时的存储器块,如果数量增加到后台去激活阈值则禁用后台刷新,如果数量增加,则前台刷新部分过时的存储器块 降低到前台激活阈值,如果数量增加到前景去激活阈值,则禁用前台刷新。 可以自适应地定义阈值。 当主机接口空闲时,可能会发生后台刷新。 当写入命令未完成时,前台冲洗可能会使写入操作与冲洗操作交错。 该系统包括用于通过主机写入命令接收数据的存储器,以及用于检测可用存储器的数量并根据自适应阈值启用和禁用背景和前台冲洗的控制器。

    Method of Interfacing A Host Operating Through A Logical Address Space With A Direct File STorage Medium
    42.
    发明申请
    Method of Interfacing A Host Operating Through A Logical Address Space With A Direct File STorage Medium 有权
    通过直接文件存储介质通过逻辑地址空间操作的主机的接口方法

    公开(公告)号:US20080307155A1

    公开(公告)日:2008-12-11

    申请号:US11760469

    申请日:2007-06-08

    申请人: Alan W. Sinclair

    发明人: Alan W. Sinclair

    IPC分类号: G06F12/02

    摘要: A method and system for interfacing a system operating through a logical address space with a direct file storage (DFS) medium is disclosed. The method includes receiving data associated with addresses in a logical block address (LBA) format from a host system and generating file objects manageable by the DFS medium based on a determination of the correlation of the LBA data to host file data. The memory system includes non-volatile memory using the DFS format, an interface for receiving LBA format data, and a controller configured to communicate with the host via an LBA interface and generate file objects from the LBA format data correlated to the host application files usable by the memory system.

    摘要翻译: 公开了一种用于将通过逻辑地址空间操作的系统与直接文件存储(DFS)介质进行接口的方法和系统。 该方法包括:从主机系统接收与逻辑块地址(LBA)格式相关联的数据,并且基于LBA数据与主机文件数据的相关性的确定,生成由DFS介质可管理的文件对象。 存储器系统包括使用DFS格式的非易失性存储器,用于接收LBA格式数据的接口,以及被配置为经由LBA接口与主机进行通信并由LBA格式生成与主机应用程序文件可用的数据相关的文件对象的控制器 由内存系统。

    Cyclic flash memory wear leveling
    43.
    发明授权
    Cyclic flash memory wear leveling 有权
    循环闪存磨损均匀

    公开(公告)号:US07441067B2

    公开(公告)日:2008-10-21

    申请号:US10990189

    申请日:2004-11-15

    IPC分类号: G06F12/00 G11C16/04

    摘要: A re-programmable non-volatile memory system, such as a flash EEPROM system, having its memory cells grouped into blocks of cells that are simultaneously erasable is operated in a manner to level out the wear of the individual blocks through repetitive erasing and re-programming. This may be accomplished without use of counts of the number of times the individual blocks experience erase and re-programming but such counts can optionally aid in carrying out the wear leveling process. Individual active physical blocks are chosen to be exchanged with those of an erased block pool in a predefined order.

    摘要翻译: 将其存储单元分组为同时可擦除的单元块的诸如闪存EEPROM系统的可重新编程的非易失性存储器系统以通过重复擦除和重新排列来平衡各个块的磨损的方式操作, 编程。 这可以在不使用单个块经历擦除和重新编程的次数的计数的情况下实现,但是这样的计数可以可选地有助于执行磨损均衡过程。 选择单独的活动物理块以按预定义的顺序与擦除的块池的块进行交换。

    Use of a Direct Data File System With a Continuous Logical Address Space Interface
    44.
    发明申请
    Use of a Direct Data File System With a Continuous Logical Address Space Interface 有权
    使用具有连续逻辑地址空间接口的直接数据文件系统

    公开(公告)号:US20080155178A1

    公开(公告)日:2008-06-26

    申请号:US11616242

    申请日:2006-12-26

    IPC分类号: G06F12/02 G06F12/06

    CPC分类号: G06F12/0246 G06F2212/7202

    摘要: Data files are assigned addresses within one or more logical blocks of a continuous logical address space interface (LBA interface) of a usual type of flash memory system with physical memory cell blocks. This assignment may be done by the host device which typically, but not necessarily, generates the data files. The number of logical blocks containing data of any one file is controlled in a manner that reduces the amount of fragmentation of file data within the physical memory blocks, thereby to maintain good memory performance. The host may configure the logical blocks of the address space in response to learning the physical characteristics of a memory to which it is connected.

    摘要翻译: 数据文件在具有物理存储器单元块的通常类型的闪存系统的连续逻辑地址空间接口(LBA接口)的一个或多个逻辑块内被分配地址。 该分配可以由主机设备完成,主机设备通常但不一定生成数据文件。 以减少物理存储器块内的文件数据的分段量的方式控制包含任何一个文件的数据的逻辑块的数量,从而保持良好的存储器性能。 响应于学习与其连接的存储器的物理特性,主机可以配置地址空间的逻辑块。

    Configuration of Host LBA Interface With Flash Memory
    45.
    发明申请
    Configuration of Host LBA Interface With Flash Memory 有权
    使用闪存配置主机LBA接口

    公开(公告)号:US20080155177A1

    公开(公告)日:2008-06-26

    申请号:US11616231

    申请日:2006-12-26

    IPC分类号: G06F12/02

    摘要: Data files are assigned addresses within one or more logical blocks of a continuous logical address space interface (LBA interface) of a usual type of flash memory system with physical memory cell blocks. This assignment may be done by the host device which typically, but not necessarily, generates the data files. The number of logical blocks containing data of any one file is controlled in a manner that reduces the amount of fragmentation of file data within the physical memory blocks, thereby to maintain good memory performance. The host may configure the logical blocks of the address space in response to learning the physical characteristics of a memory to which it is connected.

    摘要翻译: 数据文件在具有物理存储器单元块的通常类型的闪存系统的连续逻辑地址空间接口(LBA接口)的一个或多个逻辑块内被分配地址。 该分配可以由主机设备完成,主机设备通常但不一定生成数据文件。 以减少物理存储器块内的文件数据的分段量的方式控制包含任何一个文件的数据的逻辑块的数量,从而保持良好的存储器性能。 响应于学习与其连接的存储器的物理特性,主机可以配置地址空间的逻辑块。

    Method and system for storage address re-mapping for a memory device
    46.
    发明授权
    Method and system for storage address re-mapping for a memory device 有权
    用于存储设备的存储地址重映射的方法和系统

    公开(公告)号:US09396103B2

    公开(公告)日:2016-07-19

    申请号:US12036014

    申请日:2008-02-22

    IPC分类号: G06F12/02

    摘要: A method and system for storage address re-mapping is disclosed. The method includes allocating logical addresses in blocks of clusters and re-mapping logical addresses into storage address space, where short runs of data dispersed in logical address space are mapped in a contiguous manner into blocks in storage address space. Valid data is flushed from blocks having both valid and obsolete data to make new blocks available for receiving data when an available number of new blocks falls below a desired threshold. The system includes a host file system, processor executable instructions residing on a host separately from the host file system or residing on a flash memory device such as an embedded solid state disk, or a backend memory manager of the flash memory device that is configured to map data from a logical address space to complete blocks in storage address space in a contiguous manner.

    摘要翻译: 公开了一种用于存储地址重映射的方法和系统。 该方法包括:将分组的逻辑地址分配并将逻辑地址重新映射到存储地址空间中,其中分散在逻辑地址空间中的短数据被连续地映射到存储地址空间中的块中。 有效数据从具有有效和过时数据的块中刷新,以使新块可用于在可用数量的新块落在所需阈值以下时接收数据。 该系统包括主机文件系统,驻留在主机上的主机文件系统的处理器可执行指令,或驻留在诸如嵌入式固态盘的闪存设备或闪存设备的后端存储器管理器中,该闪存设备被配置为 从逻辑地址空间映射数据,以连续的方式完成存储地址空间中的块。

    Systems and methods for a mass data storage system having a file-based interface to a host and a non-file-based interface to secondary storage
    47.
    发明授权
    Systems and methods for a mass data storage system having a file-based interface to a host and a non-file-based interface to secondary storage 有权
    大容量数据存储系统的系统和方法具有到主机的基于文件的接口和非辅助存储的非基于文件的接口

    公开(公告)号:US09104315B2

    公开(公告)日:2015-08-11

    申请号:US11196826

    申请日:2005-08-03

    申请人: Alan W. Sinclair

    发明人: Alan W. Sinclair

    摘要: System and method for transferring data between a host system and a data storage system is provided. The system includes an interface that uses a file based protocol to transfer data between the data storage system and the host system, wherein the data storage system includes a first mass storage device and a second mass storage device; wherein the first mass storage device is a solid state non-volatile memory device and the second mass storage device is a non-solid state memory device. The first mass storage device is a flash memory device that operates as a primary storage device that stores data on a file by file basis. The second mass storage device is a magnetic disk drive that operates as secondary storage device and stores data received via a logical interface.

    摘要翻译: 提供了在主机系统和数据存储系统之间传送数据的系统和方法。 该系统包括使用基于文件的协议在数据存储系统和主机系统之间传送数据的接口,其中数据存储系统包括第一大容量存储设备和第二大容量存储设备; 其中所述第一大容量存储装置是固态非易失性存储装置,所述第二大容量存储装置是非固态存储装置。 第一大容量存储设备是作为主存储设备操作的闪存设备,其以文件为单位存储数据。 第二大容量存储设备是作为辅助存储设备操作并存储经由逻辑接口接收的数据的磁盘驱动器。

    Method and system for concurrent background and foreground operations in a non-volatile memory array
    48.
    发明授权
    Method and system for concurrent background and foreground operations in a non-volatile memory array 有权
    用于在非易失性存储器阵列中并发后台和前台操作的方法和系统

    公开(公告)号:US08473669B2

    公开(公告)日:2013-06-25

    申请号:US12632549

    申请日:2009-12-07

    申请人: Alan W. Sinclair

    发明人: Alan W. Sinclair

    IPC分类号: G06F12/00

    摘要: A method and system for permitting host write operations in one part of a flash memory concurrently with another operation in a second part of the flash memory is disclosed. The method includes receiving data at a front end of a memory system, selecting at least one of a plurality of subarrays in the memory system for executing a host write operation, and selecting at least one other subarray in which to execute a second operation. The write operation and second operation are then executed substantially concurrently. The memory system includes a plurality of subarrays, each associated with a separate subarray controller, and a front end controller adapted to select and initiate concurrent operations in the subarrays.

    摘要翻译: 公开了一种用于在闪速存储器的第二部分中与另一操作同时进行闪存的一部分中的主机写入操作的方法和系统。 该方法包括在存储器系统的前端接收数据,选择存储器系统中的多个子阵列中的至少一个用于执行主机写入操作,以及选择至少一个其他子阵列,其中执行第二操作。 然后,基本上同时执行写入操作和第二操作。 存储器系统包括多个子阵列,每个子阵列与单独的子阵列控制器相关联,前端控制器适于在子阵列中选择并启动并发操作。

    Method and system for memory block flushing
    49.
    发明授权
    Method and system for memory block flushing 有权
    记忆块冲洗的方法和系统

    公开(公告)号:US08429352B2

    公开(公告)日:2013-04-23

    申请号:US12036023

    申请日:2008-02-22

    申请人: Alan W. Sinclair

    发明人: Alan W. Sinclair

    IPC分类号: G06F12/02

    摘要: A method and system for flushing physical memory blocks in a memory device is disclosed. The method includes detecting a quantity of available memory, background flushing partially obsolete memory blocks if the quantity decreases to a background activation threshold, disabling the background flushing if the quantity increases to a background deactivation threshold, foreground flushing the partially obsolete memory blocks if the quantity decreases to a foreground activation threshold, and disabling the foreground flushing if the quantity increases to a foreground deactivation threshold. The thresholds may be adaptively defined. The background flushing may occur when the host interface is idle. The foreground flushing may interleave writing operations with flushing operations while a write command is unfinished. The system includes a memory for receiving data with a host write command, and a controller for detecting a quantity of available memory and enabling and disabling background and foreground flushing depending on adaptive thresholds.

    摘要翻译: 公开了一种用于冲洗存储器件中物理存储器块的方法和系统。 该方法包括检测可用存储器的数量,如果数量减少到背景激活阈值,则背景冲洗部分过时的存储器块,如果数量增加到后台去激活阈值则禁用后台刷新,如果数量增加,则前台刷新部分过时的存储器块 降低到前台激活阈值,如果数量增加到前景去激活阈值,则禁用前台刷新。 可以自适应地定义阈值。 当主机接口空闲时,可能会发生后台刷新。 当写入命令未完成时,前台冲洗可能会使写入操作与冲洗操作交错。 该系统包括用于通过主机写入命令接收数据的存储器,以及用于检测可用存储器的数量并根据自适应阈值启用和禁用背景和前台冲洗的控制器。

    Micro-update architecture for address tables
    50.
    发明授权
    Micro-update architecture for address tables 有权
    地址表的微更新体系结构

    公开(公告)号:US08335907B2

    公开(公告)日:2012-12-18

    申请号:US12650182

    申请日:2009-12-30

    IPC分类号: G06F12/00

    摘要: Methods of maintaining an address table for mapping logical addresses to physical addresses include continuously consolidating main address maps and an update address map, and periodically compacting the update address map. Consolidating includes selecting a main address map, reading valid mapping entries from the main and update address maps, constructing a mapping set including the valid mapping entries, and writing the mapping set to a second main address map. The update address map is compacted if a criterion is met, and includes copying the valid mapping entries to an unwritten block or metablock and assigning the unwritten block or metablock as a new update address map. The length of consolidation may depend on the average length of compacted mapping entries following a compaction operation. Increased performance due to lower maintenance overhead may result by using these methods.

    摘要翻译: 维护用于将逻辑地址映射到物理地址的地址表的方法包括连续合并主地址映射和更新地址映射,并且周期性地压缩更新地址映射。 合并包括选择主地址映射,从主地址映射和更新地址映射读取有效的映射条目,构建包括有效映射条目的映射集,以及将映射集写入第二主地址映射。 如果满足标准,则更新地址映射被压缩,并且包括将有效的映射条目复制到未写入的块或元区块,并将未写入的块或元区块分配为新的更新地址映射。 合并的长度可能取决于压实操作之后压实的映射条目的平均长度。 通过使用这些方法可能导致由于较低的维护开销而导致的性能提高。