公开(公告)号：US20160276372A1

公开(公告)日：2016-09-22

申请号：US15082443

申请日：2016-03-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Masahiko HAYAKAWA ,  Shinpei MATSUDA ,  Daisuke MATSUBAYASHI

IPC: H01L27/12 ,  H01L29/49

CPC classification number: H01L29/78648 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/3262 ,  H01L29/045 ,  H01L29/24 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

Abstract: Provided is a semiconductor device including a transistor having excellent electrical characteristics (e.g., on-state current, field-effect mobility, or frequency characteristics) or a semiconductor device including a transistor with high reliability. In the channel width direction of a channel-etched transistor in which an oxide semiconductor film is between first and second gate electrodes, the first and second gate electrodes are connected to each other through an opening portion in first and second gate insulating films. In addition, the first and second gate electrodes surround the oxide semiconductor film in a cross-section in the channel width direction, with the first gate insulating film provided between the first gate electrode and the oxide semiconductor film and the second gate insulating film provided between the second gate electrode and the oxide semiconductor film. Furthermore, the channel length of the transistor is 0.5 μm or longer and 6.5 μm or shorter.

Abstract translation: 提供了包括具有优异的电特性（例如导通电流，场效应迁移率或频率特性）的晶体管或包括具有高可靠性的晶体管的半导体器件的半导体器件。 在其中氧化物半导体膜位于第一和第二栅电极之间的沟道蚀刻晶体管的沟道宽度方向上，第一和第二栅极通过第一和第二栅极绝缘膜中的开口部彼此连接。 此外，第一和第二栅电极在沟道宽度方向的横截面中包围氧化物半导体膜，第一栅极绝缘膜设置在第一栅极和氧化物半导体膜之间，第二栅极绝缘膜设置在第二栅极绝缘膜之间 第二栅电极和氧化物半导体膜。 此外，晶体管的沟道长度为0.5μm以上且6.5μm以下。

公开(公告)号：US20160035897A1

公开(公告)日：2016-02-04

申请号：US14812028

申请日：2015-07-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiyuki KOBAYASHI ,  Shinpei MATSUDA ,  Daisuke MATSUBAYASHI ,  Hiroyuki TOMISU

IPC: H01L29/786 ,  H01L29/04 ,  H01L29/24

CPC classification number: H01L29/7869 ,  G02F1/1368 ,  G02F2201/58 ,  H01L21/8221 ,  H01L27/0688 ,  H01L29/045 ,  H01L29/78696

Abstract: A transistor whose channel is formed in a semiconductor having dielectric anisotropy is provided. A transistor having a small subthreshold swing value is provided. A transistor having normally-off electrical characteristics is provided. A transistor having a low leakage current in an off state is provided. A semiconductor device includes an insulator, a semiconductor, and a conductor. In the semiconductor device, the semiconductor includes a region overlapping with the conductor with the insulator positioned therebetween, and a dielectric constant of the region in a direction perpendicular to a top surface of the region is higher than a dielectric constant of the region in a direction parallel to the top surface.

Abstract translation: 提供其沟道形成在具有介电各向异性的半导体中的晶体管。 提供具有小的亚阈值摆动值的晶体管。 提供具有常关电特性的晶体管。 提供了处于断开状态的具有低泄漏电流的晶体管。 半导体器件包括绝缘体，半导体和导体。 在半导体器件中，半导体包括与绝缘体位于其间的与导体重叠的区域，并且该区域在与该区域的顶表面垂直的方向上的介电常数高于该区域的方向上的介电常数 平行于顶面。