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公开(公告)号:US20220285555A1
公开(公告)日:2022-09-08
申请号:US17743956
申请日:2022-05-13
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Junichi KOEZUKA , Kenichi OKAZAKI , Yukinori SHIMA , Shinpei MATSUDA , Haruyuki BABA , Ryunosuke HONDA
IPC: H01L29/786 , H01L27/12 , H01L29/66 , H01L29/778
Abstract: To improve field-effect mobility and reliability in a transistor including an oxide semiconductor film. A semiconductor device includes a transistor including an oxide semiconductor film. The transistor includes a region where the maximum value of field-effect mobility of the transistor at a gate voltage of higher than 0 V and lower than or equal to 10 V is larger than or equal to 40 and smaller than 150; a region where the threshold voltage is higher than or equal to minus 1 V and lower than or equal to 1 V; and a region where the S value is smaller than 0.3 V/decade.
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公开(公告)号:US20210249481A1
公开(公告)日:2021-08-12
申请号:US17245575
申请日:2021-04-30
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shunpei YAMAZAKI , Shinpei MATSUDA , Takuya KAWATA
Abstract: A light-emitting device, a lighting device, a display device, or the like in which the state of a back surface side can be observed when light is not emitted is provided. The light-emitting device includes a plurality of light-emitting portions and a region transmitting visible light in a region other than the light-emitting portions. Alternatively, the light-emitting device includes a plurality of light-transmitting portions transmitting visible light and a light-emitting portion that can emit light in a region other than the light-transmitting portions. When light is not emitted, the state of a back surface side of the light-emitting device is visible through the region transmitting visible light. When light is emitted, the state of the back surface side of the light-emitting device can be made less visible by diffusion of light emitted from the light-emitting portion.
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公开(公告)号:US20180033807A1
公开(公告)日:2018-02-01
申请号:US15658513
申请日:2017-07-25
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shinpei MATSUDA , Daigo ITO , Daisuke MATSUBAYASHI , Yasutaka SUZUKI , Etsuko KAMATA , Yutaka SHIONOIRI , Shuhei NAGATSUKA
IPC: H01L27/12 , H01L29/786 , H01L27/105 , H01L29/423
CPC classification number: H01L27/1251 , H01L27/1052 , H01L27/1225 , H01L27/127 , H01L29/42384 , H01L29/78648 , H01L29/7869 , H01L29/78696
Abstract: A highly reliable semiconductor device capable of retaining data for a long period is provided. The transistor includes a first gate electrode, a first gate insulator over the first gate electrode, a first oxide and a second oxide over the first gate insulator, a first conductor over the first oxide, a second conductor over the second oxide, a third oxide covering the first gate insulator, the first oxide, the first conductor, the second oxide, and the second conductor, a second gate insulator over the third oxide, and a second gate electrode over the second gate insulator. An end portion of the second gate electrode is positioned between an end portion of the first conductor and an end portion of the second conductor in a channel length direction.
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公开(公告)号:US20170271523A1
公开(公告)日:2017-09-21
申请号:US15617696
申请日:2017-06-08
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Kazuya HANAOKA , Daisuke MATSUBAYASHI , Yoshiyuki KOBAYASHI , Shunpei YAMAZAKI , Shinpei MATSUDA
IPC: H01L29/786
Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.
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公开(公告)号:US20170052415A1
公开(公告)日:2017-02-23
申请号:US15344795
申请日:2016-11-07
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Hiroyuki MIYAKE , Kouhei TOYOTAKA , Masahiko HAYAKAWA , Daisuke MATSUBAYASHI , Shinpei MATSUDA
IPC: G02F1/1343 , H01L27/12 , G02F1/1368 , G02F1/1333 , G02F1/1362
CPC classification number: G02F1/134309 , G02F1/133345 , G02F1/1343 , G02F1/136213 , G02F1/13624 , G02F1/1368 , G02F2001/13685 , H01L27/1225 , H01L27/127 , H01L29/78648 , H01L29/7869 , H01L29/78696
Abstract: The following semiconductor device provides high reliability and a narrower frame width. The semiconductor device includes a driver circuit and a pixel portion. The driver circuit has a first transistor including a first gate and a second gate electrically connected to each other with a semiconductor film sandwiched therebetween, and a second transistor electrically connected to the first transistor. The pixel portion includes a third transistor, a liquid crystal element, and a capacitor. The liquid crystal element includes a first transparent conductive film electrically connected to the third transistor, a second conductive film, and a liquid crystal layer. The capacitor includes the first conductive film, a third transparent conductive film, and a nitride insulating film. The nitride insulating film is positioned between the first transparent conductive film and the third transparent conductive film, and positioned between the semiconductor film and the second gate of the first transistor.
Abstract translation: 以下半导体器件提供高可靠性和较窄的帧宽度。 半导体器件包括驱动电路和像素部分。 驱动电路具有包括第一栅极和第二栅极的第一晶体管,其中夹在其间的半导体膜彼此电连接,第二晶体管与第一晶体管电连接。 像素部分包括第三晶体管,液晶元件和电容器。 液晶元件包括与第三晶体管电连接的第一透明导电膜,第二导电膜和液晶层。 电容器包括第一导电膜,第三透明导电膜和氮化物绝缘膜。 氮化物绝缘膜位于第一透明导电膜和第三透明导电膜之间,位于第一晶体管的半导体膜和第二栅极之间。
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公开(公告)号:US20140362324A1
公开(公告)日:2014-12-11
申请号:US14290263
申请日:2014-05-29
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Hiroyuki MIYAKE , Kouhei TOYOTAKA , Masahiko HAYAKAWA , Daisuke MATSUBAYASHI , Shinpei MATSUDA
IPC: G02F1/1343
CPC classification number: G02F1/134309 , G02F1/133345 , G02F1/1343 , G02F1/136213 , G02F1/13624 , G02F1/1368 , G02F2001/13685 , H01L27/1225 , H01L27/127 , H01L29/78648 , H01L29/7869 , H01L29/78696
Abstract: The following semiconductor device provides high reliability and a narrower frame width. The semiconductor device includes a driver circuit and a pixel portion. The driver circuit has a first transistor including a first gate and a second gate electrically connected to each other with a semiconductor film sandwiched therebetween, and a second transistor electrically connected to the first transistor. The pixel portion includes a third transistor, a liquid crystal element, and a capacitor. The liquid crystal element includes a first transparent conductive film electrically connected to the third transistor, a second conductive film, and a liquid crystal layer. The capacitor includes the first conductive film, a third transparent conductive film, and a nitride insulating film. The nitride insulating film is positioned between the first transparent conductive film and the third transparent conductive film, and positioned between the semiconductor film and the second gate of the first transistor.
Abstract translation: 以下半导体器件提供高可靠性和较窄的帧宽度。 半导体器件包括驱动电路和像素部分。 驱动电路具有包括第一栅极和第二栅极的第一晶体管,其中夹在其间的半导体膜彼此电连接,第二晶体管与第一晶体管电连接。 像素部分包括第三晶体管,液晶元件和电容器。 液晶元件包括与第三晶体管电连接的第一透明导电膜,第二导电膜和液晶层。 电容器包括第一导电膜,第三透明导电膜和氮化物绝缘膜。 氮化物绝缘膜位于第一透明导电膜和第三透明导电膜之间,位于第一晶体管的半导体膜和第二栅极之间。
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公开(公告)号:US20240021688A1
公开(公告)日:2024-01-18
申请号:US18371814
申请日:2023-09-22
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Akio SUZUKI , Shinpei MATSUDA , Shunpei YAMAZAKI
IPC: H01L29/423 , H01L29/06 , H01L21/28 , H10B41/70 , H01L29/775 , H01L29/778 , H01L29/786 , H01L29/788 , H01L29/66
CPC classification number: H01L29/42324 , H01L29/0673 , H01L29/40114 , H01L29/42384 , H01L29/42392 , H10B41/70 , H01L29/775 , H01L29/7786 , H01L29/7869 , H01L29/7883 , H01L29/78696 , H01L29/66969
Abstract: A transistor which is resistant to a short-channel effect is provided. The transistor includes a first conductor in a ring shape, an oxide semiconductor including a region extending through an inside of a ring of the first conductor, a first insulator between the first conductor and the oxide semiconductor, a second insulator between the first conductor and the first insulator, and a charge trap layer inside the ring of the first conductor. The charge trap layer is inside the second insulator and configured to be in a floating state.
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公开(公告)号:US20170309750A1
公开(公告)日:2017-10-26
申请号:US15644940
申请日:2017-07-10
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yoshiyuki KOBAYASHI , Shinpei MATSUDA , Daisuke MATSUBAYASHI , Hiroyuki TOMISU
IPC: H01L29/786 , H01L27/06 , G02F1/1368 , H01L21/822 , H01L29/04
CPC classification number: H01L29/7869 , G02F1/1368 , G02F2201/58 , H01L21/8221 , H01L27/0688 , H01L29/045 , H01L29/78696
Abstract: A transistor whose channel is formed in a semiconductor having dielectric anisotropy is provided. A transistor having a small subthreshold swing value is provided. A transistor having normally-off electrical characteristics is provided. A transistor having a low leakage current in an off state is provided. A semiconductor device includes an insulator, a semiconductor, and a conductor. In the semiconductor device, the semiconductor includes a region overlapping with the conductor with the insulator positioned therebetween, and a dielectric constant of the region in a direction perpendicular to a top surface of the region is higher than a dielectric constant of the region in a direction parallel to the top surface.
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公开(公告)号:US20170005202A1
公开(公告)日:2017-01-05
申请号:US15264667
申请日:2016-09-14
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yoshiyuki KOBAYASHI , Shinpei MATSUDA , Shunpei YAMAZAKI
IPC: H01L29/786
CPC classification number: H01L29/7869 , H01L27/0629 , H01L27/1225 , H01L29/045 , H01L29/78696
Abstract: A semiconductor device having stable electric characteristics is provided. The transistor includes first to third oxide semiconductor layers, a gate electrode, and a gate insulating layer. The second oxide semiconductor layer has a portion positioned between the first and third oxide semiconductor layers. The gate insulating layer has a region in contact with a top surface of the third oxide semiconductor layer. The gate electrode overlaps with a top surface of the portion with the gate insulating layer positioned therebetween. The gate electrode faces a side surface of the portion in a channel width direction with the gate insulating layer positioned therebetween. The second oxide semiconductor layer includes a region having a thickness greater than or equal to 2 nm and less than 8 nm. The length in the channel width direction of the second oxide semiconductor layer is less than 60 nm.
Abstract translation: 提供具有稳定电特性的半导体器件。 晶体管包括第一至第三氧化物半导体层,栅电极和栅极绝缘层。 第二氧化物半导体层具有位于第一和第三氧化物半导体层之间的部分。 栅极绝缘层具有与第三氧化物半导体层的顶表面接触的区域。 栅电极与栅绝缘层位于其间的部分的顶表面重叠。 栅极电极在栅极绝缘层位于沟槽宽度方向上面对该部分的侧面。 第二氧化物半导体层包括厚度大于或等于2nm且小于8nm的区域。 第二氧化物半导体层的沟道宽度方向的长度小于60nm。
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公开(公告)号:US20140340608A1
公开(公告)日:2014-11-20
申请号:US14272742
申请日:2014-05-08
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Hiroyuki MIYAKE , Kenichi OKAZAKI , Masahiko HAYAKAWA , Shinpei MATSUDA
IPC: H01L27/12 , G02F1/1362
CPC classification number: H01L27/1225 , G02F1/134309 , G02F1/1368 , H01L27/1237 , H01L27/124 , H01L29/78648 , H01L29/7869 , H01L29/78696
Abstract: A semiconductor device which includes an oxide semiconductor and in which formation of a parasitic channel due to a gate BT stress is suppressed is provided. Further, a semiconductor device including a transistor having excellent electrical characteristics is provided. The semiconductor device includes a transistor having a dual-gate structure in which an oxide semiconductor film is provided between a first gate electrode and a second gate electrode; gate insulating films are provided between the oxide semiconductor film and the first gate electrode and between the oxide semiconductor film and the second gate electrode; and in the channel width direction of the transistor, the first or second gate electrode faces a side surface of the oxide semiconductor film with the gate insulating film between the oxide semiconductor film and the first or second gate electrode.
Abstract translation: 提供了一种半导体器件,其包括氧化物半导体,并且其中抑制了由于栅极BT应力而形成的寄生沟道。 此外,提供了包括具有优异电特性的晶体管的半导体器件。 半导体器件包括具有双栅极结构的晶体管,其中氧化物半导体膜设置在第一栅电极和第二栅电极之间; 在所述氧化物半导体膜和所述第一栅电极之间以及所述氧化物半导体膜和所述第二栅电极之间设置栅绝缘膜; 并且在晶体管的沟道宽度方向上,第一或第二栅电极与氧化物半导体膜与第一或第二栅电极之间的栅极绝缘膜面对氧化物半导体膜的侧面。
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