公开(公告)号：US20210280424A1

公开(公告)日：2021-09-09

申请号：US17190722

申请日：2021-03-03

Applicant: STMicroelectronics S.r.l.

Inventor： Simone RASCUNA' ,  Paolo BADALA' ,  Anna BASSI ,  Mario Giuseppe SAGGIO ,  Giovanni FRANCO

IPC: H01L21/04 ,  H01L29/16 ,  H01L29/45 ,  H01L29/47

Abstract: A method for manufacturing an electronic device based on SiC includes forming a structural layer of SiC on a front side of a substrate. The substrate has a back side that is opposite to the front side along a direction. Active regions of the electronic device are formed in the structure layer, and the active regions are configured to generate or conduct electric current during the use of the electronic device. A first electric terminal is formed on the structure layer, and an intermediate layer is formed at the back side of the substrate. The intermediate layer is heated by a LASER beam in order to generate local heating such as to favor the formation of an ohmic contact of Titanium compounds. A second electric terminal of the electronic device is formed on the intermediate layer.

公开(公告)号：US20210104445A1

公开(公告)日：2021-04-08

申请号：US17039289

申请日：2020-09-30

Applicant: STMicroelectronics S.r.l.

Inventor： Simone RASCUNA' ,  Claudio CHIBBARO ,  Alfio GUARNERA ,  Mario Giuseppe SAGGIO ,  Francesco LIZIO

IPC: H01L23/31 ,  H01L29/16 ,  H01L21/04 ,  H01L21/56

Abstract: An electronic power device includes a substrate of silicon carbide (SiC) having a front surface and a rear surface which lie in a horizontal plane and are opposite to one another along a vertical axis. The substrate includes an active area, provided in which are a number of doped regions, and an edge area, which is not active, distinct from and surrounding the active area. A dielectric region is arranged above the front surface, in at least the edge area. A passivation layer is arranged above the front surface of the substrate, and is in contact with the dielectric region in the edge area. The passivation layer includes at least one anchorage region that extends through the thickness of the dielectric region at the edge area, such as to define a mechanical anchorage for the passivation layer.

公开(公告)号：US20200373398A1

公开(公告)日：2020-11-26

申请号：US16882293

申请日：2020-05-22

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Patrick FIORENZA ,  Fabrizio ROCCAFORTE ,  Mario Giuseppe SAGGIO

IPC: H01L29/423 ,  H01L29/872 ,  H01L29/16 ,  H01L27/06

Abstract: An electronic device comprising: a semiconductor body of silicon carbide, SiC, having a first and a second face, opposite to one another along a first direction, which presents positive-charge carriers at said first face that form a positive interface charge; a first conduction terminal, which extends at the first face of the semiconductor body; a second conduction terminal, which extends on the second face of the semiconductor body; a channel region in the semiconductor body, configured to house, in use, a flow of electrons between the first conduction terminal and the second conduction terminal; and a trapping layer, of insulating material, which extends in electrical contact with the semiconductor body at said channel region and is designed so as to present electron-trapping states that generate a negative charge such as to balance, at least in part, said positive interface charge.

公开(公告)号：US20190172715A1

公开(公告)日：2019-06-06

申请号：US16209680

申请日：2018-12-04

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Edoardo ZANETTI ,  Simone RASCUNÁ ,  Mario Giuseppe SAGGIO ,  Alfio GUARNERA ,  Leonardo FRAGAPANE ,  Cristina TRINGALI

IPC: H01L21/04 ,  H01L21/285 ,  H01L29/66 ,  H01L29/16 ,  H01L29/872

Abstract: A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.

公开(公告)号：US20140141603A1

公开(公告)日：2014-05-22

申请号：US14166522

申请日：2014-01-28

Applicant: STMicroelectronics S.r.l.

Inventor： Ferruccio FRISINA ,  Mario Giuseppe SAGGIO ,  Angelo MAGRI'

IPC: H01L21/02 ,  H01L21/265

CPC classification number: H01L29/7806 ,  H01L21/02573 ,  H01L21/046 ,  H01L21/265 ,  H01L29/0619 ,  H01L29/0821 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/165 ,  H01L29/267 ,  H01L29/66068 ,  H01L29/732 ,  H01L29/7371 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7813 ,  H01L29/861 ,  H01L29/872

Abstract: An embodiment of a vertical-conduction integrated electronic device formed in a body of semiconductor material which includes: a substrate made of a first semiconductor material and with a first type of conductivity, the first semiconductor material having a first bandgap; an epitaxial region made of the first semiconductor material and with the first type of conductivity, which overlies the substrate and defines a first surface; and a first epitaxial layer made of a second semiconductor material, which overlies the first surface and is in direct contact with the epitaxial region, the second semiconductor material having a second bandgap narrower than the first bandgap. The body moreover includes a deep region of a second type of conductivity, extending underneath the first surface and within the epitaxial region.

Abstract translation: 形成在半导体材料体内的垂直导电集成电子器件的实施例包括：由第一半导体材料制成并具有第一导电类型的衬底，第一半导体材料具有第一带隙; 由第一半导体材料制成并且具有第一类型的导电性的外延区域，其覆盖在衬底上并限定第一表面; 以及由第二半导体材料制成的第一外延层，其覆盖在第一表面上并与外延区直接接触，第二半导体材料具有比第一带隙窄的第二带隙。 身体还包括延伸在第一表面下方和外延区域内的第二类导电性的深区域。