Backlight unit and display device having optical sheet spaced from frame
    44.
    发明授权
    Backlight unit and display device having optical sheet spaced from frame 有权
    背光单元和具有与框架隔开的光学片的显示装置

    公开(公告)号:US08269920B2

    公开(公告)日:2012-09-18

    申请号:US13112708

    申请日:2011-05-20

    IPC分类号: G02F1/1333 G02F1/1335

    摘要: A backlight unit is disclosed. The backlight unit includes a light emitting device, a light guide plate to guide light irradiated from the light emitting device, an optical sheet disposed on a front surface of the light guide plate, a bottom chassis disposed below the light guide plate, a mold frame disposed on a front surface of the optical sheet, and an anti-contact protrusion disposed at the bottom chassis so as to come into contact with the mold frame, thereby allowing the mold frame to be spaced apart from the light guide plate and the front surface of the optical sheet.

    摘要翻译: 公开了一种背光单元。 背光单元包括:发光装置,用于引导从发光装置照射的光的导光板,设置在导光板的前表面的光学片,设置在导光板下方的底架,模架 设置在光学片的前表面上,以及设置在底架上的防接触突起,以便与模架接触,从而允许模架与导光板和前表面间隔开 的光学片。

    PROCESS OF PRODUCING MONOHYDRIC ALCOHOLS FROM MONOCARBOXYLIC ACIDS OR DERIVATIVES THEREOF
    47.
    发明申请
    PROCESS OF PRODUCING MONOHYDRIC ALCOHOLS FROM MONOCARBOXYLIC ACIDS OR DERIVATIVES THEREOF 有权
    从单羧酸或其衍生物生产单糖的方法

    公开(公告)号:US20100113843A1

    公开(公告)日:2010-05-06

    申请号:US12594025

    申请日:2009-02-27

    IPC分类号: C07C29/147

    摘要: Disclosed herein is a method for producing monohydric alcohols from monocarboxylic acids or derivatives thereof using a catalyst comprising ruthenium (Ru) and tin (Sn) using zinc oxide (ZnO) as both a catalyst support and an active promoter; a catalyst prepared by adding an inorganic binder such as silica, alumina or titania in a limited range to the catalyst comprising the above components in order to impart a shaping ability to the catalyst; or, a modified catalyst reformed by adding at least one reducing component selected from the group consisting of Co, Ni, Cu, Ag, Rh, Pd, Re, Ir, and Pt to the catalyst in order to improve the reducing ability of the catalyst. By using such catalysts, the method according to the present invention is advantageous in that the monohydric alcohols can be prepared in high yield regardless of whether the monocarboxylic acids contain water or not, the monohydric alcohols can be economically prepared because the catalysts can be operated under mild reaction conditions and also exhibits high selectivity and productivity compared to conventional catalysts, and the catalysts have excellent long-term reaction stability so as to be advantageous for industrial applications.

    摘要翻译: 本文公开了使用氧化锌(ZnO)作为催化剂载体和活性促进剂两者,使用包含钌(Ru)和锡(Sn)的催化剂由一元羧酸或其衍生物生产一元醇的方法; 通过在包含上述组分的催化剂的有限范围内加入无机粘合剂如二氧化硅,氧化铝或二氧化钛制备的催化剂,以赋予催化剂成型能力; 或者,通过向催化剂中添加选自Co,Ni,Cu,Ag,Rh,Pd,Re,Ir和Pt中的至少一种还原成分而改性的改性催化剂,以提高催化剂的还原能力 。 通过使用这样的催化剂,根据本发明的方法的优点在于,一元醇可以以高产率制备,而不管单羧酸是否含有水,一元醇可以经济地制备,因为催化剂可以在 温和的反应条件,并且与常规催化剂相比表现出高选择性和生产率,并且催化剂具有优异的长期反应稳定性,从而有利于工业应用。

    Method of manufacturing transistor having elevated source and drain regions
    48.
    发明授权
    Method of manufacturing transistor having elevated source and drain regions 有权
    制造具有升高的源极和漏极区的晶体管的方法

    公开(公告)号:US06368927B1

    公开(公告)日:2002-04-09

    申请号:US09608064

    申请日:2000-06-29

    申请人: Jung Ho Lee

    发明人: Jung Ho Lee

    IPC分类号: H01L21336

    摘要: A method of manufacturing a transistor having an elevated drain in a substrate includes the steps of: forming a gate structure on the substrate; providing a first doped region adjacent to one end of the gate structure, the first doped region having a first dopant concentration level; forming a second doped region overlying the first doped region, the second doped region having a second dopant concentration level; and forming a third doped region overlying the second doped region, the third doped region having a third dopant concentration level different from the second dopant concentration level, in which the elevated drain includes the third doped region, where the second dopant concentration level is lower than the third concentration level.

    摘要翻译: 一种制造在衬底中具有升高的漏极的晶体管的方法包括以下步骤:在衬底上形成栅极结构; 提供与所述栅极结构的一端相邻的第一掺杂区域,所述第一掺杂区域具有第一掺杂剂浓度水平; 形成覆盖所述第一掺杂区的第二掺杂区,所述第二掺杂区具有第二掺杂浓度水平; 以及形成覆盖所述第二掺杂区域的第三掺杂区域,所述第三掺杂区域具有不同于所述第二掺杂剂浓度水平的第三掺杂剂浓度水平,其中所述升高的漏极包括所述第三掺杂区域,其中所述第二掺杂剂浓度水平低于 第三集中程度。

    Method of manufacturing a transistor in a semiconductor device
    49.
    发明授权
    Method of manufacturing a transistor in a semiconductor device 失效
    制造半导体器件中的晶体管的方法

    公开(公告)号:US06365473B1

    公开(公告)日:2002-04-02

    申请号:US09607107

    申请日:2000-06-29

    申请人: Jung Ho Lee

    发明人: Jung Ho Lee

    IPC分类号: H01L21336

    CPC分类号: H01L29/66628 H01L29/7838

    摘要: There is disclosed a method of manufacturing a transistor in a semiconductor device by which, when forming an elevated channel using an epitaxy technology for further expanding the applied region of a buried channel PMOS transistor, indium ions having the high amount of atoms and a low diffusion speed after growth of an epitaxial layer are implanted to distribute them into a boron epitaxial layer and a lower portion. Thus, it can obtain a desired threshold voltage Vt in a device and can improve degradation in a short channel.

    摘要翻译: 公开了一种在半导体器件中制造晶体管的方法,当使用外延技术形成升高的沟道以进一步扩大掩埋沟道PMOS晶体管的施加区域时,具有高原子数和低扩散的铟离子 注入外延层生长后的速度将其分布到硼外延层和下部。 因此,其可以在器件中获得期望的阈值电压Vt并且可以改善短通道中的劣化。

    Method of manufacturing a semiconductor device
    50.
    发明授权
    Method of manufacturing a semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US06277677B1

    公开(公告)日:2001-08-21

    申请号:US09546289

    申请日:2000-04-10

    申请人: Jung Ho Lee

    发明人: Jung Ho Lee

    IPC分类号: H01L21335

    CPC分类号: H01L29/66628

    摘要: Method of manufacturing a semiconductor device according to the present invention comprises the steps of: sequentially forming a gate oxide layer, a gate and a mask insulation layer on a semiconductor substrate; sequentially forming first and second insulation layers on a resulting structure after forming the mask insulation layer; forming a first spacer on a side wall of the gate and the mask insulation layer having the first insulation layer by etching the second insulation layer; etching the first insulation layer so that an undercut is formed and the substrate of both sides of the first spacer and surface of the mask insulation layer are exposed, resulting from forming a second spacer on side wall of the gate and mask insulation layer; forming an epitaxial silicon layer on the exposed substrate; and forming elevated source and drain regions in the substrate by implanting an impurity ion through the epitaxial silicon layer and by performing annealing process.

    摘要翻译: 根据本发明的制造半导体器件的方法包括以下步骤:在半导体衬底上依次形成栅极氧化物层,栅极和掩模绝缘层; 在形成掩模绝缘层之后,在得到的结构上依次形成第一绝缘层和第二绝缘层; 通过蚀刻第二绝缘层在栅极的侧壁上形成第一间隔物和具有第一绝缘层的掩模绝缘层; 蚀刻第一绝缘层,从而在栅极和掩模绝缘层的侧壁上形成第二间隔物,形成底切,并且第一间隔物的两侧的基板和掩模绝缘层的表面露出; 在所述暴露的衬底上形成外延硅层; 以及通过在外延硅层中注入杂质离子并进行退火处理,在衬底中形成升高的源极和漏极区域。