-
公开(公告)号:US20200278389A1
公开(公告)日:2020-09-03
申请号:US16875628
申请日:2020-05-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Lee D. Whetsel , Richard L. Antley
Abstract: Timely testing of die on wafer reduces the cost to manufacture ICs. This disclosure describes a die test structure and process to reduce test time by adding test pads on the top surface of the die. The added test pads allow a tester to probe and test more circuits within the die simultaneously. Also, the added test pads contribute to a reduction in the amount of test wiring overhead traditionally required to access and test circuits within a die, thus reducing die size.
-
42.
公开(公告)号:US20200264233A1
公开(公告)日:2020-08-20
申请号:US16869181
申请日:2020-05-07
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Lee D. Whetsel
IPC: G01R31/3183 , G01R31/317 , G01R31/3177 , G06F11/273 , G01R31/3185
Abstract: The disclosure describes novel methods and apparatuses for accessing test compression architectures (TCA) in a device using either a parallel or serial access technique. The serial access technique may be controlled by a device tester or by a JTAG controller. Further the disclosure provides an approach to access the TCA of a device when the device exists in a daisy-chain arrangement with other devices, such as in a customer's system. Additional embodiments are also provided and described in the disclosure.
-
公开(公告)号:US20200217890A1
公开(公告)日:2020-07-09
申请号:US16825434
申请日:2020-03-20
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Lee D. Whetsel
IPC: G01R31/3177 , G01R31/3185 , G01R31/317
Abstract: The disclosure describes novel methods and apparatuses for controlling a device's TCA circuit when the device exists in a JTAG daisy-chain arrangement with other devices. The methods and apparatuses allow the TCA test pattern set used during device manufacturing to be reused when the device is placed in a JTAG daisy-chain arrangement with other devices, such as in a customers system using the device. Additional embodiments are also provided and described in the disclosure.
-
公开(公告)号:US20200217889A1
公开(公告)日:2020-07-09
申请号:US16824371
申请日:2020-03-19
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Lee D. Whetsel
IPC: G01R31/3177 , G01R31/3185
Abstract: The disclosure describes a novel method and apparatus for providing a shadow access port within a device. The shadow access port is accessed to perform operations in the device by reusing the TDI, TMS, TCK and TDO signals that are used to operate a test access port within the device. The presence and operation of the shadow access port is transparent to the presence and operation of the test access port. According to the disclosure, the shadow access port operates on the falling edge of the TCK signal while the test access port conventionally operates on the rising edge of the TCK signal.
-
公开(公告)号:US10690717B2
公开(公告)日:2020-06-23
申请号:US15267996
申请日:2016-09-16
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Lee D. Whetsel , Richard L. Antley
Abstract: Timely testing of die on wafer reduces the cost to manufacture ICs. This disclosure describes a die test structure and process to reduce test time by adding test pads on the top surface of the die. The added test pads allow a tester to probe and test more circuits within the die simultaneously. Also, the added test pads contribute to a reduction in the amount of test wiring overhead traditionally required to access and test circuits within a die, thus reducing die size.
-
公开(公告)号:US10605858B2
公开(公告)日:2020-03-31
申请号:US16112317
申请日:2018-08-24
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Lee D. Whetsel
IPC: G01R31/28 , G01R31/3177 , G01R31/3185
Abstract: The disclosure describes a novel method and apparatus for improving interposers to include embedded monitoring instruments for real time monitoring digital signals, analog signals, voltage signals and temperature sensors located in the interposer. An embedded monitor trigger unit controls the starting and stopping of the real time monitoring operations. The embedded monitoring instruments are accessible via an 1149.1 TAP interface on the interposer.
-
公开(公告)号:US20200090711A1
公开(公告)日:2020-03-19
申请号:US16689691
申请日:2019-11-20
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Lee D. Whetsel
IPC: G11C7/10 , G01R31/3185 , G06F13/40 , G06F13/42
Abstract: A two pin communication interface bus and control circuits are used with circuit boards, integrated circuits, or embedded cores within integrated circuits. One pin carries data bi-directionally and address and instruction information from a controller to a selected port. The other pin carries a clock signal from the controller to a target port or ports in or on the desired circuit or circuits. The bus may be used for serial access to circuits where the availability of pins on ICs or terminals on cores is minimal. The bus is used for communication, such as serial communication related to the functional operation of an IC or core design, or serial communication related to test, emulation, debug, and/or trace operations of an IC or core design.
-
公开(公告)号:US10557887B2
公开(公告)日:2020-02-11
申请号:US16290329
申请日:2019-03-01
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Lee D. Whetsel
IPC: G01R31/28 , G01R31/317 , G01R31/3185 , G06F11/267 , G01R31/3177
Abstract: The present disclosure describes using the JTAG Tap's TMS and/or TCK terminals as general purpose serial Input/Output (I/O) Manchester coded communication terminals. The Tap's TMS and/or TCK terminal can be used as a serial I/O communication channel between; (1) an IC and an external controller, (2) between a first and second IC, or (3) between a first and second core circuit within an IC. The use of the TMS and/or TCK terminal as serial I/O channels, as described, does not effect the standardized operation of the JTAG Tap, since the TMS and/or TCK I/O operations occur while the Tap is placed in a non-active steady state.
-
公开(公告)号:US10539606B2
公开(公告)日:2020-01-21
申请号:US16047263
申请日:2018-07-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Lee D. Whetsel
IPC: G01R31/26 , G01R31/3177 , G01R31/3185
Abstract: A test control port (TCP) includes a state machine SM, an instruction register IR, data registers DRs, a gating circuit and a TDO MX. The SM inputs TCI signals and outputs control signals to the IR and to the DR. During instruction or data scans, the IR or DRs are enabled to input data from TDI and output data to the TDO MX and the top surface TDO signal. The bottom surface TCI inputs may be coupled to the top surface TCO signals via the gating circuit. The top surface TDI signal may be coupled to the bottom surface TDO signal via TDO MX. This allows concatenating or daisy-chaining the IR and DR of a TCP of a lower die with an IR and DR of a TCP of a die stacked on top of the lower die.
-
公开(公告)号:US20190187210A1
公开(公告)日:2019-06-20
申请号:US16282529
申请日:2019-02-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Lee D. Whetsel
IPC: G01R31/317 , G01R31/3185 , G01R31/3177
CPC classification number: G01R31/31724 , G01R31/31723 , G01R31/31727 , G01R31/3177 , G01R31/318555 , G01R31/318572
Abstract: The disclosure provides a novel method and apparatus for inputting addresses to devices to select the device TAP for access. Further, the disclosure provides a novel method and apparatus for inputting addresses for selecting device TAPs and for inputting commands for commanding circuitry within the device. The inputting of addresses or the inputting of addresses and commands is initiated by a control bit input on TDI that is recognized during the Run Test/Idle, Pause-DR or Pause-IR TAP states.
-
-
-
-
-
-
-
-
-