Power semiconductor device having low on-resistance and high breakdown voltage
    41.
    发明授权
    Power semiconductor device having low on-resistance and high breakdown voltage 有权
    具有低导通电阻和高击穿电压的功率半导体器件

    公开(公告)号:US06344676B1

    公开(公告)日:2002-02-05

    申请号:US09533824

    申请日:2000-03-24

    Abstract: A power semiconductor device having low on-resistance and a high breakdown voltage is disclosed. The power semiconductor device can be a high power MOS transistor or an insulation gate bipolar transistor. The power semiconductor device has unit cells formed in parallel body region strips. A highly-doped drift layer of the same conductivity type as that of a drift region is provided between adjacent body region strips in a unit cell. Both ends of each of the body region strips of the unit cell are connected to a single frame region. This prevents a depletion region of a spherical or cylindrical type from being formed on an edge of the body region, and in so doing, increases a breakdown voltage of the device.

    Abstract translation: 公开了具有低导通电阻和高击穿电压的功率半导体器件。 功率半导体器件可以是高功率MOS晶体管或绝缘栅双极晶体管。 功率半导体器件具有以平行体区带形成的单元电池。 在单元电池中的相邻体区带之间设置与漂移区相同导电类型的高掺杂漂移层。 单元电池的每个体区带的两端连接到单个框架区域。 这防止了在体区域的边缘上形成球形或圆柱形的耗尽区,并且这样做增加了器件的击穿电压。

    Trench-type insulated gate bipolar transistor and method for making the same
    42.
    发明授权
    Trench-type insulated gate bipolar transistor and method for making the same 有权
    沟槽型绝缘栅双极晶体管

    公开(公告)号:US06262470B1

    公开(公告)日:2001-07-17

    申请号:US09369487

    申请日:1999-08-05

    CPC classification number: H01L29/66348 H01L29/7397

    Abstract: A trench-type insulated gate bipolar transistor in which a channel stop region is partially formed between an n-type high-concentration emitter region and a p-type base region in which a conductive channel is to be formed. The channel stop region is doped with p-type impurities at high concentration. A portion of the emitter region directly contact the base region, and the other portion has the channel stop region disposed between itself and the base region without directly contacting the base region. At the portion where the channel stop region is interposed, an electron current from the emitter region does not flow vertically into a drift region, but horizontally moves to a direct contacts portion between the emitter region and the base region and then vertically flows to the drift region via the conductive channel. The horizontally-flowing electron current within the emitter region causes a voltage drop, thus reducing the voltage difference at the junction between the emitter region and the base region. Therefore, a latch-up phenomenon, in which a parasitic thyristor is turned on, is suppressed.

    Abstract translation: 沟槽型绝缘栅双极晶体管,其中沟道阻挡区域部分地形成在要形成导电沟道的n型高浓度发射极区域和p型基极区域之间。 通道停止区以高浓度掺杂p型杂质。 发射极区域的一部分直接接触基极区域,另一部分具有设置在其与基极区域之间的沟道阻挡区域,而不直接接触基极区域。 在插入通道停止区域的部分,来自发射极区域的电子电流不会垂直流入漂移区域,而是水平移动到发射极区域和基极区域之间的直接接触部分,然后垂直地流到漂移区域 区域。 发射极区域内的水平流动的电子电流引起电压降,从而降低发射极区域和基极区域之间的结处的电压差。 因此,抑制了寄生晶闸管导通的闭锁现象。

    Back bias voltage generator circuit of a semiconductor memory device
    43.
    发明授权
    Back bias voltage generator circuit of a semiconductor memory device 失效
    半导体存储器件的背偏压生成电路

    公开(公告)号:US5434820A

    公开(公告)日:1995-07-18

    申请号:US134040

    申请日:1993-10-08

    Applicant: Tae-hoon Kim

    Inventor: Tae-hoon Kim

    CPC classification number: G11C5/146

    Abstract: A Vbb generator having several distributed Vbb generators, which are located respectively adjacent to memory array blocks is disclosed. The distributed Vbb generator is activated during the time when a memory block located adjacent the Vbb generator is accessed for write/read operations. The back bias voltage generator circuit has a first Vbb generator and a second Vbb generator for supplying a back bias voltage to the substrate. The second Vbb generator comprises an oscillator for generating a clock pulse and a plurality of distributed Vbb generators. The distributed Vbb generators include an auxiliary pumping portion including a buffer portion for buffering the clock pulse from the oscillator, a pumping capacitor connected to the output of the buffer portion for pumping a back bias voltage, and a rectifying portion connected to the pumping capacitor for supplying the back bias voltage to the substrate, and a switch for connecting the clock pulse from the oscillator to the auxiliary pumping portion, the clock pulse activating a pumping operation of the auxiliary pumping portion.

    Abstract translation: 公开了一种Vbb发生器,其具有分别位于存储器阵列块附​​近的多个分布式Vbb发生器。 在访问位于Vbb发生器附近的存储器块进行写入/读取操作的时间期间,分配的Vbb发生器被激活。 背偏置电压发生器电路具有第一Vbb发生器和用于向衬底提供反偏压的第二Vbb发生器。 第二Vbb发生器包括用于产生时钟脉冲的振荡器和多个分布式Vbb发生器。 分布式Vbb发生器包括辅助泵送部分,其包括用于缓冲来自振荡器的时钟脉冲的缓冲部分,连接到缓冲部分的输出以泵送反偏压的泵浦电容器,以及连接到泵浦电容器的整流部分 向衬底提供背偏置电压,以及用于将来自振荡器的时钟脉冲连接到辅助泵送部分的开关,所述时钟脉冲激活辅助泵送部分的泵送操作。

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