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41.发明授权Delta-sigma analog-to-digital converter with chopper stabilization at the sampling frequency 失效具有采样频率下斩波稳定的Delta-sigma模数转换器
公开(公告)号：US5039989A
公开(公告)日：1991-08-13
申请号：US429211
申请日：1989-10-27
IPC分类号： H03M3/02
摘要： A chopper stabilized analog-to-digital converter includes an analog modulator (10) and a digital filter (12). The analog modulator (10) is comprised of four integrators, a first integrator (20) which is continuous time and the remaining stages of integration (22) which are either continuous or discrete. The first integrator (20) is a chopper stabilized integrator which is comprised of a chopper stabilized differential amplifier (32) which has a single ended output and operates in a continuous time mode. The modulator has a zero that is located at the harmonics of the sampling frequency of the modulator and the chopping clock for the chopper stabilized operation operates at the sampling frequency.
摘要翻译： 斩波稳定的模拟 - 数字转换器包括模拟调制器（10）和数字滤波器（12）。 模拟调制器（10）由四个积分器组成，第一积分器（20）是连续时间，剩余的积分级（22）是连续的或离散的。 第一积分器（20）是斩波稳定积分器，其由具有单端输出并且以连续时间模式操作的斩波稳定差分放大器（32）组成。 调制器具有位于调制器采样频率谐波处的零点，斩波稳定运行的斩波时钟以采样频率工作。
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公开(公告)号：US4425551A
公开(公告)日：1984-01-10
申请号：US247649
申请日：1981-03-26
IPC分类号： H03F3/45
CPC分类号： H03F3/45479
摘要： An improved amplifier of the type comprising bipolar transistor means coupled between the input terminal of the amplifier and a differential pair of transistors. Compensation means is provided for generating a compensating signal through the bipolar transistor means such that the bipolar transistor means and compensation means reduce the amount of bias current drawn from the input signal to the amplifier. Other aspects of the present invention include the provision of reducing DC offset voltages between each side of the differential amplifier due to the operation of the device with its input terminals at different voltage levels, and the provision of a zero in the transfer characteristics of the amplifier to mitigate the effects of poles provided in the transfer characteristics.
摘要翻译： 一种改进的放大器，其类型包括耦合在放大器的输入端和差分对晶体管之间的双极晶体管装置。 提供补偿装置用于通过双极晶体管装置产生补偿信号，使得双极晶体管装置和补偿装置减少从输入信号汲取到放大器的偏置电流量。 本发明的其它方面包括由于器件的操作使其输入端子处于不同的电压电平而在差分放大器的每一侧之间提供减小的DC偏移电压，并且在放大器的传输特性中提供零值 以减轻传递特性中提供的极点的影响。
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公开(公告)号：US09726696B2
公开(公告)日：2017-08-08
申请号：US13723417
申请日：2012-12-21
申请人： Matthew Powell , David R. Welland
发明人： Matthew Powell , David R. Welland
CPC分类号： G01R19/0069 , G01K7/01 , G01R35/00 , G05F3/02
摘要： In one form, a reference circuit includes a measurement circuit and a determination circuit. The measurement circuit has an output for providing a ratio of a difference in base-to-emitter voltage (VBE) of a bipolar device at different current densities to a VBE of the bipolar device at a first current density. The determination circuit has an input coupled to the measurement circuit, and an output for providing a digital value of a parameter in response to the ratio. In another form, the reference circuit further includes a voltage generation circuit having an input coupled to the determination circuit, and an output, for modulating an analog voltage using the digital value to provide a reference voltage to the output, wherein the reference voltage is temperature compensated over a temperature range.
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公开(公告)号：US20140086278A1
公开(公告)日：2014-03-27
申请号：US13624619
申请日：2012-09-21
申请人： David R. Welland
发明人： David R. Welland
IPC分类号： G01K7/00
CPC分类号： G01K7/01 , G01K7/34 , G01K2219/00
摘要： A method includes alternately coupling a selected one of a plurality of current sources and two or more of the plurality of current sources to a first terminal of a bipolar device during first and second phases of a modulator cycle of a plurality of modulator cycles. The method further includes providing sampled voltages from the first terminal of the bipolar device to a modulator to produce a modulator output signal, filtering the modulator output signal to produce a filtered output signal using a back-end filter having an impulse response, and determining a temperature in response to the filtered output signal.
摘要翻译： 一种方法包括在多个调制器周期的调制器周期的第一和第二阶段期间交替地将多个电流源中的一个电流源和两个或更多个多个电流源交替耦合到双极器件的第一端子。 该方法还包括将采样的电压从双极器件的第一端子提供给调制器以产生调制器输出信号，使用具有脉冲响应的后端滤波器对调制器输出信号进行滤波以产生滤波后的输出信号，并且确定 响应于滤波的输出信号的温度。
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公开(公告)号：US08648653B2
公开(公告)日：2014-02-11
申请号：US12650546
申请日：2009-12-31
申请人： David R. Welland , Donald A. Kerth , Caiyi Wang
发明人： David R. Welland , Donald A. Kerth , Caiyi Wang
IPC分类号： H03K5/00
CPC分类号： H05K9/00 , H03L7/18 , H05K1/0216 , H05K3/10 , Y10T29/49124
摘要： A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.
摘要翻译： 提供一种减少电路干扰的方法和装置。 提供管理策略，以减少参考杂散和电路干扰。 管理策略使用一种或多种减少数字电流，最小化互感，利用场消除，防止泄漏电流和/或管理阻抗的技术的组合。 这些技术可以单独使用，或者优选地彼此组合使用。
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公开(公告)号：US08421529B2
公开(公告)日：2013-04-16
申请号：US12650543
申请日：2009-12-31
申请人： David R. Welland , Donald A. Kerth , Caiyi Wang
发明人： David R. Welland , Donald A. Kerth , Caiyi Wang
IPC分类号： H03K5/00
CPC分类号： H05K9/00 , H03L7/18 , H05K1/0216 , H05K3/10 , Y10T29/49124
摘要： A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.
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47.发明授权Direct digital access arrangement circuitry and method for connecting to phone lines 失效用于连接到电话线的直接数字接入安排电路和方法公开(公告)号：US07463675B2
公开(公告)日：2008-12-09
申请号：US11398090
申请日：2006-04-05
CPC分类号： H04M1/573 , H04L7/033 , H04L25/0266 , H04L25/06 , H04M1/76 , H04M3/007 , H04M11/06 , H04M19/001 , H04M19/02
摘要： An isolation system is provided that is suitable for use in telephony, medical instrumentation, industrial process control and other applications. Preferred embodiments of the invention comprise a capacitive isolation barrier across which a digital signal is communicated. The system provides a means of communication across the isolation barrier that is highly immune to amplitude and phase noise interference. Clock recovery circuitry may be employed on one side of the isolation barrier to extract timing information from the digital signal communicated across the barrier, and to filter the effects of phase noise introduced at the barrier. Delta-sigma converters may be disposed on both sides of the isolation barrier to convert signals between analog and digital domains. An isolated power supply may also be provided on the isolated side of the barrier, whereby direct current is generated in response to the digital data received across the isolation barrier. Finally, a bidirectional isolation system is provided whereby bidirectional communication of digital signals is accomplished using a single pair of isolation capacitors. In preferred embodiments, the digital data communicated across the barrier consists of digital delta-sigma data signals multiplexed in time with other digital control, signaling and framing information.
摘要翻译： 提供了一种适用于电话，医疗仪器，工业过程控制和其他应用的隔离系统。 本发明的优选实施例包括电容隔离屏障，通过数字信号传送数字信号。 该系统提供跨越隔离屏障的通信手段，其高度免疫幅度和相位噪声干扰。 可以在隔离屏障的一侧采用时钟恢复电路，从跨屏障通信的数字信号提取定时信息，并且滤除在屏障处引入的相位噪声的影响。 Δ-Σ转换器可以设置在隔离屏障的两侧以在模拟和数字域之间转换信号。 隔离电源也可以设置在屏障的隔离侧上，由此响应于穿过隔离屏障接收的数字数据产生直流电流。 最后，提供双向隔离系统，由此使用单对隔离电容器实现数字信号的双向通信。 在优选实施例中，跨屏障通信的数字数据由与其他数字控制，信令和成帧信息在时间上多路复用的数字delta-sigma数据信号组成。
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公开(公告)号：US07376396B2
公开(公告)日：2008-05-20
申请号：US11096133
申请日：2005-03-31
申请人： David R. Welland , Caiyi Wang
发明人： David R. Welland , Caiyi Wang
CPC分类号： H04B1/403
摘要： A ratiometric transmit path architecture for communication systems and related methods are disclosed. This ratiometric transmit path architecture utilizes a single local oscillator signal and dividers to provide mixing signals for intermediate frequency (IF) mixing circuitry and feedback mixing circuitry, thereby eliminating the need for separate IF and radio frequency (RF) voltage controlled oscillators (VCOs) in prior solutions.
摘要翻译： 公开了用于通信系统和相关方法的比例传输路径架构。 这种比例传输路径架构利用单个本地振荡器信号和分频器来为中频（IF）混频电路和反馈混频电路提供混频信号，从而消除对单独的IF和射频（RF）压控振荡器（VCO）的需要 以前的解决方案。
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49.发明授权Method and apparatus for operating a PLL for synthesizing high-frequency signals for wireless communications 有权用于操作用于合成用于无线通信的高频信号的PLL的方法和装置公开(公告)号：US07353011B2
公开(公告)日：2008-04-01
申请号：US11180267
申请日：2005-07-13
申请人： David R. Welland , Caiyi Wang
发明人： David R. Welland , Caiyi Wang
CPC分类号： H03L7/193 , H03J2200/10 , H03L7/099 , H03L7/10 , H03L7/18 , H03L7/199 , H03L7/23 , H03L2207/06
摘要： A method and apparatus for synthesizing high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance to compensate for capacitor and inductor tolerances and to adjust the output frequency to be near the desired frequency output. The continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance to focus the output frequency to match precisely the desired frequency output. During fine tuning adjustment, the PLL may be controlled by a plurality of analog control signals. The analog control signals may be derived by first generating a plurality of phase shifted signals from a divided version of the VCO output clock. Second, the phase differences between the plurality of phase shifted signals and a divided version of a reference clock may be detected and then converted to the analog control signals.
摘要翻译： 用于合成诸如无线通信信号的高频信号的方法和装置包括具有可变电容电压控制振荡器（VCO）的锁相环（PLL）频率合成器，其具有连续变量的离散可变电容 电容。 离散可变电容可以提供可变电容的粗调谐调整，以补偿电容器和电感器公差，并将输出频率调整为接近期望的频率输出。 连续可变电容可以提供可变电容的微调调整，以将输出频率聚焦以精确地匹配期望的频率输出。 在微调调整期间，PLL可以由多个模拟控制信号控制。 可以通过首先从VCO输出时钟的分割版本产生多个相移信号来导出模拟控制信号。 第二，可以检测多个相移信号和参考时钟的分割版本之间的相位差，然后转换成模拟控制信号。
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公开(公告)号：US07301995B2
公开(公告)日：2007-11-27
申请号：US10780219
申请日：2004-02-17
CPC分类号： H04M1/573 , H04L7/033 , H04L25/0266 , H04L25/06 , H04M1/76 , H04M3/007 , H04M11/06 , H04M19/001 , H04M19/02
摘要： An isolation system is provided that is suitable for use in telephony, medical instrumentation, industrial process control and other applications. Preferred embodiments of the invention comprise a capacitive isolation barrier across which a digital signal is communicated. The system provides a means of communication across the isolation barrier that is highly immune to amplitude and phase noise interference. Clock recovery circuitry may be employed on one side of the isolation barrier to extract timing information from the digital signal communicated across the barrier, and to filter the effects of phase noise introduced at the barrier. Delta-sigma converters may be disposed on both sides of the isolation barrier to convert signals between analog and digital domains. An isolated power supply may also be provided on the isolated side of the barrier, whereby direct current is generated in response to the digital data received across the isolation barrier. Finally, a bidirectional isolation system is provided whereby bidirectional communication of digital signals is accomplished using a single pair of isolation capacitors. In preferred embodiments, the digital data communicated across the barrier consists of digital delta-sigma data signals multiplexed in time with other digital control, signaling and framing information.
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