公开(公告)号：US20050219926A1

公开(公告)日：2005-10-06

申请号：US11090179

申请日：2005-03-28

Applicant: Liang-Pin Tai ,  Jiun-Chiang Chen

Inventor： Liang-Pin Tai ,  Jiun-Chiang Chen

IPC: G01R31/00 ,  G11C7/02 ,  H02M3/158

CPC classification number: H02M3/1588 ,  H02M2001/0009 ,  Y02B70/1466

Abstract: A real current sense apparatus for a DC-to-DC converter uses a current mirror composed by two JFETs to mirror the output current of the converter to generate a temperature-independent mirror current to further generate a current sense signal. Due to the temperature-independence of the mirror current, the current sense signal is also temperature-independent.

Abstract translation: 用于DC-DC转换器的实际电流检测装置使用由两个JFET组成的电流镜来反映转换器的输出电流，以产生独立于温度的反射镜电流，以进一步产生电流检测信号。 由于镜电流的温度独立性，电流检测信号也与温度无关。

公开(公告)号：US06801030B2

公开(公告)日：2004-10-05

申请号：US10442084

申请日：2003-05-21

Applicant: Liang-Pin Tai ,  Shwu-Liang Hsieh ,  Hung-I Wang ,  Jing-Meng Liu

Inventor： Liang-Pin Tai ,  Shwu-Liang Hsieh ,  Hung-I Wang ,  Jing-Meng Liu

IPC: G01R3300

CPC classification number: G01R19/0092 ,  H02M3/1588 ,  H02M2001/0009 ,  Y02B70/1466

Abstract: A current sense apparatus and method comprises a common drain DMOSFET and a MOSFET connected in series between a high voltage and a low voltage to serve as an output stage. The DMOSFET produces a phase output current, a mirror current mirrored from the phase output current, and a sense voltage. A servo amplifier is connected with the mirror current and sense voltage to produce a current sense signal. Due to the mirror current from the DMOSFET proportional to the phase output current, the current sense apparatus senses the phase output current in a temperature independent manner.

Abstract translation: 电流检测装置和方法包括在高电压和低电压之间串联连接的公共漏极DMOSFET和MOSFET，用作输出级。 DMOSFET产生相输出电流，从相输出电流镜像的镜电流和感测电压。 伺服放大器与反射镜电流和感测电压连接，产生电流检测信号。 由于来自DMOSFET的反射电流与相输出电流成比例，电流检测装置以独立于温度的方式感测相输出电流。

公开(公告)号：US06670794B1

公开(公告)日：2003-12-30

申请号：US10193119

申请日：2002-07-12

Applicant: Hung-I Wang ,  Shwu-Liang Hsieh ,  Liang-Pin Tai ,  Jing-Meng Liu

Inventor： Hung-I Wang ,  Shwu-Liang Hsieh ,  Liang-Pin Tai ,  Jing-Meng Liu

IPC: G05F170

CPC classification number: H02M3/1584

Abstract: To balance the current of individual channel as well as regulate the output voltage for a multi-phase DC-to-DC buck converter, the converter output voltage is sensed and compared with a reference signal to produce a first error signal serving as first control signal for PWM signals of the converter and the channel currents are sensed, summed, averaged and subtracted to produce second error signals that are further modified by saw-tooth wave signal to produce second control signals for the PWM signals. Moreover, the reference signal is controlled by the summed channel currents for adjustable load regulation.

Abstract translation: 为了平衡单个通道的电流以及调节多相DC-DC降压转换器的输出电压，转换器输出电压被检测并与参考信号进行比较，以产生用作第一控制信号的第一误差信号 对于转换器的PWM信号和通道电流被感测，相加，平均和相减，以产生第二误差信号，其进一步被锯齿波信号修改以产生用于PWM信号的第二控制信号。 此外，参考信号由可调负载调节的总和通道电流控制。

公开(公告)号：US08724349B2

公开(公告)日：2014-05-13

申请号：US13173417

申请日：2011-06-30

Applicant: Chien-Fu Tang ,  Isaac Y. Chen ,  Liang-Pin Tai

Inventor： Chien-Fu Tang ,  Isaac Y. Chen ,  Liang-Pin Tai

IPC: H02M3/335

CPC classification number: H02M3/33515

Abstract: An apparatus and method for output voltage calibration of a primary feedback flyback power module extract the difference between the output voltage of the power module and a target value, and according thereto, calibrate a reference voltage which is used in regulation of the output voltage, to thereby calibrate the output voltage to be the target value.

Abstract translation: 用于主反馈反激功率模块的输出电压校准的装置和方法提取功率模块的输出电压与目标值之间的差异，并且根据该装置和方法校准用于调节输出电压的参考电压， 从而将输出电压校准为目标值。

公开(公告)号：US08063617B2

公开(公告)日：2011-11-22

申请号：US12382017

申请日：2009-03-06

Applicant: Ting-Hung Wang ,  Chia-Jung Lee ,  Liang-Pin Tai

Inventor： Ting-Hung Wang ,  Chia-Jung Lee ,  Liang-Pin Tai

IPC: G05F1/00

CPC classification number: H02M3/1584 ,  H02M2003/1566

Abstract: A per-phase quick response generation circuit generates a quick response signal to determine a quick response pulse to be inserted into a pulse width modulation signal of the corresponding phase. The quick response pulse will force the upper power switch of the corresponding phase on to increase the current supply ability during load transition. A multi-phase voltage regulator with the quick response generation circuit can have different quick response pulse widths for the interleaved phases, so as to decrease the current imbalance period of the voltage regulator after load transition.

Abstract translation: 每相快速响应发生电路产生快速响应信号以确定要插入相应相位的脉宽调制信号的快速响应脉冲。 快速响应脉冲将强制相应相位的上电源开关增加负载转换期间的电流供应能力。 具有快速响应发生电路的多相电压调节器可以对交错相位具有不同的快速响应脉冲宽度，从而减小负载转换后电压调节器的电流不平衡周期。

公开(公告)号：US08031493B2

公开(公告)日：2011-10-04

申请号：US12155771

申请日：2008-06-10

Applicant: Pei-Lun Huang ,  Liang-Pin Tai

Inventor： Pei-Lun Huang ,  Liang-Pin Tai

IPC: H02M3/335

CPC classification number: H02M3/33507

Abstract: A method and apparatus are provided for a switching mode converter to improve the light load efficiency thereof. The converter is thus operated with three modes by monitoring a feedback signal and a supply voltage. When the feedback signal indicates that loading gets light enough, the converter is switched from the first mode to the second mode, and during the second mode some cycles are skipped. If loading is too light, the converter is switched from the second mode to the third mode, and during the third mode more cycles will be skipped.

Abstract translation: 提供了一种用于开关模式转换器以提高其轻负载效率的方法和装置。 因此，通过监视反馈信号和电源电压，转换器通过三种模式运行。 当反馈信号指示负载变得足够亮时，转换器从第一模式切换到第二模式，并且在第二模式期间，跳过一些周期。 如果负载太轻，则转换器从第二模式切换到第三模式，而在第三模式期间，将跳过更多的周期。

公开(公告)号：US07838900B2

公开(公告)日：2010-11-23

申请号：US12385718

申请日：2009-04-17

Applicant: Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

Inventor： Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

IPC: H01L29/74 ,  H01L31/111

CPC classification number: H01L27/098 ,  H01L27/0744 ,  H01L29/7722 ,  H01L29/8083

Abstract: A single-chip common-drain JFET device comprises a Drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.

Abstract translation: 单芯片公共漏极JFET器件包括漏极，两个栅极和两个源极，使得与其形成两个公共漏极JFET。 由于在单个芯片内合并的两个JFET，其间不需要引线接合连接，因此没有由接合线引起的寄生电感和电阻，因此提高性能并降低封装成本。 单片式公共漏极JFET器件可以应用于降压转换器，升压转换器，反相转换器，开关和两级DC-DC转换器，以提高其性能和效率。 还提供了用于电流感测或比例电流产生的替代单芯片公共漏极JFET器件。

公开(公告)号：US07834606B2

公开(公告)日：2010-11-16

申请号：US11882485

申请日：2007-08-02

Applicant: Kuo-Ping Liu ,  Ko-Cheng Wang ,  Liang-Pin Tai ,  Chung-Sheng Cheng

Inventor： Kuo-Ping Liu ,  Ko-Cheng Wang ,  Liang-Pin Tai ,  Chung-Sheng Cheng

IPC: G05F1/00

CPC classification number: H02M3/157 ,  H02M2001/0048 ,  Y02B70/1491

Abstract: A control circuit provides a control signal for a constant on-time PWM switching converter to produce an output voltage, such that the converter operates with a constant on-time at a first state and operates with a variable on-time at a second state, so as to decrease the switching frequency and thereby the switching loss, to increase the efficiency of the converter, to improve the transient response, and to reduce the recovery time of the output voltage.

Abstract translation: 控制电路提供用于恒定导通时间PWM开关转换器的控制信号以产生输出电压，使得转换器在第一状态下以恒定导通时间工作，并且在第二状态下以可变导通时间操作， 从而降低开关频率，从而降低开关损耗，提高转换器的效率，改善瞬态响应，并减少输出电压的恢复时间。

公开(公告)号：US07781921B2

公开(公告)日：2010-08-24

申请号：US12287363

申请日：2008-10-08

Applicant: Chien-Hui Wang ,  Jian-Rong Huang ,  Kuo-Lung Tseng ,  Liang-Pin Tai

Inventor： Chien-Hui Wang ,  Jian-Rong Huang ,  Kuo-Lung Tseng ,  Liang-Pin Tai

IPC: G01R1/20 ,  G06F1/00

CPC classification number: H02M3/1588 ,  H02M1/08 ,  Y02B70/1466

Abstract: The subject matter is a voltage regulator capable of providing an indicator signal to a load, so that the load can operation under the best current-voltage relationship according to the indicator signal. To this end, the voltage regulator includes an amplifier for generating the indicator signal by amplifying a difference between a signal representative of an output voltage and a signal representative of a reference voltage.

Abstract translation: 主题是能够向负载提供指示信号的电压调节器，使得负载可以根据指示符信号在最佳电流 - 电压关系下操作。 为此，电压调节器包括放大器，用于通过放大表示输出电压的信号和表示参考电压的信号之间的差来产生指示符信号。

公开(公告)号：US20090201079A1

公开(公告)日：2009-08-13

申请号：US12385720

申请日：2009-04-17

Applicant: Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

Inventor： Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

IPC: G05F3/02

CPC classification number: H01L27/098 ,  H01L27/0744 ,  H01L29/7722 ,  H01L29/8083

Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.