公开(公告)号：US20080150597A1

公开(公告)日：2008-06-26

申请号：US11962429

申请日：2007-12-21

申请人： Wei Hu ,  Phil-Jae Jeon

发明人： Wei Hu ,  Phil-Jae Jeon

IPC分类号： H03L7/06

CPC分类号： H03L7/0995 ,  H03L7/0805 ,  H03L7/081 ,  H03L7/0891

摘要： An apparatus for controlling a delay includes a phase locked loop and a delay unit. The phase locked loop generates an oscillation signal having a frequency substantially identical to that of a reference signal. The delay unit includes a delay cell block that outputs delayed signals by delaying the reference signal sequentially by a uniform delay interval. The delay unit controls the delay interval based on a frequency/phase difference between a first input signal and a second input signal of the phase locked loop, and outputs one of the delayed signals as a delayed reference signal. Related methods are also described.

摘要翻译： 用于控制延迟的装置包括锁相环和延迟单元。 锁相环产生具有与参考信号基本相同的频率的振荡信号。 延迟单元包括延迟单元块，其通过以均匀延迟间隔顺序延迟参考信号来输出延迟信号。 延迟单元基于第一输入信号和锁相环路的第二输入信号之间的频率/相位差来控制延迟间隔，并且将延迟信号之一作为延迟参考信号输出。 还描述了相关方法。

公开(公告)号：USD558787S1

公开(公告)日：2008-01-01

申请号：US29275500

申请日：2006-12-28

申请人： Tzu-Cheng Yu ,  Wei Hu ,  Yu-Qing Geng

设计人： Tzu-Cheng Yu ,  Wei Hu ,  Yu-Qing Geng

公开(公告)号：US20070036257A1

公开(公告)日：2007-02-15

申请号：US11488508

申请日：2006-07-18

申请人： Wei Hu

发明人： Wei Hu

IPC分类号： H03D3/24

CPC分类号： H03L7/091 ,  H03L7/0891 ,  H03L7/0995 ,  H04J3/047 ,  H04L7/033

摘要： For clock and data recovery (CDR), a clock processor generates sampling clock signals from original phase-shifted clock signals each having a frequency that ⅛ of a frequency of an input data signal. The sampling clock signals are used to sample the input data signal for generating error signals and reference signals that determine a voltage control signal that indicates a clock frequency of the original clock signals generated by a voltage controlled oscillator (VCO).

摘要翻译： 对于时钟和数据恢复（CDR），时钟处理器从原始相移时钟信号产生每个具有输入数据信号频率的1/8频率的采样时钟信号。 采样时钟信号用于采样输入数据信号，用于产生误差信号和参考信号，该参考信号确定指示由压控振荡器（VCO）产生的原始时钟信号的时钟频率的电压控制信号。

公开(公告)号：US20060184487A1

公开(公告)日：2006-08-17

申请号：US11354673

申请日：2006-02-15

申请人： Wei Hu

发明人： Wei Hu

IPC分类号： G06N5/00

CPC分类号： G06N7/005

摘要： Methods, systems, and apparatus are provided to generate a most probable explanation (MPE) for a Bayesian Network (BN). A first data structure is populated by iterating from the leaves of a junction tree (derived from the BN) to the root and retaining maximum potentials along the way. A second data structure records selective index locations that map into the first data structure. These selective locations correspond to selective maximum potentials housed within the first data structure. All the selective maximum potentials are resolved once a root maximum potential is known for a given problem. The selective maximum potentials form a MPE through the junction tree to reach the result.

摘要翻译： 提供了方法，系统和装置来为贝叶斯网络（BN）产生最可能的解释（MPE）。 第一个数据结构通过从连接树的叶子（从BN导出）到根并且沿着保留最大电位来迭代来填充。 第二数据结构记录映射到第一数据结构的选择性索引位置。 这些选择性位置对应于容纳在第一数据结构内的选择性最大电位。 一旦给定问题已知根最大电位，所有选择性最大电位都被解析。 选择性最大电位通过接合树形成MPE以达到结果。

公开(公告)号：US20060017473A1

公开(公告)日：2006-01-26

申请号：US11185205

申请日：2005-07-19

申请人： Wei Hu

发明人： Wei Hu

IPC分类号： H03K21/00

CPC分类号： H03K23/667

摘要： We describe a dual modulus prescaler that may be used in a high frequency PLL. The prescaler comprises a frequency division unit to generate a prescaled signal by dividing a frequency of an input signal by a division ratio and a frequency division ratio controller to determine the division ratio responsive to a count signal and the prescaled signal. The frequency division unit divides a frequency of an input signal by a division ratio of 2N or (2N−1) to output a prescaled signal. The frequency division ratio controller determines a division ratio responsive to a count signal and the prescaled signal.

摘要翻译： 我们描述了可以在高频PLL中使用的双模预分频器。 预分频器包括：分频单元，用于通过将输入信号的频率除以分频比来产生预分频信号，并且分频比控制器响应于计数信号和预分频信号来确定分频比。 分频单元将输入信号的频率除以2N或（2N-1）的分频比来输出预分频信号。 分频比控制器响应于计数信号和预分频信号来确定分频比。

公开(公告)号：US06498549B1

公开(公告)日：2002-12-24

申请号：US09457430

申请日：1999-12-07

申请人： Hua Jiang ,  Wei Hu ,  Shaohua Liang ,  Yi-Qun Li ,  Vladimir Fuflyigin ,  Jiankang Huang

发明人： Hua Jiang ,  Wei Hu ,  Shaohua Liang ,  Yi-Qun Li ,  Vladimir Fuflyigin ,  Jiankang Huang

IPC分类号： H01P120

CPC分类号： H01P1/20381 ,  H01P1/181 ,  H01P1/20363 ,  H01P1/20372 ,  H01P7/082 ,  H01P7/088

摘要： A ferroelectric layer is deposited or in close proximity to a ferromagnetic ferrite layer to make a microwave substrate on which conductors can be deposited or placed to make devices. The permittivity of the ferroelectric layer can be changed by applying a voltage and the permeability of the ferromagnetic layer can be changed with a magnetic field. This makes it possible to tune the device characteristics with two different effects taking best advantage of the capabilities of each. A material example is ferromagnetic yttrium-iron-garnet on which is deposited a thin film of ferroelectric barium strontium titanate. To minimize losses, the ferroelectric film should be high quality, but practical yttrium-iron-garnet substrates are polycrystalline so that the use of buffer layers is desirable. At least two methods can be used to deposit the ferroelectric film, pulsed laser deposition and metal-organic chemical liquid deposition. A variety of dual tunable microwave devices can be made with this substrate, including by way of example only, phase shifters, frequency filters, and resonators.

摘要翻译： 沉积铁电层或紧邻铁磁性铁氧体层，以制成微波基板，导体可以沉积或放置在其上以制造器件。 可以通过施加电压来改变铁电层的介电常数，并且可以用磁场改变铁磁层的磁导率。 这使得可以利用两种不同的效果来调整设备特性，最大限度地利用每个特性的能力。 材料实例是铁磁钇 - 铁 - 石榴石，在其上沉积铁电钡钛酸锶薄膜。 为了使损耗最小化，铁电体膜应该是高质量的，但是实用的钇 - 铁 - 石榴石基材是多晶的，所以需要使用缓冲层。 可以使用至少两种方法来沉积铁电薄膜，脉冲激光沉积和金属有机化学液体沉积。 可以使用该衬底制造各种双可调微波器件，仅包括移相器，频率滤波器和谐振器。

公开(公告)号：USD1006867S1

公开(公告)日：2023-12-05

申请号：US29899594

申请日：2023-08-10

申请人： Wei Hu

设计人： Wei Hu

摘要： FIG. 1 is a top, front and right side perspective view of an electronic drum set showing my new design;
FIG. 2 is a bottom, rear, left side perspective view thereof;
FIG. 3 is a front elevational view thereof;
FIG. 4 is a back elevational view thereof;
FIG. 5 is a left side elevational view thereof;
FIG. 6 is a right side elevational view thereof;
FIG. 7 is a top plan view thereof;
FIG. 8 is a bottom plan view thereof; and,
FIG. 9 is an enlarged view of the portion taken at line-9 in FIG. 8.

公开(公告)号：US10480735B2

公开(公告)日：2019-11-19

申请号：US16046790

申请日：2018-07-26

申请人： Wei Hu ,  Chao Li

发明人： Wei Hu ,  Chao Li

IPC分类号： F21S10/04 ,  H02N15/00

摘要： A magnetic levitation imitation flame device includes a mounting base, a flame member, a positioning bracket, a first magnet, and a second magnet. The positioning bracket is fixed in the mounting base. The first magnet is disposed on the flame member. The flame member is disposed on the positioning bracket and protrudes outwards from the mounting base. The second magnet is fixed at a lower end of the positioning bracket. The first magnet and the second magnet are arranged up and down. Magnetic poles thereof facing each other have same polarity so that the flame member is levitated relative to the positioning bracket under a repulsive force of the first magnet and the second magnet. Thus, the flame member swings with big angle, naturally and realistically, and saves electric energy. In addition, an imitation flame lamp is also provided.

公开(公告)号：US09796002B2

公开(公告)日：2017-10-24

申请号：US13817357

申请日：2012-03-05

申请人： Yanqing Lu ,  Xikui Hu ,  Fei Xu ,  Wei Hu

发明人： Yanqing Lu ,  Xikui Hu ,  Fei Xu ,  Wei Hu

IPC分类号： B08B7/02 ,  B01D51/08

CPC分类号： B08B7/026

摘要： Technologies are generally described for systems and methods effective to implement particle removal. In one example, a method for at least partially removing particles from a region is generally described. In some examples, the method includes applying an electric field to a material to produce an acoustic wave from the material. The material may have a periodic piezoelectric coefficient. The method may include applying the acoustic wave to the region to produce an agglomeration. The agglomeration may include at least two of the particles. The method may further include at least partially removing the agglomeration from the region.

公开(公告)号：US09221675B2

公开(公告)日：2015-12-29

申请号：US13561194

申请日：2012-07-30

申请人： Wei Hu ,  Gang Li ,  Jia-Xin Mei

发明人： Wei Hu ,  Gang Li ,  Jia-Xin Mei

IPC分类号： B81C1/00 ,  H04R31/00 ,  H04R19/00

CPC分类号： B81C1/00158 ,  B81C1/00246 ,  H04R19/005 ,  H04R31/00

摘要： A method for integrating an IC and a MEMS component includes the following steps: S1) providing a SOI base (20) having a first area (21) and a second area (22); S2) fabricating an IC on the first area through a standard semiconductor process, and simultaneously forming a metal conductive layer (26) and a medium insulation layer (25c) extending to the second area; S3) partly removing the medium insulation layer and then further partly removing the silicon component layer so as to form a backplate diagram; S4) depositing a sacrificial layer (32) above the SOI base; S5) forming a Poly Sil-xGex film (33) on the sacrificial layer; S6) forming a back cavity (34); and S7) eroding the sacrificial layer to form a chamber (36) in communication with the back cavity. Besides, a chip (10) fabricated by the above method is also disclosed.

摘要翻译： 一种用于集成IC和MEMS部件的方法包括以下步骤：S1）提供具有第一区域（21）和第二区域（22）的SOI基底（20）; S2）通过标准半导体工艺在第一区域上制造IC，同时形成延伸到第二区域的金属导电层（26）和介质绝缘层（25c）; S3）部分地去除介质绝缘层，然后进一步部分去除硅组分层以形成背板图; S4）在SOI基底上方沉积牺牲层（32）; S5）在牺牲层上形成Poly Sil-xGex膜（33）; S6）形成后腔（34）; 和S7）侵蚀牺牲层以形成与后腔连通的腔室（36）。 此外，还公开了通过上述方法制造的芯片（10）。