公开(公告)号：US07684426B2

公开(公告)日：2010-03-23

申请号：US11336188

申请日：2006-01-20

Applicant: Paolo Narvaez ,  Murat Bog

Inventor： Paolo Narvaez ,  Murat Bog

IPC: H04L12/54

CPC classification number: H04L49/552 ,  H04J3/062 ,  H04J3/12 ,  H04J3/1611 ,  H04J3/1617 ,  H04J2203/0069 ,  H04J2203/0085 ,  H04J2203/0094 ,  H04L12/54 ,  H04L49/351

Abstract: A system and method are provided for performing Local Center Authorization Service (LCAS) in a network system, the system having a data aligner configured to align bytes of input data according to groups of members. The system also including an LCAS control manager configured to generate de-sequencing control commands in response to data input from the data aligner. The system further including a de-sequencer configured to de-sequence the input data input from the data aligner according to de-sequencing control commands received from the LCAS control manager.

Abstract translation: 提供了一种用于在网络系统中执行本地中心授权服务（LCAS）的系统和方法，所述系统具有数据对准器，其被配置为根据成员组来对齐输入数据的字节。 该系统还包括LCAS控制管理器，该LCAS控制管理器被配置为响应于从数据对准器输入的数据而产生解排序控制命令。 该系统还包括解调器，其被配置为根据从LCAS控制管理器接收的去排序控制命令来对从数据对准器输入的输入数据进行排序。

公开(公告)号：US07679345B1

公开(公告)日：2010-03-16

申请号：US11869595

申请日：2007-10-09

Applicant: Shwetabh Verma ,  Marc Loinaz

Inventor： Shwetabh Verma ,  Marc Loinaz

IPC: G05F1/40

CPC classification number: G05F1/575

Abstract: A digital linear voltage regulator includes a comparator, a finite state machine, and a current digital-to-analog converter (DAC). The comparator is preferably coupled to receive a reference voltage and an operating voltage supplied to a dynamic load. The comparator generates, during a clock cycle, a binary output based on a comparison between reference and operating voltages. The finite state machine (FSM) is coupled to receive at least one control signal that indicates a target operating state for the digital linear voltage regulator. The FSM receives the binary output from the comparator and generates a digital word, during a clock cycle, based on the target operating state of the digital linear voltage regulator and on the binary output. The current DAC is coupled to the FSM, receives the digital word and delivers current at the desired voltage to the dynamic load.

Abstract translation: 数字线性稳压器包括比较器，有限状态机和当前的数模转换器（DAC）。 优选地，比较器被耦合以接收提供给动态负载的参考电压和工作电压。 比较器根据参考电压和工作电压之间的比较，在时钟周期内产生二进制输出。 有限状态机（FSM）被耦合以接收指示数字线性电压调节器的目标操作状态的至少一个控制信号。 FSM从比较器接收二进制输出，并在时钟周期内根据数字线性稳压器的目标工作状态和二进制输出产生数字字。 当前的DAC耦合到FSM，接收数字字，并将电流以期望的电压传递给动态负载。

公开(公告)号：US07660140B1

公开(公告)日：2010-02-09

申请号：US12341754

申请日：2008-12-22

Applicant: Sachin Joshi ,  Mark Birman ,  Maheshwaran Srinivasan ,  Sandeep Khanna ,  Varadarajan Srinivasan

Inventor： Sachin Joshi ,  Mark Birman ,  Maheshwaran Srinivasan ,  Sandeep Khanna ,  Varadarajan Srinivasan

IPC: G11C15/00

CPC classification number: G11C15/00 ,  G11C15/04 ,  G11C15/046

Abstract: A content addressable memory (CAM) device includes a plurality of CAM rows, a number of sequencing logic circuits, and a programmable interconnect structure. Each CAM row includes a number of CAM cells to generate a match signal on a match line and includes an enable input. Each sequencing logic circuit includes an input and an output, and is configured to count sequences of match signals from the CAM rows. The programmable interconnect structure selectively connects the match line of any CAM row to the input of any sequencing logic circuit, and selectively connects the output of any sequencing logic circuit to the enable input of any CAM row.

公开(公告)号：US07656716B1

公开(公告)日：2010-02-02

申请号：US12341284

申请日：2008-12-22

Applicant: Varadarajan Srinivasan ,  Maheshwaran Srinivasan ,  Sachin Joshi ,  Sandeep Khanna ,  De Cai Li

Inventor： Varadarajan Srinivasan ,  Maheshwaran Srinivasan ,  Sachin Joshi ,  Sandeep Khanna ,  De Cai Li

IPC: G11C7/00

CPC classification number: G11C15/00 ,  G11C15/04 ,  G11C15/046

Abstract: A system for searching an input string for a number of regular expressions includes a search block and a compiler. The search block includes a plurality of content addressable memory (CAM) devices, wherein each of the CAM devices is differently configured to implement search operations for regular expressions having a unique level of complexity. The compiler is configured to determine the complexity level of each of the regular expressions, and is configured to store each regular expression in a selected one of the CAM devices according to its complexity level.

Abstract translation: 用于搜索用于多个正则表达式的输入字符串的系统包括搜索块和编译器。 搜索块包括多个内容可寻址存储器（CAM）设备，其中每个CAM设备被不同地配置为对具有独特复杂度的正则表达式实现搜索操作。 编译器被配置为确定每个正则表达式的复杂度级别，并且被配置为根据其复杂度级别将所选择的一个CAM设备中的每个正则表达式存储。

公开(公告)号：US07613755B1

公开(公告)日：2009-11-03

申请号：US11397308

申请日：2006-04-03

Applicant: Srinivasan Venkatachary

Inventor： Srinivasan Venkatachary

IPC: G06F15/00

CPC classification number: G06F17/30985 ,  H04L63/1416

Abstract: In a signature searching system, contents of a ternary content addressable memory (CAM) are searched to obtain a first index value that corresponds to a first group of predetermined data sequences. The first group of predetermined data sequences is selected from among a plurality of groups of predetermined data sequences based, at least in part, on the first index value, and a determination made as to whether any of the predetermined data sequences within the first group is present within a stream of data.

Abstract translation: 在签名搜索系统中，搜索三元内容可寻址存储器（CAM）的内容以获得对应于第一组预定数据序列的第一索引值。 至少部分地基于第一索引值从预定数据序列的多个组中选择第一组预定数据序列，并且确定第一组内的任何预定数据序列是否为 在数据流内存在。

公开(公告)号：US07581059B2

公开(公告)日：2009-08-25

申请号：US11460615

申请日：2006-07-27

Applicant: Pankaj Gupta ,  Srinivasan Venkalachary

Inventor： Pankaj Gupta ,  Srinivasan Venkalachary

IPC: G06F12/00

CPC classification number: G11C15/00

Abstract: Controlling a searchable range within a network search engine. A CAM array is provided within the network search engine to store data values in entries having respective addresses and to compare the data values with a search key. First address and a second addresses that define a range of the addresses are received at an interface of the network search engine, and range-control circuitry is provided within the network search engine to generate a hit signal having either a first state or a second state according to whether any of the entries having addresses within the range of addresses match the search key.

Abstract translation: 控制网络搜索引擎中的可搜索范围。 在网络搜索引擎内提供CAM阵列，以将数据值存储在具有相应地址的条目中，并将数据值与搜索关键字进行比较。 在网络搜索引擎的接口处接收定义地址范围的第一地址和第二地址，并且在网络搜索引擎内提供范围控制电路以产生具有第一状态或第二状态的命中信号 根据具有地址范围内的地址的任何条目是否匹配搜索关键字。

公开(公告)号：US07577784B1

公开(公告)日：2009-08-18

申请号：US11011464

申请日：2004-12-13

Applicant: Scott Smith

Inventor： Scott Smith

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G11C15/00 ,  G11C15/04

CPC classification number: G11C15/00

Abstract: A ternary content addressable memory (TCAM) system and method of operating the same can enable a user to configure the system to operate as either a pseudo TCAM or full TCAM system. Control logic (206) can have an address modification circuit (250) coupled between multiple inputs and row decoders (206-0 and 206-1) for simultaneously writing the same mask value to mask fields of a predetermined number of memory locations in a full TCAM array.

Abstract translation: 三元内容可寻址存储器（TCAM）系统及其操作方法可以使用户能够将系统配置为伪TCAM或全TCAM系统。 控制逻辑（206）可以具有耦合在多个输入和行解码器（206-0和206-1）之间的地址修改电路（250），用于同时将相同的掩码值写入到完整的预定数量的存储器位置的掩码域中 TCAM阵列。

公开(公告)号：US07571156B1

公开(公告)日：2009-08-04

申请号：US10809244

申请日：2004-03-25

Applicant: Pankaj Gupta ,  Srinivasan Venkatachary

Inventor： Pankaj Gupta ,  Srinivasan Venkatachary

IPC: G06F7/00 ,  G06F17/30

CPC classification number: H04L45/00 ,  H04L45/02 ,  H04L45/7457 ,  Y10S707/99933 ,  Y10S707/99942 ,  Y10S707/99943

Abstract: Network devices, storage mediums and methods for updating a memory structure in a data plane of the network device when route updates are received in the control plane of the network device. The methods described herein can be used to perform one of the following algorithms: a Basic Incremental Split-Merge (BISM) algorithm, a Lazy Incremental Split-Merge (LISM) algorithm, and a Down-support Split-Merge (DSM) algorithm. Each of the algorithms described herein may be used to incrementally update portions of a forwarding database stored within the memory structure, where the updated portions correspond to only those portions affected by the route updates.

Abstract translation: 网络设备，存储介质和用于在网络设备的控制平面中接收到路由更新时更新网络设备的数据平面中的存储器结构的方法。 本文描述的方法可用于执行以下算法之一：基本增量分割合并（BISM）算法，延迟增量分割合并（LISM）算法和向下支持分割合并（DSM）算法。 本文描述的每个算法可以用于递增地更新存储在存储器结构内的转发数据库的部分，其中更新部分仅对应于受路由更新影响的那些部分。

公开(公告)号：US07555594B2

公开(公告)日：2009-06-30

申请号：US11428381

申请日：2006-06-30

Applicant: Srinivasan Venkatachary

Inventor： Srinivasan Venkatachary

IPC: G06F12/00

CPC classification number: G11C15/00 ,  H03M7/30

Abstract: In a method and apparatus for encoding a bit field within a memory device, the bit field is encoded in a manner that requires fewer memory device entries and fewer encoded bits per entry than conventional encoding schemes.

Abstract translation: 在用于对存储器件中的位域进行编码的方法和装置中，以常规编码方案，每个入口需要更少的存储器件条目和较少编码位的方式对位域进行编码。

公开(公告)号：US07539031B2

公开(公告)日：2009-05-26

申请号：US11524026

申请日：2006-09-19

Applicant: Ajit V. Ninan ,  Alexander Y. Levitskiy

Inventor： Ajit V. Ninan ,  Alexander Y. Levitskiy

IPC: G11C15/00

CPC classification number: G06F17/30985 ,  G06F17/30495 ,  G06F17/30536

Abstract: A search circuit for determining whether an input string including a plurality of input characters matches an inexact pattern including a number of pattern characters that are members of a specified character set, the search circuit including an input for receiving a bitcheck command, the bitcheck command containing a bitmap including a plurality of compliance bits each indicating whether a corresponding one of a plurality of reference characters of a general character set is a member of the specified character set, and a circuit for referencing each of the input characters to a corresponding compliance bit in the bitmap to determine whether the input character are members of the specified character set.

Abstract translation: 一种搜索电路，用于确定包括多个输入字符的输入串是否包括包括指定字符集成员的多个模式字符的不精确模式，所述搜索电路包括用于接收位检查命令的输入，所述位检查命令包含 位图，其包括多个符合性位，每个符合位指示一般字符集的多个参考字符中的相应一个是否是所指定的字符集的成员;以及电路，用于将每个输入字符引用到相应的符合位 位图确定输入的字符是否是指定字符集的成员。