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公开(公告)号：US11747363B2
公开(公告)日：2023-09-05
申请号：US17552847
申请日：2021-12-16
发明人： Molly Piels , Anand Ramaswamy , Brandon Gomez
IPC分类号： G01R1/067 , G01R31/3185 , G01R31/308
CPC分类号： G01R1/067 , G01R31/318511 , G01R31/308
摘要： Described are various configurations for performing efficient optical and electrical testing of an opto-electrical device using a compact opto-electrical probe. The compact opto-electrical probe can include electrical contacts arranged for a given electrical contact layout of the opto-electrical device, and optical interface with a window in a probe core that transmits light from the opto-electrical device. An adjustable optical coupler of the probe can be mechanically positioned to receive light from the device's emitter to perform simultaneous optical and electrical analysis of the device.
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公开(公告)号：US11693195B2
公开(公告)日：2023-07-04
申请号：US17865926
申请日：2022-07-15
CPC分类号： G02B6/4227 , G02B6/4225 , G02B6/4239 , G02B27/62
摘要： An optical pick and place machine that includes a self-calibrating optical controller for error feedback based optical placement of optical components using active alignment is described. The optical controller can include a loopback mode to generate a baseline value of light generated by a light source and measured by a photodetector within the optical controller. The optical controller can further include an active alignment mode in which the light is coupled from the pick and place machine to the optical device on which the component is placed. The optical coupling of the placed component can be evaluated against the baseline value to ensure that the optical coupling is within specification (e.g., within a prespecified range).
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公开(公告)号：US11678091B2
公开(公告)日：2023-06-13
申请号：US17735852
申请日：2022-05-03
发明人： Jonathan Edgar Roth
IPC分类号： H04Q11/00 , G02B6/35 , H04B10/548 , G02F1/313
CPC分类号： H04Q11/0005 , G02B6/3546 , G02B6/3588 , G02F1/3136 , H04B10/548 , H04Q2011/0015 , H04Q2011/0049
摘要： Described are various configurations of reduced crosstalk optical switches. Various embodiments can reduce or entirely eliminate crosstalk using a coupler that has a power-splitting ratio that compensates for amplitude imbalance caused by phase modulator attenuation. Some embodiments implement a plurality of phase modulators and couplers as part of a dilated switch network to increase overall bandwidth and further reduce potential for crosstalk.
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公开(公告)号：US11624942B2
公开(公告)日：2023-04-11
申请号：US17349389
申请日：2021-06-16
摘要： Described herein are methods, systems, and apparatuses to utilize an electro-optic modulator including one or more heating elements. The modulator can utilize one or more heating elements to control an absorption or phase shift of the modulated optical signal. At least the active region of the modulator and the one or more heating elements of the modulator are included in a thermal isolation region comprising a low thermal conductivity to thermally isolate the active region and the one or more heating elements from a substrate of the PIC.
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公开(公告)号：US11513288B2
公开(公告)日：2022-11-29
申请号：US17146956
申请日：2021-01-12
发明人： Avi Feshali , John Hutchinson , Jared Bauters
摘要： In integrated optical structures (e.g., silicon-to-silicon-nitride mode converters) implemented in semiconductor-on-insulator substrates, wire waveguides whose sidewalls substantially consist of portions coinciding with crystallographic planes and do not extend laterally beyond the top surface of the wire waveguide may provide benefits in performance and/or manufacturing needs. Such wire waveguides may be manufactured, e.g., using a dry-etch of the semiconductor device layer down to the insulator layer to form a wire waveguide with exposed sidewalls, followed by a smoothing crystallographic wet etch.
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公开(公告)号：US11499923B2
公开(公告)日：2022-11-15
申请号：US17038422
申请日：2020-09-30
发明人： Benjamin M. Curtin
摘要： Photonic errors in a photonic integrated circuit can be imaged using an on-chip light source integrated in a photonic layer of the circuit. The on-chip light source can generate light at wavelengths that propagates through one or more substrate layers to an image sensor sensitive to the wavelength range. The on-chip light source can be tunable and provide different power settings that can be utilized to detect different types of optical errors in the photonic integrated circuit.
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公开(公告)号：US11476636B2
公开(公告)日：2022-10-18
申请号：US16286358
申请日：2019-02-26
IPC分类号： G02B6/293 , H01S5/00 , H01S5/0687 , H01S5/06 , H01S5/068 , G01J3/02 , G01J9/02 , G02B6/12 , H01S5/026 , G02B6/00
摘要： Described are various configurations of integrated wavelength lockers including asymmetric Mach-Zehnder interferometers (AMZIs) and associated detectors. Various embodiments provide improved wavelength-locking accuracy by using an active tuning element in the AMZI to achieve an operational position with high locking sensitivity, a coherent receiver to reduce the frequency-dependence of the locking sensitivity, and/or a temperature sensor and/or strain gauge to computationally correct for the effect of temperature or strain changes.
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公开(公告)号：US20220326437A1
公开(公告)日：2022-10-13
申请号：US17852968
申请日：2022-06-29
IPC分类号： G02B6/12 , G02B6/122 , G02B6/42 , H01L27/146
摘要： Described are various configurations of optical structures having asymmetric-width waveguides. A photodetector can include parallel waveguides that have different widths, which can be connected via passive waveguide. One or more light absorbing regions can be proximate to the waveguides to absorb light propagating through one or more of the parallel waveguides. Multiple photodetectors having asymmetric width waveguides can operate to transduce light in different modes in a polarization diversity optical receiver.
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公开(公告)号：US11430901B2
公开(公告)日：2022-08-30
申请号：US17065180
申请日：2020-10-07
IPC分类号： H01L31/0304 , H01S5/32 , H01S5/024 , H01L31/109 , H01L31/0328 , H01L31/0232 , H01S5/02 , H01S5/026 , H01S5/10
摘要： Embodiments of the invention describe apparatuses, optical systems, and methods related to utilizing optical cladding layers. According to one embodiment, a hybrid optical device includes a silicon semiconductor layer and a III-V semiconductor layer having an overlapping region, wherein a majority of a field of an optical mode in the overlapping region is to be contained in the III-V semiconductor layer. A cladding region between the silicon semiconductor layer and the III-V semiconductor layer has a spatial property to substantially confine the optical mode to the III-V semiconductor layer and enable heat dissipation through the silicon semiconductor layer.
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