公开(公告)号：US20210088378A1

公开(公告)日：2021-03-25

申请号：US17024202

申请日：2020-09-17

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

Inventor： Stephane MONFRAY ,  Olivier LE NEEL ,  Frederic BOEUF

IPC: G01J1/04 ,  H01L31/0232 ,  H01L31/101 ,  G02B5/18 ,  G01J1/44

Abstract: A light sensor includes a semiconductor substrate supporting a number of pixels. Each pixel includes a photoconversion zone extending in the substrate between a front face and a back face of the substrate. An optical diffraction grating is arranged over the back face of the substrate at a position facing the photoconversion zone of the pixel. For at least two different pixels of the light sensor, the optical diffraction gratings have different pitches. Additionally, the optical grating of each pixel is surrounded by an opaque wall configured to absorb at operating wavelengths of the sensor.

公开(公告)号：US10917106B2

公开(公告)日：2021-02-09

申请号：US16709391

申请日：2019-12-10

Applicant: STMicroelectronics SA ,  STMicroelectronics (Alps) SAS

Inventor： Stephane Le Tual ,  Jean-Pierre Blanc ,  David Duperray

IPC: H03M1/66 ,  H03M1/68 ,  H03M1/06

Abstract: An acquisition stage receives a digital input signal and generates therefrom a first digital signal and a second digital signal complementary thereto. First and second processing stages receive the first and second digital signals and generate therefrom first and second analog signals in time with first and second complementary clock signals. An output stage generates an internal clock signal equivalent to one of: the first clock signal phase shifted by a duration of a transient occurring during a period of the first clock signal, or the second clock signal phase shifted by a duration of a transient occurring during a period of the second clock signal. The output stage produces an analog output signal equal to the first analog signal when the internal clock signal is at a first logic level, and equal to the second analog signal when the internal clock signal is at a second logic level.

公开(公告)号：US10823771B2

公开(公告)日：2020-11-03

申请号：US16280190

申请日：2019-02-20

Applicant: STMicroelectronics SA

Inventor： Marc Houdebine ,  Sebastien Dedieu

IPC: G01R23/10 ,  G01R23/02 ,  H03D13/00

Abstract: A method includes a) counting whole periods of a signal during a first period of a reference signal, b) repeating step a) for each period of the reference signal until a first duration is equal to a first quantity of periods of the reference signal, and c) determining a first average of the whole periods. The method also includes repeating at least one of steps a) to c) and at each repetition shifting a start of the counting of step a) by at least one period of the reference signal, and in steps b) and c) accounting for whole periods of the signal already counted during the at least one preceding group of steps a) and b). The method includes determining a second average of the first averages, and determining the frequency of the signal from the second average and the frequency of the reference signal.

公开(公告)号：US10796191B2

公开(公告)日：2020-10-06

申请号：US16142544

申请日：2018-09-26

Applicant: STMicroelectronics SA ,  STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED

Inventor： Francois De Salivet de Fouchecour ,  Stuart McLeod ,  Donald Baxter ,  Olivier Pothier ,  Thierry Lebihen

IPC: G06K9/46 ,  G06T7/521 ,  G06T7/162

Abstract: An example device has optical emitters for emitting incident radiation within a field of view and optical detectors for receiving reflected radiation. Based on the incident radiation and the reflected radiation, a histogram indicative of a number of photon events that are detected by the optical detectors over time bins is generated. The time bins is indicative of time differences between emission of the incident radiation and reception of the reflected radiation. The device further includes; a processor programmed to iteratively process the histogram by executing an expectation-maximization algorithm to detect a presence of objects located in the field of view of the device.

公开(公告)号：US10749719B2

公开(公告)日：2020-08-18

申请号：US16569999

申请日：2019-09-13

Applicant: STMicroelectronics SA

Inventor： Marc Houdebine

IPC: H04L27/00

Abstract: A method of contactless communication can be performed between an object and a reader using active load modulation. A synchronization process is performed between a first carrier signal transmitted by the reader and having a reference frequency, and a second carrier signal extracted from an output signal of a controlled oscillator of a digital phase-locked loop of the object. In the synchronization process, as long as a locking of the loop has not been detected, the frequency of the output signal of the oscillator is latched on a frequency that is a multiple of the reference frequency. Once the locking has been detected, the latching continues while controlling the oscillator with a second control signal generated from a second value obtained.

公开(公告)号：US20200076458A1

公开(公告)日：2020-03-05

申请号：US16610834

申请日：2017-05-05

Applicant: STMicroelectronics SA ,  CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE ,  INSTITUT POLYTECHNIQUE DE BORDEAUX ,  UNIVERSITE DE BORDEAUX

Inventor： Vincent Knopik ,  Boris Moret ,  Eric Kerherve

IPC: H04B1/04 ,  G01K13/00

Abstract: A method is provided for controlling the matching of an antenna to a transmission path. The transmission path includes an amplifier stage coupled at an input or at an output to the antenna and to a resistive load. The method includes performing a checking phase by measuring a first current temperature at or in proximity of the antenna and a second current temperature at or in proximity of the resistive load, triggering a matching of the impedance seen at the input or at the output of the amplifier stage in the presence of a first condition involving the first and second current temperatures, and then stopping the matching of the impedance in the presence of a second condition involving the second current temperature

公开(公告)号：US20200076385A1

公开(公告)日：2020-03-05

申请号：US16545981

申请日：2019-08-20

Applicant: STMicroelectronics SA

Inventor： Renald Boulestin

IPC: H03F3/45 ,  H03G3/30 ,  H03F3/68 ,  H04B1/16 ,  H04B1/18 ,  H04W4/80

Abstract: A variable-gain amplifier includes two amplification and attenuation branches, and first and a second resistive elements that are coupled between the two branches. Each branch includes a voltage follower stage and a configurable amplification stage. The voltage follower stages are intended to receive a differential signal and are configured to deliver, via the first resistive element, an intermediate differential current signal. The amplification stages are intended to receive the intermediate differential current signal and a digital control word, and are configured to deliver, via the second resistive element, an output differential voltage signal depending on the value of the digital control word.

公开(公告)号：US10560071B2

公开(公告)日：2020-02-11

申请号：US15978894

申请日：2018-05-14

Applicant: STMicroelectronics SA

Inventor： Renald Boulestin

IPC: H03H11/24 ,  H03F3/19 ,  H04B1/40 ,  H03G3/30

Abstract: An embodiment attenuator includes a plurality of circuits coupled in series. A respective circuit includes a first capacitor connected between an input node of the respective circuit and an output node of the respective circuit, and a second capacitor connected between the output node of the respective circuit and a reference node. The output node of the respective circuit, other than a last circuit of the plurality of circuits, is connected to the input node of a successive circuit. The attenuator further includes a plurality of selectors, in which the respective circuit is associated with a respective selector that is coupled between the output node of the respective circuit and an output node of the attenuator.

公开(公告)号：US20190386567A1

公开(公告)日：2019-12-19

申请号：US16437923

申请日：2019-06-11

Applicant: STMicroelectronics SA

Inventor： Francois AGUT ,  Severin TROCHUT

IPC: H02M3/158 ,  H02M1/36 ,  H02M1/08

Abstract: A switched-mode power converter device includes an inductive element coupling a first node receiving an input voltage to a second node. A first transistor couples the second node to a third node generating an output voltage. A control circuit includes a first switch coupling the third node to a control terminal of the first transistor.

公开(公告)号：US20190384338A1

公开(公告)日：2019-12-19

申请号：US16438206

申请日：2019-06-11

Applicant: STMicroelectronics SA

Inventor： Lionel VOGT ,  Eoin Padraig O HANNAIDH

IPC: G05F1/575 ,  G05F1/565

Abstract: A low-dropout voltage regulation device includes a power stage having an output terminal coupled to a load circuit, the load circuit being operable in a plurality of operating modes. The load circuit is configured to receive a different respective output current when in each of the plurality of operating modes. An error amplifier has an output coupled to an input terminal of the power stage. A compensation circuit is coupled to the input terminal of the power stage and is operable in a plurality of selectable configurations that are respectively tailored to the plurality of operating modes. The plurality of selectable configurations are selectable in response to a control signal representative of a current operating mode of the load circuit.