公开(公告)号：US20140236560A1

公开(公告)日：2014-08-21

申请号：US14185969

申请日：2014-02-21

Applicant: dSPACE digital signal processing and control engineering GmbH

Inventor： Thorsten BREHM ,  Susanne KOEHL ,  Juergen PAULE ,  Juergen KLAHOLD ,  Claus DIENER

IPC: G06F17/50

CPC classification number: G06F17/5009 ,  G06F11/2289

Abstract: A method for performing an inventory of the hardware components connected to a control unit test system, wherein control units can be tested with the test system in an environment simulated by the test system by means of a model, and wherein the test system comprises at least one computer) and hardware components that are connected to one another by means of at least one network. For at least a portion of the hardware components, in particular of all simulation-specific hardware components, at least one item of component information that uniquely and digitally identifies the hardware component is read therefrom, and all identifying component information that has been read out is stored.

Abstract translation: 一种用于执行连接到控制单元测试系统的硬件组件的清单的方法，其中可以在由测试系统通过模型模拟的环境中用测试系统测试控制单元，并且其中测试系统至少包括 一个计算机）和通过至少一个网络彼此连接的硬件组件。 对于硬件组件的至少一部分，特别是所有特定于仿真的硬件组件的至少一部分，从其中读取唯一地和数字地识别硬件组件的至少一个组件信息项，并且已经读出的所有标识组件信息是 存储。

公开(公告)号：US20140229723A1

公开(公告)日：2014-08-14

申请号：US14177583

申请日：2014-02-11

Applicant: dSPACE digital signal processing and control engineering GmbH

Inventor： Heiko KALTE

IPC: G06F9/44

CPC classification number: G06F9/4401 ,  G06F17/5027 ,  G06F17/5054

Abstract: A method for accessing a signal value of an FPGA at runtime, including the steps of loading an FPGA hardware configuration into the FPGA, executing the FPGA hardware configuration in the FPGA, requesting a signal value of the FPGA, sending status data from a functional level of the FPGA to a configuration memory in its configuration level, reading the status data from the configuration memory as readback data, and determining the signal value of the readback data. A method is also provided for making an FPGA build, based on an FPGA model, using a hardware description language, including the steps of creating an FPGA hardware configuration, identifying memory locations of a configuration memory for status data of at least one signal value based on the FPGA hardware configuration, and creating a list with signal values accessible at runtime and the memory locations corresponding thereto.

Abstract translation: 一种在运行时访问FPGA的信号值的方法，包括将FPGA硬件配置加载到FPGA中的步骤，在FPGA中执行FPGA硬件配置，请求FPGA的信号值，从功能级别发送状态数据 的FPGA到其配置级的配置存储器，从配置存储器读取状态数据作为回读数据，并确定回读数据的信号值。 还提供了一种用于使用硬件描述语言来制作基于FPGA模型的FPGA构建的方法，所述方法包括以下步骤：创建FPGA硬件配置，识别用于基于至少一个基于信号值的状态数据的配置存储器的存储器位置 在FPGA硬件配置上，并创建一个列表，其中可以在运行时可访问的信号值和与之对应的存储单元。

公开(公告)号：US20140214783A1

公开(公告)日：2014-07-31

申请号：US14167019

申请日：2014-01-29

Applicant: dSPACE digital signal processing and control engineering GmbH

Inventor： Dirk STICHLING ,  Ansgar KUHLMANN ,  Andreas BOMERT ,  Daniel BECKE ,  Jobst RICHERT

IPC: G06F17/30

CPC classification number: G06F16/21 ,  G06Q10/06

Abstract: A computer-implemented method for data management of product variants in control unit development is provided. Consistent data management is ensured by initially specification of product features in a variant model, specification of components in at least one domain, and definition of feature/component dependencies by associating components with at least one product feature, and subsequently specification of at least one product variant of interest by selecting product features, specification of at least one domain of interest, automated identification of the components pertaining to the product variant of interest through automated evaluation of the feature/component dependencies, and automated output of the identified components.

Abstract translation: 提供了一种用于控制单元开发中的产品变体的数据管理的计算机实现方法。 通过初始规范变体模型中的产品特征，至少一个域中的组件的规范以及通过将组件与至少一个产品特征相关联以及随后指定至少一个产品来定义特征/组件依赖性来确保一致的数据管理 通过选择产品特征，至少一个感兴趣的领域的规范，通过自动评估特征/组件依赖性，自动识别与感兴趣的产品变体相关的组件以及所识别的组件的自动输出来感兴趣的变体。

公开(公告)号：US20140207994A1

公开(公告)日：2014-07-24

申请号：US14161064

申请日：2014-01-22

Applicant: dSPACE digital signal processing and control engineering GmbH

Inventor： Abdallah CHERKAOUI ,  Christian DIERKES ,  Lars KOPKA

IPC: G06F13/40

CPC classification number: G06F13/4022 ,  H04L12/40032 ,  H04L12/40169 ,  H04L12/42

Abstract: A circuit arrangement for connecting a bus participant to at least one bus, having an interface for connecting the bus participant to the circuit arrangement, a first bus input, and a first bus output between which the bus participant is switchable via the interface. The circuit arrangement includes a second bus input and output for connecting the bus to the circuit arrangement in a ring topology in such a way that the first bus output is connected at least indirectly to the second bus input and the second bus output is connected at least indirectly to the first bus input via the bus. The bus in the circuit arrangement can be separated to obtain a line topology and can be configured as bus-terminating at one of the bus inputs or bus outputs. A system for the functional testing of bus participants on a bus in a simulation environment is provided.

Abstract translation: 一种用于将总线参与者连接到至少一个总线的电路装置，具有用于将总线参与者连接到电路装置的接口，第一总线输入和第一总线输出，总线参与者可以经由接口切换。 该电路装置包括第二总线输入和输出，用于以总线输出端至少间接地连接至第二总线输入端，并且至少连接第二总线输出端，以将总线连接到环形拓扑中的电路装置 间接地通过总线输入第一个总线。 电路布置中的总线可以分离以获得线路拓扑，并可以配置为总线端接在总线输入或总线输出之一。 提供了一种用于模拟环境中总线上总线参与者功能测试的系统。

公开(公告)号：US20140055899A1

公开(公告)日：2014-02-27

申请号：US13974517

申请日：2013-08-23

Applicant: dSPACE digital signal processing and control engineering GmbH

Inventor： Paul GRUBER

IPC: H02H1/00

CPC classification number: H02H1/0007 ,  H02H3/08 ,  H02H9/025

Abstract: An electronic protection device for protecting at least one electrical load, connectable to the protection device, whereby the electronic protection device has an input terminal and an output terminal, and whereby the protection device includes a fuse element, which is thermally self-resetting, and whereby the fuse element is provided and set up to conduct or limit a first current as a function of a fuse element temperature, whereby a limiting component is provided to limit the first current, and whereby the limiting component has a first transistor that is connected in series to the fuse element and a monitoring circuit that influences the first transistor. The monitoring circuit blocks the first transistor when the first current reaches or exceeds a predefined maximum current value and unblocks it when the first current reaches or falls below a predefined reset current value.

Abstract translation: 一种电子保护装置，用于保护可连接到保护装置的至少一个电负载，由此电子保护装置具有输入端子和输出端子，并且由此保护装置包括热自复位保险丝元件，以及 由此提供熔丝元件并将其设置为导通或限制作为熔丝元件温度的函数的第一电流，由此提供限制部件以限制第一电流，并且由此限制部件具有连接在第一晶体管 串联到熔丝元件和影响第一晶体管的监控电路。 当第一电流达到或超过预定义的最大电流值时，监控电路阻止第一晶体管，并且当第一电流达到或低于预定义的复位电流值时，监控电路解除阻塞。

公开(公告)号：US08656762B2

公开(公告)日：2014-02-25

申请号：US13661871

申请日：2012-10-26

Applicant: dSpace digital signal processing and control engineering GmbH

Inventor： Wolfgang Hoetzel

IPC: G01M15/06

CPC classification number: G01D5/2492 ,  F02D41/0097

Abstract: A method for detecting a first rotation angle of a first shaft of an engine is provided, whereby a first marking carrier with sensor-readable markings is provided, whereby the markings form a first marking pattern that has marking sections having at least one first and a second marking section. The first marking carrier is scanned by a first sensor and a first sensor signal is generated. The first sensor signal is modulated by the markings on the marking carrier. A correlation between a time course of the first sensor signal and a time signal is made by a computing unit. A first marking section is recovered from the first sensor signal by the computing unit, and then, a first exclusion criterion for excluding the first stored marking section is determined from the recovered first marking section. The first stored marking section is then excluded by the first exclusion criteria.

Abstract translation: 提供一种用于检测发动机的第一轴的第一旋转角度的方法，由此提供具有传感器可读标记的第一标记载体，由此标记形成具有标记部分的第一标记图案，所述标记部分具有至少一个第一和第 第二标记部分。 第一标记载体被第一传感器扫描并产生第一传感器信号。 第一传感器信号由标记载体上的标记调制。 第一传感器信号的时间过程与时间信号之间的相关性由计算单元进行。 由计算单元从第一传感器信号中恢复第一标记部分，然后从恢复的第一标记部分确定用于排除第一存储的标记部分的第一排除标准。 第一个存储的标记部分然后被排除在第一个排除标准之外。

公开(公告)号：US12025753B2

公开(公告)日：2024-07-02

申请号：US17148066

申请日：2021-01-13

Applicant: dSPACE digital signal processing and control engineering GmbH

Inventor： Thomas Michalsky ,  Haitz Aguirre Urizar

IPC: G01S7/52 ,  G01S15/08

CPC classification number: G01S7/52004 ,  G01S15/08 ,  G01S2007/52007

Abstract: A test device for testing a distance sensor operating with ultrasonic waves, wherein the distance sensor to be tested comprises at least a sensor radiating element for emitting a transmission signal and a sensor receiving element for receiving a reflected signal. For effective and accurate testing and stimulation of the distance sensor, the test device has a test receiving element for receiving ultrasonic waves emitted from the distance sensor to be tested, and at least one test radiating element for radiating test ultrasonic waves, and a signal processing unit, wherein ultrasonic waves received by the test receiving element are transmitted as a received signal to the signal processing unit and the signal processing unit, as a function of the received signal and simulation distance information relating to a distance to be simulated, and determines an excitation signal for the test radiating element.

公开(公告)号：US11940556B2

公开(公告)日：2024-03-26

申请号：US17469921

申请日：2021-09-09

Applicant: dSPACE digital signal processing and control engineering GmbH

Inventor： Tim Fisch ,  Jeffrey Paul ,  Jonathan Watkins

IPC: G01S7/40 ,  G01S7/497 ,  G01S13/00

CPC classification number: G01S7/4095 ,  G01S7/497

Abstract: A testing device for testing a distance sensor includes: a receiver for receiving an electromagnetic free-space wave as a receive signal; an analog-to-digital converter configured to, in a simulation mode, convert the receive signal into a sampled signal; a signal-processing unit configured to: delay the sampled signal or a modulated sampled signal to form a delayed sampled signal or a modulated delayed sampled signal; and modulate, upon the sampled signal or upon the delayed sampled signal, a predeterminable Doppler signature as a characteristic motion profile of a reflecting object to be simulated to form the modulated sampled signal or the modulated delayed sample signal; a digital-to-analog converter configured to convert the modulated or the modulated delayed sampled signal into a simulated reflected signal; and a transmitter configured to radiate the simulated reflected signal or a simulated reflected signal derived from the simulated reflected signal as an output signal.

公开(公告)号：US11935253B2

公开(公告)日：2024-03-19

申请号：US17462037

申请日：2021-08-31

Applicant: dSPACE digital signal processing and control engineering GmbH

Inventor： Tim Raedsch

IPC: G06T7/38 ,  G06T7/70 ,  G06V20/40

CPC classification number: G06T7/38 ,  G06T7/70 ,  G06V20/49 ,  G06T2207/10016 ,  G06T2207/20084 ,  G06T2207/30242 ,  G06V2201/07

Abstract: A method for automatically splitting visual sensor data comprising consecutive images, the method being executed by at least one processor of a host computer, the method comprising: a) assigning a scene number to each image, wherein a scene comprises a plurality of images taken in a single environment, wherein assigning a scene number to each image is performed based on a comparison between consecutive images; b) determining an accumulated effort for the images in each scene, wherein the accumulated effort is determined based on the number of objects in the images of the scene, wherein the number of objects is determined using one or more neural networks for object detection; and c) creating packages of images, wherein the images with the same scene number are assigned to the same package unless the accumulated effort of the images in the package surpasses a package threshold.

公开(公告)号：US11846723B2

公开(公告)日：2023-12-19

申请号：US17095813

申请日：2020-11-12

Applicant: dSPACE digital signal processing and control engineering GmbH

Inventor： Tim Fisch ,  Albrecht Lohoefener ,  Jeffrey Paul

IPC: G01S7/40 ,  G01S7/497

CPC classification number: G01S7/4052 ,  G01S7/497 ,  G01S7/4082

Abstract: A method for calibrating a target simulator for an active environment detection system includes: calibrating a complete signal path comprising a first signal path and a second signal path by determining a first deviation of a first value of at least one signal parameter from a first reference value of the at least one signal parameter; calibrating one of the first signal path and the second signal path by determining a second deviation of a second value of the at least one signal parameter from a second reference value of the at least one signal parameter; and calibrating the other of the first signal path and the second signal path by offsetting of the first deviation with the second deviation.