公开(公告)号：US10447412B2

公开(公告)日：2019-10-15

申请号：US15577487

申请日：2016-04-15

Applicant: ARM LIMITED

Inventor： Paul Nicholas Whatmough ,  George Smart ,  Shidhartha Das ,  David Michael Bull

IPC: H04B7/24 ,  H04B13/00 ,  H04B1/3827

Abstract: A device comprises a coupling configured to couple signals to and from a communications path including at least a part of a human or animal body; a data transmitter coupled to the coupling and configured to transmit, from time to time, a data signal of at least a predetermined temporal duration via the communications path; and a data receiver coupled to the coupling and configured to detect the presence of a signal on the communications path at sets of one or more successive detection instances disposed between successive transmissions of the data signal by the data transmitter, the data receiver being configured so that the successive detection instances of a set are temporally separated by no more than the predetermined temporal duration; the device being configured to initiate a processing operation in response to a detection by the data receiver of the presence of a signal on the communications path.

公开(公告)号：US20190311243A1

公开(公告)日：2019-10-10

申请号：US15945952

申请日：2018-04-05

Applicant: Arm Limited

Inventor： Paul Nicholas Whatmough ,  Ian Rudolf Bratt ,  Matthew Mattina

IPC: G06N3/04 ,  G06N3/063

Abstract: A circuit and method are provided for performing convolutional neural network computations for a neural network. The circuit includes a transposing buffer configured to receive actuation feature vectors along a first dimension and to output feature component vectors along a second dimension, a weight buffer configured to store kernel weight vectors along a first dimension and further configured to output kernel component vectors along a second dimension, and a systolic array configured to receive the kernel weight vectors along a first dimension and to receive the feature component vectors along a second dimension. The systolic array includes an array of multiply and accumulate (MAC) processing cells. Each processing cell is associated with an output value. The actuation feature vectors may be shifted into the transposing buffer along the first dimension and output feature component vectors may shifted out of the transposing buffer along the second dimension, providing efficient dataflow.

公开(公告)号：US09933466B2

公开(公告)日：2018-04-03

申请号：US15172101

申请日：2016-06-02

Applicant: ARM Limited

Inventor： Paul Nicholas Whatmough ,  Shidhartha Das ,  David Michael Bull

IPC: G01R27/26 ,  G01R23/07 ,  G01R23/02 ,  G01R23/04 ,  G01R27/04 ,  G01R27/32

CPC classification number: G01R23/07 ,  G01R23/02 ,  G01R23/04 ,  G01R27/04 ,  G01R27/26 ,  G01R27/32

Abstract: An apparatus and method are provided for detecting a resonant frequency giving rise to an impedance peak in a power delivery network used to provide a supply voltage. The apparatus includes resonant frequency detection circuitry that comprises test frequency control circuitry and a loading circuit. The test frequency control circuitry is arranged to generate control signals to indicate a sequence of test frequencies. A loading circuit is controlled by the control signals and operates from the supply voltage. In particular, in response to each test frequency indicated by the control signals, the loading circuit draws a duty-cycled current load through the power delivery network at that test frequency. Operation of the loading circuit produces a measurable property whose value varies in dependence on the supply voltage, thus enabling the resonant frequency to be determined from a variation in the value of that measurable property.