公开(公告)号：US20230078233A1

公开(公告)日：2023-03-16

申请号：US17989081

申请日：2022-11-17

Applicant: ASM IP Holding B.V.

Inventor： Eric James Shero ,  Michael Eugene Givens ,  Qi Xie ,  Charles Dezelah ,  Giuseppe Alessio Verni

IPC: H01L21/02 ,  H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L27/092

Abstract: Methods and systems for depositing vanadium and/or indium layers onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a vanadium and/or indium layer onto the surface of the substrate. The cyclical deposition process can include providing a vanadium and/or indium precursor to the reaction chamber and separately providing a reactant to the reaction chamber. The cyclical deposition process may desirably be a thermal cyclical deposition process. Exemplary structures can include field effect transistor structures, such as gate all around structures. The vanadium and/or indium layers can be used, for example, as barrier layers or liners, as work function layers, as dipole shifter layers, or the like.

公开(公告)号：US20220165575A1

公开(公告)日：2022-05-26

申请号：US17529562

申请日：2021-11-18

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Giuseppe Alessio Verni ,  Tatiana Ivanova ,  Perttu Sippola ,  Michael Eugene Givens ,  Eric Shero ,  Jiyeon Kim ,  Charles Dezelah ,  Petro Deminskyi ,  Ren-Jie Chang

IPC: H01L21/28 ,  H01L21/02 ,  C23C16/52 ,  C23C16/455

Abstract: Methods and systems for depositing threshold voltage shifting layers onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a threshold voltage shifting layer onto a surface of the substrate.

公开(公告)号：US20220123131A1

公开(公告)日：2022-04-21

申请号：US17499970

申请日：2021-10-13

Applicant: ASM IP Holding B.V.

Inventor： Oreste Madia ,  Giuseppe Alessio Verni ,  Qi Xie ,  Michael Eugene Givens ,  Varun Sharma ,  Andrea Illiberi

IPC: H01L29/66 ,  H01L21/02

Abstract: Methods and systems for depositing threshold voltage shifting layers onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a threshold voltage shifting layer onto a surface of the substrate. The threshold voltage shifting layers are particularly useful for metal oxide semiconductor field effect transistors.

公开(公告)号：US20210391440A1

公开(公告)日：2021-12-16

申请号：US17411306

申请日：2021-08-25

Applicant: ASM IP Holding B.V.

Inventor： Chiyu Zhu ,  Kiran Shrestha ,  Petri Raisanen ,  Michael Eugene Givens

IPC: H01L29/51 ,  H01L21/02 ,  H01L21/28 ,  H01L29/66 ,  C23C16/455 ,  H01L29/49 ,  C23C16/34

Abstract: Methods for forming a semiconductor device structure are provided. The methods may include forming a molybdenum nitride film on a substrate by atomic layer deposition by contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor, contacting the substrate with a second vapor phase reactant comprise a nitrogen precursor, and contacting the substrate with a third vapor phase reactant comprising a reducing precursor. The methods provided may also include forming a gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV. Semiconductor device structures including molybdenum nitride films are also provided.

公开(公告)号：US11164955B2

公开(公告)日：2021-11-02

申请号：US16924595

申请日：2020-07-09

Applicant: ASM IP Holding B.V.

Inventor： Chiyu Zhu ,  Kiran Shrestha ,  Petri Raisanen ,  Michael Eugene Givens

IPC: H01L29/51 ,  H01L21/02 ,  H01L21/28 ,  H01L29/66 ,  C23C16/455 ,  H01L29/49 ,  C23C16/34

Abstract: Methods for forming a semiconductor device structure are provided. The methods may include forming a molybdenum nitride film on a substrate by atomic layer deposition by contacting the substrate with a first vapor phase reactant comprising a molybdenum precursor, contacting the substrate with a second vapor phase reactant comprise a nitrogen precursor, and contacting the substrate with a third vapor phase reactant comprising a reducing precursor. The methods provided may also include forming a gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV. Semiconductor device structures including molybdenum nitride films are also provided.

公开(公告)号：US11101370B2

公开(公告)日：2021-08-24

申请号：US16453249

申请日：2019-06-26

Applicant: ASM IP Holding B.V.

Inventor： Fu Tang ,  Qi Xie ,  Jan Willem Maes ,  Xiaoqiang Jiang ,  Michael Eugene Givens

IPC: H01L21/02 ,  H01L21/28 ,  H01L29/66

Abstract: A method for forming layers suitable for a V-NAND stack is disclosed. Specifically, the method may include multiple cycles for forming an oxide and a nitride in order to form an oxynitride layer.

公开(公告)号：US20210242011A1

公开(公告)日：2021-08-05

申请号：US17162279

申请日：2021-01-29

Applicant: ASM IP Holding B.V.

Inventor： Eric James Shero ,  Michael Eugene Givens ,  Qi Xie ,  Charles Dezelah ,  Giuseppe Alessio Verni

IPC: H01L21/02 ,  H01L29/423 ,  H01L27/092 ,  H01L29/06 ,  H01L29/66

Abstract: Methods and systems for depositing vanadium and/or indium layers onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a vanadium and/or indium layer onto the surface of the substrate. The cyclical deposition process can include providing a vanadium and/or indium precursor to the reaction chamber and separately providing a reactant to the reaction chamber. The cyclical deposition process may desirably be a thermal cyclical deposition process. Exemplary structures can include field effect transistor structures, such as gate all around structures. The vanadium and/or indium layers can be used, for example, as barrier layers or liners, as work function layers, as dipole shifter layers, or the like.

公开(公告)号：US10734497B2

公开(公告)日：2020-08-04

申请号：US16038024

申请日：2018-07-17

Applicant: ASM IP Holding B.V.

Inventor： Chiyu Zhu ,  Kiran Shrestha ,  Petri Raisanen ,  Michael Eugene Givens

IPC: H01L29/51 ,  H01L21/02 ,  H01L21/28 ,  H01L29/66 ,  C23C16/455 ,  H01L29/49 ,  C23C16/34

Abstract: Methods for forming a semiconductor device structure are provided. The methods may include forming a molybdenum nitride film on a substrate by atomic layer deposition by contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor, contacting the substrate with a second vapor phase reactant comprise a nitrogen precursor, and contacting the substrate with a third vapor phase reactant comprising a reducing precursor. The methods provided may also include forming a gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV. Semiconductor device structures including molybdenum nitride films are also provided.

公开(公告)号：US20200227325A1

公开(公告)日：2020-07-16

申请号：US16834657

申请日：2020-03-30

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Chiyu Zhu ,  Kiran Shrestha ,  Pauline Calka ,  Oreste Madia ,  Jan Willem Maes ,  Michael Eugene Givens

IPC: H01L21/8238 ,  H01L29/49 ,  H01L29/51 ,  H01L27/092

Abstract: A method for forming a semiconductor device structure is disclosure. The method may include, depositing an NMOS gate dielectric and a PMOS gate dielectric over a semiconductor substrate, depositing a first work function metal over the NMOS gate dielectric and over the PMOS gate dielectric, removing the first work function metal over the PMOS gate dielectric, and depositing a second work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. Semiconductor device structures including desired metal gate electrodes deposited by the methods of the disclosure are also disclosed.

公开(公告)号：US20190027573A1

公开(公告)日：2019-01-24

申请号：US16038024

申请日：2018-07-17

Applicant: ASM IP Holding B.V.

Inventor： Chiyu Zhu ,  Kiran Shrestha ,  Petri Raisanen ,  Michael Eugene Givens

IPC: H01L29/51 ,  H01L21/02

Abstract: Methods for forming a semiconductor device structure are provided. The methods may include forming a molybdenum nitride film on a substrate by atomic layer deposition by contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor, contacting the substrate with a second vapor phase reactant comprise a nitrogen precursor, and contacting the substrate with a third vapor phase reactant comprising a reducing precursor. The methods provided may also include forming a gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV. Semiconductor device structures including molybdenum nitride films are also provided.