公开(公告)号：US20090192713A1

公开(公告)日：2009-07-30

申请号：US12356430

申请日：2009-01-20

申请人： Sheng Fang ,  Gulamabbas Merchant ,  Eric Hart ,  Andrew D. Kirkwood ,  Tsili Wang

发明人： Sheng Fang ,  Gulamabbas Merchant ,  Eric Hart ,  Andrew D. Kirkwood ,  Tsili Wang

IPC分类号： G01V3/30 ,  G01V3/00

CPC分类号： G01V3/28 ,  E21B47/026

摘要： Cross-component measurements in combination with standard propagation resistivity measurements are processed to estimate the vertical and horizontal resistivities, relative dip and relative azimuth of an anisotropic earth formation.

摘要翻译： 处理与标准传播电阻率测量结合的横向分量测量，以估算各向异性地层的垂直和水平电阻率，相对倾角和相对方位角。

公开(公告)号：US20090179647A1

公开(公告)日：2009-07-16

申请号：US12350099

申请日：2009-01-07

申请人： Tsili Wang ,  John A. Signorelli ,  Sheng Fang ,  Roland E. Chemali

发明人： Tsili Wang ,  John A. Signorelli ,  Sheng Fang ,  Roland E. Chemali

IPC分类号： G01V3/28

CPC分类号： G01V3/28

摘要： The disclosure provides a resistivity tool for use in a wellbore, wherein at least two orthogonal antennas are located at the same or substantially the same location of the tool. A single set of vertically aligned grooves is provided for the at least two orthogonal antennas. Each antenna may be configured to operate as a transmitter or receiver. A tool with collocated antennas may be used to provide azimuthally sensitive measurements even if the tool is non-rotating.

摘要翻译： 本公开提供了一种用于井眼的电阻率工具，其中至少两个正交天线位于工具的相同或基本相同的位置。 为至少两个正交天线提供单组垂直排列的凹槽。 每个天线可以被配置为作为发射机或接收机工作。 即使工具不旋转，也可以使用具有并置天线的工具来提供方位灵敏度测量。

公开(公告)号：US20080234937A1

公开(公告)日：2008-09-25

申请号：US11689887

申请日：2007-03-22

申请人： Sheng Fang ,  Songhua Chen

发明人： Sheng Fang ,  Songhua Chen

IPC分类号： G01V3/38 ,  G01V3/14

CPC分类号： G01R33/5615 ,  G01N24/081 ,  G01R33/448 ,  G01V3/32

摘要： A method for determining fluid saturation in a formation at a plurality of radial depths near a wellbore, the method including: obtaining multi-frequency nuclear magnetic resonance (NMR) response data for the formation; and processing the data to determine simultaneously the fluid saturation at each radial depth. A computer program product is provided.

摘要翻译： 一种用于确定井眼附近的多个径向深度处的地层中的流体饱和度的方法，所述方法包括：获得用于地层的多频核磁共振（NMR）响应数据; 并处理数据以同时确定每个径向深度处的流体饱和度。 提供计算机程序产品。

公开(公告)号：US20060017443A1

公开(公告)日：2006-01-26

申请号：US11183139

申请日：2005-07-15

申请人： Martin Folberth ,  Sheng Fang ,  Tsili Wang

发明人： Martin Folberth ,  Sheng Fang ,  Tsili Wang

IPC分类号： G01V3/08

CPC分类号： G01V3/30

摘要： A resistivity logging tool suitable for downhole use includes a transmitter, two spaced apart receivers. The measured signals are inverted to determine the distance to a boundary in the earth formation in the presence of a transition zone in resistivity. The direction of drilling may be controlled based on the determined distance.

摘要翻译： 适用于井下使用的电阻率测井工具包括一个发射器，两个间隔开的接收器。 在存在电阻率过渡区时，测量的信号被反转以确定在地层中与边界的距离。 可以基于确定的距离来控制钻孔的方向。

公开(公告)号：US4692634A

公开(公告)日：1987-09-08

申请号：US856920

申请日：1986-04-28

申请人： Sheng Fang ,  Sam H. Lee

发明人： Sheng Fang ,  Sam H. Lee

IPC分类号： G11C19/28 ,  H03K3/289 ,  H03K3/3562 ,  H03K3/356 ,  G11C11/40

CPC分类号： H03K3/35625 ,  G11C19/28

摘要： A CMOS data register includes a master stage and a slave stage. The master stage is formed of first transfer gates and first storage devices. The slave stage is formed of second transfer gates, second storage devices and third transfer gates. The transfer gates and storage devices are formed of MOS transistors of one conductivity which decreases layout complexity and reduces the amount of chip area required. The data register is formed of a fewer number of transistor components, thereby reducing the loading on the clock signals.

摘要翻译： CMOS数据寄存器包括主级和从级。 主级由第一传输门和第一存储设备组成。 从站由第二传输门，第二存储设备和第三传输门形成。 传输门和存储设备由一种导电性的MOS晶体管形成，这降低了布局的复杂性并减少了所需的芯片面积。 数据寄存器由较少数量的晶体管元件组成，从而减少时钟信号的负载。

公开(公告)号：US4620117A

公开(公告)日：1986-10-28

申请号：US688781

申请日：1985-01-04

申请人： Sheng Fang

发明人： Sheng Fang

IPC分类号： H03K3/356 ,  H03K19/0948 ,  H03K19/096 ,  H03K19/21 ,  H03K19/094 ,  H03K19/017 ,  H03K19/20

CPC分类号： H03K19/215 ,  H03K19/0948 ,  H03K3/356104

摘要： A logic gate circuit composed of CMOS transistors includes at least a first pair of transistors formed of first and second transistors of one conductivity type having gate, source and drain electrodes. The logic gate circuit further includes at least a second pair of transistors formed of third and fourth transistors of the same conductivity as the first pair and having gate, source and drain electrodes. The source and drain electrodes of the first and second pairs are adapted to receive input signals. A pair of cross-coupled transistors formed of fifth and sixth transistors of a complementary electrodes are provided. The gate of the fifth transistor is connected to the drain of the sixth transistor, and the gate of the sixth transistor is connected to the drain of the fifth transistor. The drain of the fifth transistor is further connected to the drains of the first and second transistors and to a true output terminal. The drain of the sixth transistor is further connected to the drains of the third and fourth transistors and to a complement output terminal. All of the first through sixth transistors are arranged on an integrated circuit substrate with topological regularity.

摘要翻译： 由CMOS晶体管构成的逻辑门电路至少包括由具有栅极，源极和漏极的一种导电类型的第一和第二晶体管形成的第一对晶体管。 逻辑门电路还包括至少第二对晶体管，其由与第一对导电性相同的第三和第四晶体管形成，并具有栅极，源极和漏极。 第一和第二对的源极和漏极适于接收输入信号。 提供由互补电极的第五和第六晶体管形成的一对交叉耦合晶体管。 第五晶体管的栅极连接到第六晶体管的漏极，第六晶体管的栅极连接到第五晶体管的漏极。 第五晶体管的漏极还连接到第一和第二晶体管的漏极，并连接到真实的输出端子。 第六晶体管的漏极还连接到第三和第四晶体管的漏极以及补码输出端。 所有第一至第六晶体管都布置在具有拓扑规律性的集成电路基板上。

公开(公告)号：US4599707A

公开(公告)日：1986-07-08

申请号：US585319

申请日：1984-03-01

申请人： Sheng Fang

发明人： Sheng Fang

IPC分类号： G11C17/00 ,  G11C7/00 ,  G11C16/04 ,  G11C16/10 ,  G11C16/28 ,  G11C11/40

CPC分类号： G11C16/28 ,  G11C16/10

摘要： An array arrangement for EEPROMS in which each memory cell has two transistors. Selection is simplified whereby in selecting a cell all of the cells in the selected row are connected to one terminal of the writing circuit and all the cells in the selected column are connected to the other terminal. This selection process prevents any cell from being written into except the cell at the intersection of the selected row and the selected column.

摘要翻译： 用于EEPROMS的阵列布置，其中每个存储单元具有两个晶体管。 简化了选择，在选择单元格时，所选行中的所有单元都连接到写入电路的一个端子，并且所选列中的所有单元都连接到另一个端子。 该选择过程可以防止任何单元格被写入除了所选行和所选列的交点之外的单元格。