Sub-diffraction limit image resolution and other imaging techniques
    51.
    发明申请
    Sub-diffraction limit image resolution and other imaging techniques 有权
    次衍射极限图像分辨率等成像技术

    公开(公告)号:US20080182336A1

    公开(公告)日:2008-07-31

    申请号:US12012524

    申请日:2008-02-01

    Abstract: The present invention generally relates to sub-diffraction limit image resolution and other imaging techniques. In one aspect, the invention is directed to determining and/or imaging light from two or more entities separated by a distance less than the diffraction limit of the incident light. For example, the entities may be separated by a distance of less than about 1000 nm, or less than about 300 nm for visible light. In one set of embodiments, the entities may be selectively activatable, i.e., one entity can be activated to produce light, without activating other entities. A first entity may be activated and determined (e.g., by determining light emitted by the entity), then a second entity may be activated and determined. The entities may be immobilized relative to each other and/or to a common entity. The emitted light may be used to determine the positions of the first and second entities, for example, using Gaussian fitting or other mathematical techniques, and in some cases, with sub-diffraction limit resolution. The methods may thus be used, for example, to determine the locations of two or more entities immobilized relative to a common entity, for example, a surface, or a biological entity such as DNA, a protein, a cell, a tissue, etc. The entities may also be determined with respect to time, for example, to determine a time-varying reaction. Other aspects of the invention relate to systems for sub-diffraction limit image resolution, computer programs and techniques for sub-diffraction limit image resolution, methods for promoting sub-diffraction limit image resolution, methods for producing photoswitchable entities, and the like.

    Abstract translation: 本发明一般涉及副衍射极限图像分辨率和其它成像技术。 在一个方面,本发明涉及确定和/或成像来自两个或多个实体的光,所述物体被隔开的距离小于入射光的衍射极限。 例如,对于可见光,实体可以分开小于约1000nm或小于约300nm的距离。 在一组实施例中,实体可以是可选择性地激活的,即,一个实体可以被激活以产生光,而不激活其他实体。 可以激活和确定第一实体(例如,通过确定由实体发射的光),则可以激活和确定第二实体。 实体可以相对于彼此和/或共同实体被固定。 发射的光可以用于确定第一和第二实体的位置,例如,使用高斯拟合或其他数学技术,并且在一些情况下,具有次衍射极限分辨率。 因此,可以使用这些方法,例如确定相对于共同实体(例如表面)或生物实体(例如DNA,蛋白质,细胞,组织等)固定的两个或多个实体的位置。 实体也可以相对于时间来确定,例如确定时变反应。 本发明的其他方面涉及用于副衍射极限图像分辨率的系统,用于副衍射极限图像分辨率的计算机程序和技术,用于促进副衍射极限图像分辨率的方法,用于产生可照片开关实体的方法等。

    Methods and apparatus for merging critical sections
    52.
    发明授权
    Methods and apparatus for merging critical sections 有权
    合并关键部分的方法和装置

    公开(公告)号:US07392513B2

    公开(公告)日:2008-06-24

    申请号:US10804735

    申请日:2004-03-19

    CPC classification number: G06F8/443

    Abstract: Methods and apparatus for merging critical sections are disclosed. An example disclosed system estimates the cost of merging a first critical section and a second critical section using a dataflow analysis on the first and second critical sections. In the example system, the first critical section and the second critical section are merged based on a least expensive cost of merging critical sections.

    Abstract translation: 公开了合并关键部分的方法和装置。 公开的一个示例系统使用第一和第二关键部分上的数据流分析来估计合并第一关键部分和第二关键部分的成本。 在示例系统中,第一关键部分和第二关键部分基于合并关键部分的最低成本来合并。

    Methods and apparatus to implement annotation based thunking
    53.
    发明申请
    Methods and apparatus to implement annotation based thunking 失效
    实施基于注解的方法和装置

    公开(公告)号:US20070234286A1

    公开(公告)日:2007-10-04

    申请号:US11440850

    申请日:2006-05-25

    CPC classification number: G06F9/455

    Abstract: Methods and apparatus to implement annotation based thunking are disclosed. An example method comprises locating a parameter of a function, the parameter to be passed as a pointer if a size of the parameter is greater than a threshold and to be passed as data if the size of the parameter is not greater than the threshold, and adding an annotation record for the parameter to a byte code image file containing byte code for the function.

    Abstract translation: 披露了实现基于注解的拆分的方法和装置。 一种示例性方法包括:如果参数的大小大于阈值,则定位要作为指针传递的参数的参数,并且如果参数的大小不大于阈值则作为数据传递;以及 将该参数的注释记录添加到包含该函数的字节码的字节码图像文件中。

    Simulate usercalling's test system and method which built-in digital spc-exchange
    54.
    发明申请
    Simulate usercalling's test system and method which built-in digital spc-exchange 有权
    模拟用户呼叫的测试系统和内置数字交换的方法

    公开(公告)号:US20070116188A1

    公开(公告)日:2007-05-24

    申请号:US10581326

    申请日:2004-06-22

    CPC classification number: H04M3/241

    Abstract: The present invention disclosed a kind of simulate user calling's test system and method which built-in digital SPC exchange, include background processing module, foreground calling control processing module and hardware subsystem, therein: background processing module operation on exchange servicing platform, for supply user setting parameter and display operate interface for test result, foreground calling control processing module is include in the exchange main control module, for control said hardware subsystem execute test process according to designed logical flow and user mount parameter, hardware subsystem composed of loop circuit relay single board, simulation user interface board, interface board control processing unit, multifunction resources process board. Adopt present invention may use few cost to reach the test result which equal to commercial calling device, and may reach more mobility, reach inline test function.

    Abstract translation: 本发明公开了一种模拟用户呼叫的内置数字SPC交换的测试系统和方法,包括后台处理模块,前台呼叫控制处理模块和硬件子系统:交换服务平台的后台处理模块操作,供应用户 设置参数和显示操作界面进行测试结果,前台调用控制处理模块包括在交换主控模块中,用于控制所述硬件子系统根据设计的逻辑流程和用户挂载参数执行测试过程,由循环电路继电器单元 板,模拟用户接口板,接口板控制处理单元,多功能资源处理板。 采用本发明可以使用少量成本来达到等于商业呼叫装置的测试结果,并且可以达到更多的移动性,达到在线测试功能。

    Tracking format of registers having multiple content formats in binary translation
    55.
    发明授权
    Tracking format of registers having multiple content formats in binary translation 有权
    在二进制翻译中具有多种内容格式的寄存器的跟踪格式

    公开(公告)号:US07219336B2

    公开(公告)日:2007-05-15

    申请号:US10037655

    申请日:2002-01-03

    CPC classification number: G06F8/52

    Abstract: In one embodiment of the invention, a register format of a source register operated on by a source instruction in a source block of code is determined. The register format includes an input instruction format and an output block format of the source block of code. The source block of code runs in a source architecture. The source register has multiple formats and is used as an input of the source instruction. The input instruction format contains format of the source register expected by the source instruction. The output block format contains format of the source register after the source block of code is executed. An instruction format inconsistency is detected between the source register and a target register of a target architecture during a translation phase of a binary translation that translates the source block of code into a target block of code running in the target architecture.

    Abstract translation: 在本发明的一个实施例中,确定由源代码块中的源指令操作的源寄存器的寄存器格式。 寄存器格式包括源代码块的输入指令格式和输出块格式。 源代码块在源架构中运行。 源寄存器有多种格式,用作源指令的输入。 输入指令格式包含源指令预期的源寄存器的格式。 在执行源代码块之后,输出块格式包含源寄存器的格式。 在二进制转换的转换阶段期间,在源寄存器和目标架构的目标寄存器之间检测到指令格式不一致,其将源代码块转换为在目标架构中运行的目标代码块。

    Method and system for allocating register locations in a memory during compilation
    56.
    发明授权
    Method and system for allocating register locations in a memory during compilation 有权
    在编译期间在存储器中分配寄存器位置的方法和系统

    公开(公告)号:US07124271B2

    公开(公告)日:2006-10-17

    申请号:US10684770

    申请日:2003-10-14

    CPC classification number: G06F8/441

    Abstract: A compiler includes a location-assigning module to optimally allocate register locations in various memory blocks of a memory during compilation of a program code in accordance with code proximity of the program code in accessing the register locations and size of each of the memory blocks.

    Abstract translation: 编译器包括位置分配模块,用于根据在访问每个存储器块的寄存器位置和大小时程序代码的接近程序在编程程序代码期间最佳地分配存储器的各种存储器块中的寄存器位置。

    Compiler with two phase bi-directional scheduling framework for pipelined processors
    57.
    发明申请
    Compiler with two phase bi-directional scheduling framework for pipelined processors 审中-公开
    用于流水线处理器的具有两相双向调度框架的编译器

    公开(公告)号:US20050125786A1

    公开(公告)日:2005-06-09

    申请号:US10731946

    申请日:2003-12-09

    CPC classification number: G06F8/4451

    Abstract: A method of scheduling a sequence of instructions is described. A target program is read, a pipeline control hazard is identified within the sequence of instructions, and a selected sequence of instructions is re-ordered. Two steps for re-ordering are applied to the selected sequence of instructions. First, a backward scheduling method is performed, and second, a forward scheduling method is performed.

    Abstract translation: 描述了一种调度指令序列的方法。 读取目标程序,在指令序列内识别流水线控制危险,并且重新排序选定的指令序列。 重新排序的两个步骤被应用于所选择的指令序列。 首先,执行反向调度方法,其次,执行前向调度方法。

Patent Agency Ranking