公开(公告)号：US07525467B2

公开(公告)日：2009-04-28

申请号：US12031736

申请日：2008-02-15

申请人： Wei-Cheng Lin ,  Kai-Chieh Yang ,  Keiichi Sano ,  Fang-Hsing Wang ,  Ting-Yu Chang

发明人： Wei-Cheng Lin ,  Kai-Chieh Yang ,  Keiichi Sano ,  Fang-Hsing Wang ,  Ting-Yu Chang

IPC分类号： H03M1/66

CPC分类号： H03M1/804

摘要： A digital to analog converter is provided comprising a charge sharing circuit, a discharging circuit and a voltage boosting circuit. The charge sharing circuit sequentially receives first to (N−1)th bits of serial digital signals. The charge sharing circuit shares and stores charges between a first capacitor and a second capacitor according to a charging voltage, a ground voltage, a first clock signal and serial data signals. The discharging circuit discharges the charge sharing circuit according to a reset signal. After the voltage boosting circuit receive the (N−1)th digital signal, the charge boosting circuit whether to boost a first terminal and a second terminal of the second capacitor or not based on an Nth digital signal. After the voltage boosting circuit receives the Nth serial digital signal, the charge sharing circuit outputs an analog signal from the second terminal of the second capacitor.

摘要翻译： 提供了一种数模转换器，包括电荷共享电路，放电电路和升压电路。 电荷共享电路顺序地接收串行数字信号的第一到第（N-1）位。 电荷共享电路根据充电电压，接地电压，第一时钟信号和串行数据信号共享和存储第一电容器和第二电容器之间的电荷。 放电电路根据复位信号对电荷共享电路进行放电。 在升压电路接收到第（N-1）个数字信号之后，充电提升电路是否基于第N个数字信号升压第二电容器的第一端子和第二端子。 在升压电路接收到第N串行数字信号之后，电荷共享电路从第二电容器的第二端子输出模拟信号。

公开(公告)号：US20080253584A1

公开(公告)日：2008-10-16

申请号：US12018246

申请日：2008-01-23

申请人： Wei-Cheng Lin

发明人： Wei-Cheng Lin

IPC分类号： H03G3/00

CPC分类号： H03F3/217 ,  H03F3/185 ,  H03F3/3022 ,  H03F2200/03 ,  H03F2200/114 ,  H03F2200/252

摘要： An audio playing system is provided comprising a first processing module, a second processing module, a control module, an output module, and a displaying module. The first and second processing modules amplify an audio signal and respectively generates a first first processed signal, a first second processed signal, a second first processed signal, and a second second processed signal. The control module is coupled to the first processing module and the second processing module and generates a playing signal according to a control signal, the first first processed signal, the first second processed signal, the second first processed signal, and the second second processed signal. The output module is coupled to the control module and amplifies the playing signal to generate an output signal. The displaying module is coupled to the output module and plays the output signal.

摘要翻译： 提供一种音频播放系统，包括第一处理模块，第二处理模块，控制模块，输出模块和显示模块。 第一和第二处理模块放大音频信号并分别产生第一第一处理信号，第一第二处理信号，第二第一处理信号和第二第二处理信号。 控制模块耦合到第一处理模块和第二处理模块，并根据控制信号，第一第一处理信号，第一第二处理信号，第二第一处理信号和第二第二处理信号产生播放信号 。 输出模块耦合到控制模块并放大播放信号以产生输出信号。 显示模块耦合到输出模块并播放输出信号。

公开(公告)号：US20080150703A1

公开(公告)日：2008-06-26

申请号：US12000117

申请日：2007-12-10

申请人： Wei-Cheng Lin

发明人： Wei-Cheng Lin

IPC分类号： G08B9/00

CPC分类号： G08C17/00 ,  G08C2201/41

摘要： A collaborative wireless micro-control system applied to a detached space comprises a main control unit, and a plurality of interior control unit. Wherein, the main control unit has a microprocessor, a transmitter, and a receiver. The receiver receives the outside wireless signal from the electronic apparatus. The microprocessor parses the outside wireless signal and sends out a wireless control signal inside the detached space by using the transmitter. Each of the interior control units has a microprocessor, a transmitter, and a receiver. The control unit is utilized as a user interface (human machine interface) for controlling a respective electronic apparatus. The receiver of the interior control unit receives the wireless control signal from the main control unit. The microprocessor of the interior control unit tells whether the wireless control signal can trigger the respective electronic apparatus or not. If so, the interior control unit adjusts the respective electronic apparatus according to the wireless control signal. If not, the transmitter of the interior control unit passes the wireless control signal to another interior control unit.

摘要翻译： 应用于分离空间的协同无线微控制系统包括主控制单元和多个内部控制单元。 其中，主控制单元具有微处理器，发射器和接收器。 接收机从电子设备接收外部无线信号。 微处理器解析外部无线信号，并通过使用发射器发出分离空间内的无线控制信号。 每个内部控制单元具有微处理器，发射器和接收器。 控制单元用作用于控制相应的电子设备的用户界面（人机界面）。 内部控制单元的接收器从主控制单元接收无线控制信号。 内部控制单元的微处理器告知无线控制信号是否可以触发相应的电子设备。 如果是，则内部控制单元根据无线控制信号调整各个电子设备。 如果不是，则内部控制单元的发射器将无线控制信号传递到另一个内部控制单元。

公开(公告)号：US07310402B2

公开(公告)日：2007-12-18

申请号：US11302853

申请日：2005-12-13

申请人： Chun-Ching Wei ,  Yang-En Wu ,  Wei-Cheng Lin

发明人： Chun-Ching Wei ,  Yang-En Wu ,  Wei-Cheng Lin

IPC分类号： H03K5/22

CPC分类号： G11C19/28

摘要： A shift register in an amorphous-silicon gate driver comprises a pull-up transistor and two pull-down modules. The pull-up transistor produces a positive pulse when the clock signal is high and the gate of the pull-up transistor is also high. The gate of the pull-up transistor is pulled down to a negative voltage level Vss by two pull-down transistors in the pull-down modules. Each pull-down module also has a further pull-down transistor to keep the output terminal at Vss after the output pulse is produced. The two pull-down modules are operated in a cooperative manner so that each pull-down transistor is conducting approximately 50% of the time. The gates of the pull-down transistors are kept at a positive voltage level approximately 50% of the time and at Vss′ approximately 50% of the time with Vss′ being more negative than Vss.

摘要翻译： 非晶硅栅极驱动器中的移位寄存器包括上拉晶体管和两个下拉模块。 当时钟信号为高电平且上拉晶体管的栅极也为高电平时，上拉晶体管产生正脉冲。 通过下拉模块中的两个下拉晶体管将上拉晶体管的栅极下拉到负电压电平Vss。 每个下拉模块还具有另一个下拉晶体管，用于在输出脉冲产生后将输出端子保持在Vss。 两个下拉模块以协作的方式操作，使得每个下拉晶体管大约传输50％的时间。 下拉晶体管的栅极保持在大约50％的时间的正电压水平，并且在Vss'的Vss'处保持Vss'比Vss更负的时间的大约50％。

公开(公告)号：US20070164971A1

公开(公告)日：2007-07-19

申请号：US11382717

申请日：2006-05-11

申请人： Lee-Hsun Chang ,  Yu-Wen Lin ,  Chun-Ching Wei ,  Wei-Cheng Lin

发明人： Lee-Hsun Chang ,  Yu-Wen Lin ,  Chun-Ching Wei ,  Wei-Cheng Lin

IPC分类号： G09G3/36

CPC分类号： G09G3/3674 ,  G09G2300/0408 ,  G11C19/28 ,  H03K23/54

摘要： A shift register includes a signal generating circuit for generating an output signal at an output end of the shift register according to a first clock signal while the signal generating circuit is turned on; a driving circuit, electrically coupled to the signal generating circuit, for generating a driving signal to control the signal generating circuit according to an input signal received from an input end of the shift register; a feedback circuit, electrically coupled to a next stage shift register, for transmitting a control signal while the feedback circuit is turned on by the next stage shift register; and a control switch, electrically coupled to the signal generating circuit and the feedback circuit, for turning off the signal generating circuit while the control switch is turned on by the control signal from the feedback circuit.

摘要翻译： 移位寄存器包括：信号发生电路，用于在信号产生电路导通时根据第一时钟信号在移位寄存器的输出端产生输出信号; 电耦合到信号发生电路的驱动电路，用于根据从移位寄存器的输入端接收的输入信号产生驱动信号以控制信号发生电路; 电耦合到下一级移位寄存器的反馈电路，用于在反馈电路被下一级移位寄存器导通的同时发送控制信号; 以及电耦合到信号发生电路和反馈电路的控制开关，用于在通过来自反馈电路的控制信号接通控制开关时关闭信号发生电路。

公开(公告)号：US20060251273A1

公开(公告)日：2006-11-09

申请号：US11107835

申请日：2005-04-18

申请人： Wei-Cheng Lin ,  Yi-Fan Shih ,  Ryan Lee ,  Carl Chang

发明人： Wei-Cheng Lin ,  Yi-Fan Shih ,  Ryan Lee ,  Carl Chang

IPC分类号： H03G7/00

CPC分类号： H03G1/0088

摘要： A noise reduction circuit for reducing pulse noise caused at switching of an analog audio processing circuit comprises a voltage division resistor circuit, an end of the voltage division resistor circuit being electrically connected to an output end of a switching circuit of the analog audio processing circuit, and another end of the voltage division resistor circuit being electrically connected to a reference voltage; a plurality of voltage-division points of the voltage division resistor circuit are connected respectively with a plurality of controllable switches, while other ends of the plurality of controllable switches are connected together to form an output end.

公开(公告)号：US20060163490A1

公开(公告)日：2006-07-27

申请号：US11334429

申请日：2006-01-19

申请人： Daniel Tang ,  Jiong Chen ,  Wei-Cheng Lin

发明人： Daniel Tang ,  Jiong Chen ,  Wei-Cheng Lin

IPC分类号： H01J37/20

CPC分类号： H01L21/67109 ,  H01J2237/2001 ,  H01J2237/31701

摘要： An ion implantation cooling system at least comprises a semiconductor substrate utilized as the ion implantation substrate, a Pelier thermoelectric pump connected with the semiconductor substrate for heat irradiation during the ion implantation, and a heatsink connected to the Pelier thermoelectric pump for heat irradiation from a hot Pelier surface during the ion implantation. The cooling system is to employ the Pelier thermoelectric pump enabling the semiconductor substrate and the semiconductor substrate surface being at a temperature lower than that of the heatsink, so the object of proceeding ion implanting at a lower temperature can be achieved thereby.

摘要翻译： 离子注入冷却系统至少包括用作离子注入衬底的半导体衬底，与离子注入期间的用于热照射的半导体衬底连接的Pelier热电泵，以及连接到Pelier热电泵的散热器，用于从热 离子注入过程中的Pelier表面。 冷却系统采用Pelier热电泵，使得半导体衬底和半导体衬底表面的温度低于散热片的温度，因此可以实现在较低温度下进行离子注入的目的。

公开(公告)号：US06784735B2

公开(公告)日：2004-08-31

申请号：US10414092

申请日：2003-04-16

申请人： Wei-Cheng Lin

发明人： Wei-Cheng Lin

IPC分类号： H03F345

CPC分类号： H03F3/45179 ,  H03F3/45183 ,  H03F2203/45626

摘要： A high switching speed differential amplifier comprises a differential pair, a first and a second active loads, and a current source, in which the differential pair is composed of a pair of MOS transistors to receive a pair of differential signals from a first and a second inputs. The first active load is connected to an output of the first MOS transistor and includes a first and a second paths switched therebetween in response to the first input. The second active load is connected to an output of the second MOS transistor and includes a third and a fourth paths in response to the second input.

摘要翻译： 高开关速度差分放大器包括差分对，第一和第二有源负载以及电流源，其中差分对由一对MOS晶体管组成，以从第一和第二端接收一对差分信号 输入。 第一有效负载连接到第一MOS晶体管的输出，并且包括响应于第一输入而在其间切换的第一和第二路径。 第二有源负载连接到第二MOS晶体管的输出，并且响应于第二输入而包括第三和第四路径。

公开(公告)号：US20190326232A1

公开(公告)日：2019-10-24

申请号：US15959301

申请日：2018-04-23

申请人： Wei-Cheng Lin ,  Shih-Hsiu Tseng ,  Chien-Jen Hsiao

发明人： Wei-Cheng Lin ,  Shih-Hsiu Tseng ,  Chien-Jen Hsiao

IPC分类号： H01L23/66 ,  G01S13/93 ,  H01Q23/00 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L25/16

摘要： A receiver and transmitter chips packaging structure and an automotive radar detector device using same are disclosed. The receiver/transmitter chips packaging structure includes a redistribution layer, a chip set and a molded encapsulation layer. The chip set includes a receiver chip, a transmitter chip and a radio-frequency (RF) processing chip arranged on one side of redistribution layer. The molded encapsulation layer covers the side of the redistribution layer having the receiver, transmitter and RF processing chips arranged thereon and accordingly, enclosed the chip set therein. And, the RF processing chip is electrically connected to the receiver chip and the transmitter chip via a plurality of conductive lines embedded in the redistribution layer.

公开(公告)号：US08707576B2

公开(公告)日：2014-04-29

申请号：US13348643

申请日：2012-01-12

申请人： Wei-Cheng Lin

发明人： Wei-Cheng Lin

IPC分类号： F26B19/00

CPC分类号： A47L15/243 ,  A47L15/30 ,  A47L15/4242 ,  A47L15/486 ,  A47L15/488 ,  F26B15/04

摘要： A tableware sterilizing and drying apparatus of the present invention includes a rotatable base plate, several frames, and a fixation wheel. The frames have rotatable members, which are revolved by rotation of the base plate, and rotated by engagement or contaction of the fixation wheel. Thus, the rotatable member is provided for tableware to be placed thereon. The tableware is then brought drying and sterilizing with flipping motion. Surface of the tableware can be fully dried and sterilized.

摘要翻译： 本发明的餐具消毒干燥装置包括可转动的基板，多个框架和固定轮。 这些框架具有旋转构件，其通过基板的旋转而旋转，并且通过定影轮的接合或接合而旋转。 因此，可旋转构件被提供用于放置在其上的餐具。 然后将餐具用翻转运动进行干燥和灭菌。 餐具表面可以完全干燥和灭菌。