公开(公告)号：US20110175946A1

公开(公告)日：2011-07-21

申请号：US13064445

申请日：2011-03-25

申请人： Ming-Chin Chang ,  Yang-En Wu ,  Po-Lun Chen

发明人： Ming-Chin Chang ,  Yang-En Wu ,  Po-Lun Chen

IPC分类号： G09G3/36 ,  G09G5/10 ,  H05K13/00

CPC分类号： G09G3/3406 ,  G09G2330/021 ,  G09G2360/144 ,  Y10T29/49002

摘要： A transflective liquid crystal display device. A first substrate having viewing and peripheral areas is provided. The viewing area comprises transmissive and reflective regions. A backlight device is disposed under the first substrate, used to provide a backlight passing through the transmissive region. A power management controller connects the backlight device to control an intensity of the backlight. At least one photodetector is formed on the first substrate in the peripheral area, wherein the photodetector detects an intensity of ambient light above the first substrate, and then provides a corresponding signal to the power management controller to control the intensity of the backlight. According to the invention, the intensity of the backlight automatically becomes greater when the intensity of the ambient light becomes lower, and the intensity of the backlight automatically becomes lower when the intensity of the ambient light becomes greater.

摘要翻译： 半透射液晶显示装置。 提供具有观察周边区域的第一基板。 观察区域包括透射和反射区域。 背光装置设置在第一基板下方，用于提供通过透射区域的背光。 电源管理控制器连接背光装置以控制背光的强度。 至少一个光电检测器形成在周边区域中的第一基板上，其中光电检测器检测第一基板上方的环境光的强度，然后向功率管理控制器提供相应的信号以控制背光的强度。 根据本发明，当环境光的强度变低时背光的强度自动变大，并且当环境光的强度变大时背光的强度自动变低。

公开(公告)号：US07705840B2

公开(公告)日：2010-04-27

申请号：US11456596

申请日：2006-07-11

申请人： Chun-Ching Wei ,  Hung-Hsiao Lin ,  Kun-Hong Chen ,  Yang-En Wu

发明人： Chun-Ching Wei ,  Hung-Hsiao Lin ,  Kun-Hong Chen ,  Yang-En Wu

IPC分类号： G06F3/038

CPC分类号： G09G3/3659 ,  G09G2300/0804 ,  G09G2300/0814

摘要： Display panels capable of eliminating reliability issues due to high switching frequency. The display panel comprises a data driver outputting first, second, third and fourth data signals in sequence through a data line, a scan driver outputting first and second scan signals in sequence through first and second scan lines and an auxiliary driver generates first and second auxiliary signals in sequence, and first and second display cells commonly receives the first scan signal through the first scan line and receives the first and the second data signal through the data line, and a first switch is coupled to the data line and the second display cell, turning on and off in sequence according to the first auxiliary signal when the first scan signal is applied thereto such that the second and the first display cells receive the first and the second data signals in sequence.

摘要翻译： 显示面板能够消除由于高开关频率引起的可靠性问题。 显示面板包括通过数据线依次输出第一，第二，第三和第四数据信号的数据驱动器，扫描驱动器依次通过第一和第二扫描线输出第一和第二扫描信号，辅助驱动器产生第一和第二辅助 信号，第一和第二显示单元通常通过第一扫描线接收第一扫描信号，并通过数据线接收第一和第二数据信号，第一开关耦合到数据线和第二显示单元 ，当施加第一扫描信号时，根据第一辅助信号依次接通和断开，使得第二和第一显示单元依次接收第一和第二数据信号。

公开(公告)号：US07636077B2

公开(公告)日：2009-12-22

申请号：US11302917

申请日：2005-12-13

申请人： Chun-Ching Wei ,  Yang-En Wu ,  Wei-Cheng Lin

发明人： Chun-Ching Wei ,  Yang-En Wu ,  Wei-Cheng Lin

IPC分类号： G09G3/36

CPC分类号： G02F1/1345 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2330/08 ,  G11C19/287 ,  H01L23/49838 ,  H01L2924/0002 ,  H01L2924/00

摘要： A backup shift register module having at least two backup shift registers is used to repair a defective main shift-register module. A normally open link is provided between the input of first backup shift register and the input of each odd-numbered main shift register, and between the output of first backup shift register and the input of each even-numbered main shift register. A normally open link is provided between the input of second backup shift register and the input of each even-numbered main shift register, and between the output of second backup shift register and the input of each odd-numbered main shift register. If one main shift register is defective, the input and output of the defective shift register are disconnected from the cascade link, and the normally open links are connected to the input of the defective shift register and the output of the next shift register are connected.

摘要翻译： 具有至少两个备用移位寄存器的备用移位寄存器模块用于修复有缺陷的主移位寄存器模块。 在第一备用移位寄存器的输入和每个奇数主移位寄存器的输入之间以及第一备用移位寄存器的输出和每个偶数主移位寄存器的输入之间提供常开链路。 在第二备用移位寄存器的输入和每个偶数主移位寄存器的输入之间以及第二备用移位寄存器的输出和每个奇数主移位寄存器的输入之间提供常开链路。 如果一个主移位寄存器有故障，则有缺陷移位寄存器的输入和输出与级联链路断开，而常开链路连接到有缺陷的移位寄存器的输入端，下一个移位寄存器的输出端连接。

公开(公告)号：US07450681B2

公开(公告)日：2008-11-11

申请号：US11456561

申请日：2006-07-10

申请人： Chun-Ching Wei ,  Wei-Cheng Lin ,  Shih-Hsun Lo ,  Yang-En Wu

发明人： Chun-Ching Wei ,  Wei-Cheng Lin ,  Shih-Hsun Lo ,  Yang-En Wu

IPC分类号： H03K5/22

CPC分类号： G11C19/00 ,  G09G3/3677

摘要： A shift register includes a signal generating circuit for generating an output signal at an output end of the shift register in response to a clock signal while the signal generating circuit is turned on, a driving circuit electrically coupled to the signal generating circuit for controlling the signal generating circuit in response to an input signal received from an input end of the shift register, a primary reset circuit electrically coupled to the signal generating circuit for turning off the signal generating circuit and resetting the output signal from the output end, and a feedback circuit electrically coupled to the output end and the major reset circuit for controlling the primary reset circuit in response to the output signal and the clock signal.

摘要翻译： 移位寄存器包括：信号发生电路，用于在信号产生电路导通时响应于时钟信号在移位寄存器的输出端产生输出信号;驱动电路，电耦合到信号发生电路，用于控制信号 响应于从所述移位寄存器的输入端接收到的输入信号产生电路;电耦合到所述信号发生电路的主复位电路，用于关闭所述信号发生电路并且从所述输出端复位所述输出信号;以及反馈电路 电耦合到输出端和主复位电路，用于响应于输出信号和时钟信号控制主复位电路。

公开(公告)号：US07317780B2

公开(公告)日：2008-01-08

申请号：US11362213

申请日：2006-02-24

申请人： Wei-Cheng Lin ,  Chun-Ching Wei ,  Yang-En Wu ,  Cheng-Liang Ma

发明人： Wei-Cheng Lin ,  Chun-Ching Wei ,  Yang-En Wu ,  Cheng-Liang Ma

IPC分类号： G11K19/00 ,  H03K19/00

CPC分类号： G11C19/28 ,  G09G3/3648 ,  G09G2310/0286 ,  G09G2320/0219

摘要： A shift registers circuit having a series of cascading shift registers comprises a first transistor coupling to an output signal of a pre-stage shift register, a second transistor coupling to the first transistor, an output and a first clock signal, and a pull-down module coupling to the output, output signals of pre-stage and post-stage shift register, a second and a third voltage level. When the second transistor turns on and the first clock signal is at high voltage level, the output is at a first voltage level. When the signal of post-stage shift register is at first voltage level, the output is at the third voltage level.

摘要翻译： 具有一系列级联移位寄存器的移位寄存器电路包括耦合到前级移位寄存器的输出信号的第一晶体管，耦合到第一晶体管的第二晶体管，输出和第一时钟信号以及下拉 模块耦合到输出，前级和后级移位寄存器的输出信号，第二和第三电压电平。 当第二晶体管导通并且第一时钟信号处于高电压电平时，输出处于第一电压电平。 当后级移位寄存器的信号处于第一电压电平时，输出处于第三电压电平。

公开(公告)号：US20070132918A1

公开(公告)日：2007-06-14

申请号：US11603883

申请日：2006-11-24

申请人： Chih-Liang Pan ,  Chun-Yen Chang ,  Han-Chang Cheng ,  Yang-En Wu ,  Ping-Chin Cheng ,  Lid-Joon Jong

发明人： Chih-Liang Pan ,  Chun-Yen Chang ,  Han-Chang Cheng ,  Yang-En Wu ,  Ping-Chin Cheng ,  Lid-Joon Jong

IPC分类号： G02F1/1335

CPC分类号： G02B6/0053 ,  G02B6/0046 ,  G02B6/0051

摘要： A flat display, a flat panel display and a backlight module are disclosed. The flat display module comprises the flat panel display and the backlight module. The flat panel display comprises an upper polarizer and a lower polarizer. The lower polarizer includes a first diffusion layer. The backlight module comprises a light emitting device, a prism sheet and a light guide plate. A light beam is provided by the light emitting device. The prism sheet is one-dimensional prism array structure. The light guide plate includes a second diffusion layer for diffusing the light beam. The first diffusion layer has an optical haze greater than the optical haze of the surface of the upper polarizer. Accordingly, thin thickness and high brightness are achieved for the flat display.

摘要翻译： 公开了平板显示器，平板显示器和背光模块。 平板显示模块包括平板显示器和背光模块。 平板显示器包括上偏振器和下偏振器。 下偏振器包括第一扩散层。 背光模块包括发光器件，棱镜片和导光板。 由发光装置提供光束。 棱镜片是一维棱镜阵列结构。 导光板包括用于扩散光束的第二扩散层。 第一扩散层具有大于上偏振器的表面的光学雾度的光学雾度。 因此，对于平板显示器，实现了薄的厚度和高的亮度。

公开(公告)号：US20070046327A1

公开(公告)日：2007-03-01

申请号：US11385369

申请日：2006-03-21

申请人： Chun-Ching Wei ,  Yang-En Wu ,  Wei-Cheng Lin

发明人： Chun-Ching Wei ,  Yang-En Wu ,  Wei-Cheng Lin

IPC分类号： H03K19/173

CPC分类号： G11C19/28

摘要： A shift register circuit having shift registers comprising a first transistor having a gate and a first source/drain for receiving an output signal of a pre-stage shift register, a second transistor having a gate coupled to a second source/drain of the first transistor, a first source/drain coupled to a first clock signal, and a second source/drain coupled to a output, a first pull-down module coupled to the output terminal, for receiving the first clock signal, wherein the output is coupled to a first voltage level when the output signal of pre-stage shift register and the first clock signal are at low voltage level, and a second pull-down module coupled to the output and a second clock signal, wherein the output is coupled to a first voltage level when the output signal of pre-stage shift register and the second clock signal are at low voltage level.

摘要翻译： 一种移位寄存器电路，具有移位寄存器，该移位寄存器包括具有栅极的第一晶体管和用于接收前级移位寄存器的输出信号的第一源极/漏极;第二晶体管，其栅极耦合到第一晶体管的第二源极/漏极 耦合到第一时钟信号的第一源极/漏极和耦合到输出端的第二源极/漏极耦合到输出端子的第一下拉模块，用于接收第一时钟信号，其中输出耦合到 当前级移位寄存器和第一时钟信号的输出信号处于低电压电平时的第一电压电平，以及耦合到输出的第二下拉模块和第二时钟信号，其中输出耦合到第一电压 当前级移位寄存器和第二个时钟信号的输出信号处于低电平时，电平。

公开(公告)号：US07095471B2

公开(公告)日：2006-08-22

申请号：US10708354

申请日：2004-02-26

申请人： Yang-En Wu

发明人： Yang-En Wu

IPC分类号： G02F1/1343

CPC分类号： G02F1/134363 ,  G02F1/136213

摘要： An in-plane switching mode liquid crystal display (IPS-LCD) with a higher opening ratio. The IPS-LCD includes a lower substrate, a plurality of scan lines and a plurality of data lines positioned on the lower substrate, a plurality of pixel electrodes containing pixel electrode offshoots, an insulation layer covering the scan lines and pixel electrodes, a plurality of common electrodes covering one of the pixel electrode offshoots, an upper substrate, and a plurality of liquid crystal molecules filled between the two substrates. An overlapping portion of each pixel electrode offshoot and each common electrode serves as a storage capacitor.

摘要翻译： 具有较高开口率的平面内切换模式液晶显示器（IPS-LCD）。 IPS-LCD包括下基板，多条扫描线和位于下基板上的多条数据线，包含像素电极分支的多个像素电极，覆盖扫描线和像素电极的绝缘层，多个 覆盖像素电极分支之一的公共电极，上基板和填充在两个基板之间的多个液晶分子。 每个像素电极分支和每个公共电极的重叠部分用作存储电容器。

公开(公告)号：US06992329B2

公开(公告)日：2006-01-31

申请号：US10744840

申请日：2003-12-23

申请人： Yang-En Wu ,  Shih-Peng Tai ,  Ming-Chou Wu

发明人： Yang-En Wu ,  Shih-Peng Tai ,  Ming-Chou Wu

IPC分类号： H01L31/20 ,  G09G3/36 ,  G02F1/1337

CPC分类号： G02F1/133707 ,  G02F1/134336

摘要： A multi-domain vertical alignment liquid crystal display (MVA LCD) has a plurality of pixel electrodes for defining a plurality of pixel units. The pixel units are disposed in matrix arrangement, and each of them has a first electrode, a second electrode, and a third electrode. When a voltage is applied to said pixel electrode, the first electrode and the common electrode have a higher absolute voltage difference than the second electrode and the common electrode. The third electrode and the common electrode have the lowest absolute voltage difference.

摘要翻译： 多域垂直取向液晶显示器（MVA LCD）具有用于限定多个像素单元的多个像素电极。 像素单元以矩阵排列设置，并且每个像素单元具有第一电极，第二电极和第三电极。 当对所述像素电极施加电压时，第一电极和公共电极具有比第二电极和公共电极更高的绝对电压差。 第三电极和公共电极具有最低的绝对电压差。

公开(公告)号：US07627077B2

公开(公告)日：2009-12-01

申请号：US12122036

申请日：2008-05-16

申请人： Chun-ching Wei ,  Shih-hsun Lo ,  Yen-hsien Yeh ,  Chen-lun Chiu ,  Yang-en Wu

发明人： Chun-ching Wei ,  Shih-hsun Lo ,  Yen-hsien Yeh ,  Chen-lun Chiu ,  Yang-en Wu

IPC分类号： G11C19/00

CPC分类号： G11C19/184 ,  G09G3/006 ,  G09G3/3674 ,  G09G2330/08

摘要： A shift register having individual driving nodes is disclosed. The shift register includes a first clock pull-down module, a second clock pull-down module, a key pull-down module, a self feedback module, and a driving output unit. The first clock pull-down module is used to pull-down the potential of a gate line to a low voltage when the first clock signal is in a high voltage level. The second clock signal pull-down module pulls down the potential of the gate line to the low voltage when the second clock signal is in a high voltage level. The key pull-down module rapidly pulls down the potential of the gate line to the low voltage level after the gate line outputs an output signal. The self feedback module is used to output a driving signal to the key pull-down module. The driving signal output unit outputs a next stage driving signal which is irrelative to the operation of the previous stage shift register.

摘要翻译： 公开了具有各个驱动节点的移位寄存器。 移位寄存器包括第一时钟下拉模块，第二时钟下拉模块，键下拉模块，自反馈模块和驱动输出单元。 当第一时钟信号处于高电压电平时，第一时钟下拉模块用于将栅极线的电位下拉至低电压。 当第二个时钟信号处于高电压电平时，第二个时钟信号下拉模块将栅极线的电位下拉到低电平。 关键的下拉模块在栅极线输出输出信号后，将栅极线的电位迅速拉低至低电压电平。 自反馈模块用于向钥匙下拉模块输出驱动信号。 驱动信号输出单元输出与前一级移位寄存器的操作无关的下一级驱动信号。