公开(公告)号：US20100012944A1

公开(公告)日：2010-01-21

申请号：US12400768

申请日：2009-03-09

申请人： An-Thung Cho ,  Chin-Wei Hu ,  Ming-Wei Sun ,  Chih-Wei Chao ,  Chia-Tien Peng ,  Kun-Chih Lin

发明人： An-Thung Cho ,  Chin-Wei Hu ,  Ming-Wei Sun ,  Chih-Wei Chao ,  Chia-Tien Peng ,  Kun-Chih Lin

IPC分类号： H01L29/04 ,  H01L21/84

CPC分类号： H01L29/78633 ,  H01L29/78675

摘要： A thin film transistor (TFT) formed on a transparent substrate is provided. The thin film transistor includes a patterned semiconductor layer, a gate insulating layer disposed on the patterned semiconductor layer, a gate electrode disposed on the gate insulating layer, and a patterned light-absorbing layer. The patterned semiconductor layer includes a channel region, and a source region and a drain region disposed on two opposite sides of the channel region in the pattern semiconductor layer. The patterned light-absorbing layer is disposed between the transparent substrate and the patterned semiconductor layer.

摘要翻译： 提供了形成在透明基板上的薄膜晶体管（TFT）。 薄膜晶体管包括图案化半导体层，设置在图案化半导体层上的栅极绝缘层，设置在栅极绝缘层上的栅电极和图案化的光吸收层。 图案化的半导体层包括沟道区，以及设置在图案半导体层中的沟道区的两个相对侧上的源极区和漏极区。 图案化的光吸收层设置在透明基板和图案化的半导体层之间。

公开(公告)号：US07595541B2

公开(公告)日：2009-09-29

申请号：US11776559

申请日：2007-07-12

申请人： Chien-Sen Weng ,  Yi-Wei Chen ,  Chih-Wei Chao ,  Kun-Chih Lin

发明人： Chien-Sen Weng ,  Yi-Wei Chen ,  Chih-Wei Chao ,  Kun-Chih Lin

IPC分类号： H01L31/075

CPC分类号： H01L31/035272 ,  G02F1/1362 ,  H01L31/028 ,  H01L31/105 ,  H01L31/18

摘要： A photo detector is disclosed. The photo detector has a substrate, a semiconductor layer disposed on the substrate, an insulating layer covered on the semiconductor layer, an interlayer dielectric layer covered on the insulating layer, and two electrodes formed on a portion of the interlayer dielectric layer. The semiconductor layer has a first doping region, a second doping region, and an intrinsic region located between the first doping region and the second doping region. The interlayer dielectric layer has at least three holes to expose a portion of the insulating layer, a portion of the first doping region, and the second doping region. The electrodes are connected to the first doping region and the second doping region through two of the holes.

摘要翻译： 公开了一种光电检测器。 光检测器具有基板，设置在基板上的半导体层，覆盖在半导体层上的绝缘层，覆盖在绝缘层上的层间电介质层，以及形成在层间电介质层的一部分上的两个电极。 半导体层具有第一掺杂区域，第二掺杂区域和位于第一掺杂区域和第二掺杂区域之间的本征区域。 层间绝缘层具有至少三个孔以暴露绝缘层的一部分，第一掺杂区的一部分和第二掺杂区。 电极通过两个孔连接到第一掺杂区和第二掺杂区。

公开(公告)号：US20090117698A1

公开(公告)日：2009-05-07

申请号：US12180521

申请日：2008-07-26

申请人： Chih-Wei Chao ,  Chin-Wei Hu ,  Chi-Wen Chen

发明人： Chih-Wei Chao ,  Chin-Wei Hu ,  Chi-Wen Chen

IPC分类号： H01L21/336

CPC分类号： H01L29/7881 ,  H01L21/84 ,  H01L27/115 ,  H01L27/11558 ,  H01L27/1203

摘要： An EEPROM includes a substrate, a first semiconductor layer and a second semiconductor layer formed on the substrate. The first semiconductor layer is isolated from the second semiconductor layer by a trench. A first source and a first drain are located at two opposing sides of the first semiconductor layer. A first dielectric layer is formed on the first semiconductor layer, and a first floating gate is formed on the first dielectric layer. A second source and a second drain are located at two opposing sides of the second semiconductor layer. A second dielectric layer is formed on the second semiconductor layer, and a second floating gate is formed on the second dielectric layer. The first floating gate and the second floating gate are electrically connected.

摘要翻译： EEPROM包括基板，形成在基板上的第一半导体层和第二半导体层。 第一半导体层通过沟槽与第二半导体层隔离。 第一源极和第一漏极位于第一半导体层的相对两侧。 在第一半导体层上形成第一电介质层，在第一电介质层上形成第一浮栅。 第二源极和第二漏极位于第二半导体层的两个相对侧。 在第二半导体层上形成第二电介质层，在第二电介质层上形成第二浮栅。 第一浮栅和第二浮栅电连接。

公开(公告)号：US20090050906A1

公开(公告)日：2009-02-26

申请号：US12175585

申请日：2008-07-18

申请人： An-Thung Cho ,  Chia-Tien Peng ,  Kun-Chih Lin ,  Wen-Jen Chiang ,  Chih-Yang Chen ,  Chrong-Jung Lin ,  Ya-Chin King ,  Chih-Wei Chao ,  Chien-Sen Weng ,  Feng-Yuan Gan

发明人： An-Thung Cho ,  Chia-Tien Peng ,  Kun-Chih Lin ,  Wen-Jen Chiang ,  Chih-Yang Chen ,  Chrong-Jung Lin ,  Ya-Chin King ,  Chih-Wei Chao ,  Chien-Sen Weng ,  Feng-Yuan Gan

IPC分类号： H01L31/147 ,  H01L31/112

CPC分类号： H01L31/153

摘要： A photo detector has a sensing TFT (thin film transistor) and a photodiode. The sensing TFT has a gate and a base. The photodiode has an intrinsic semiconductor region electrically connected to the gate and the base of the sensing TFT. The sensing TFT and the photodiode both have a structure comprising low temperature poly-silicon. A display panel contains the photo detector is also disclosed.

摘要翻译： 光电检测器具有感测TFT（薄膜晶体管）和光电二极管。 感测TFT具有栅极和基极。 光电二极管具有与感测TFT的栅极和基极电连接的本征半导体区域。 感测TFT和光电二极管都具有包括低温多晶硅的结构。 还披露了包含光电检测器的显示面板。

公开(公告)号：US08300532B1

公开(公告)日：2012-10-30

申请号：US12235677

申请日：2008-09-23

申请人： Anjan Venkatramani ,  Kannan Varadhan ,  Jean-Marc Frailong ,  Sanjay Gupta ,  Linda Sun ,  Sankar Ramamoorthi ,  Pradeep Sindhu ,  Anand S. Athreya ,  Chih-Wei Chao ,  Shuhua Ge

发明人： Anjan Venkatramani ,  Kannan Varadhan ,  Jean-Marc Frailong ,  Sanjay Gupta ,  Linda Sun ,  Sankar Ramamoorthi ,  Pradeep Sindhu ,  Anand S. Athreya ,  Chih-Wei Chao ,  Shuhua Ge

IPC分类号： H04L12/26 ,  H04L12/56

CPC分类号： H04L45/306 ,  H04L45/38

摘要： A method may include receiving a packet at an ingress line interface in a forwarding plane of a network element, the packet including header information. The method may also include conducting a flow table lookup in the forwarding plane to identify an existing flow for the packet and determining, in the forwarding plane and based on the header information, whether a predicted flow can be identified for the packet if an existing flow can not be identified. The method may further include performing a service access control list (ACL) lookup in the forwarding plane if a predicted flow can not be identified; and forwarding the packet to one of a services plane or an egress line interface in the forwarding plane based on one of the existing flow, the predicted flow, or the service ACL lookup.

摘要翻译： 方法可以包括在网元的转发平面中的入口线路接口处接收分组，该分组包括报头信息。 该方法还可以包括在转发平面中进行流表查找以识别分组的现有流，并且在转发平面中并且基于报头信息来确定是否可以为分组识别预测流，如果现有流 无法识别。 该方法还可以包括如果不能识别预测流，则在转发平面中执行服务访问控制列表（ACL）查找; 以及基于现有流，预测流或服务ACL查找之一将分组转发到转发平面中的服务平面或出口线路接口之一。

公开(公告)号：US08178377B2

公开(公告)日：2012-05-15

申请号：US13046632

申请日：2011-03-11

申请人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

发明人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

IPC分类号： H01L21/00

CPC分类号： H01L33/44 ,  H01L33/387 ,  Y10S438/951

摘要： A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.

摘要翻译： 提供一种制造发光二极管芯片的方法。 在该方法中，应用半色调掩模处理，灰度色调处理或多色调掩模处理，并与剥离处理相结合，以进一步减少发光二极管芯片的处理步骤。 在本发明中，一些部件也可以通过相同的工艺同时形成，以减少发光二极管芯片的工艺步骤。 因此，本发明中提供的发光二极管的制造方法降低了用于制造发光二极管的成本和时间。

公开(公告)号：US08178376B2

公开(公告)日：2012-05-15

申请号：US13046619

申请日：2011-03-11

申请人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

发明人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

IPC分类号： H01L21/00

CPC分类号： H01L33/44 ,  H01L33/387 ,  Y10S438/951

摘要： A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.

公开(公告)号：US08173468B2

公开(公告)日：2012-05-08

申请号：US13046606

申请日：2011-03-11

申请人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

发明人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

IPC分类号： H01L21/00

CPC分类号： H01L33/44 ,  H01L33/387 ,  Y10S438/951

摘要： A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.

公开(公告)号：US08173465B2

公开(公告)日：2012-05-08

申请号：US13046576

申请日：2011-03-11

申请人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

发明人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

IPC分类号： H01L21/00

CPC分类号： H01L33/44 ,  H01L33/387 ,  Y10S438/951

摘要： A method for fabricating a light emitting diode chip is provided. In the method, a half-tone mask process, a gray-tone mask process or a multi-tone mask process is applied and combined with a lift-off process to further reduce process steps of the light emitting diode chip. In the present invention, some components may also be simultaneously formed by an identical process to reduce the process steps of the light emitting diode chip. Consequently, the fabricating method of the light emitting diode provided in the present invention reduces the cost and time for the fabrication of the light emitting diode.

摘要翻译： 提供一种制造发光二极管芯片的方法。 在该方法中，应用半色调掩模处理，灰度色调处理或多色调掩模处理，并与剥离处理相结合，以进一步减少发光二极管芯片的处理步骤。 在本发明中，一些部件也可以通过相同的工艺同时形成，以减少发光二极管芯片的工艺步骤。 因此，本发明中提供的发光二极管的制造方法降低了用于制造发光二极管的成本和时间。

公开(公告)号：US08143090B2

公开(公告)日：2012-03-27

申请号：US13045512

申请日：2011-03-10

申请人： Chien-Sen Weng ,  Chih-Wei Chao ,  Chrong-Jung Lin ,  Ya-Chin King

发明人： Chien-Sen Weng ,  Chih-Wei Chao ,  Chrong-Jung Lin ,  Ya-Chin King

IPC分类号： H01L31/18

CPC分类号： H01L31/153 ,  G02F2201/58

摘要： A method of fabricating a photo sensor includes the following steps. First, a substrate is provided, having a conductive layer, a buffer dielectric layer, a patterned semiconductor layer, a dielectric layer, and a planarization layer disposed thereon from bottom to top, wherein the patterned semiconductor layer comprises a first doped region, an intrinsic region, and a second doped region disposed in order. Then, the planarization layer is patterned to form an opening in the planarization layer to expose a portion of the dielectric layer, wherein the opening is positioned on the intrinsic region and portions of the first and the second doped regions. Thereafter, at least a patterned transparent conductive layer is formed in the opening, covering the boundary of the intrinsic region and the first doped region and the boundary of the intrinsic region and the second doped region.

摘要翻译： 一种制造光传感器的方法包括以下步骤。 首先，提供具有导电层，缓冲电介质层，图案化半导体层，电介质层和从底部到顶部设置在其上的平坦化层的衬底，其中所述图案化半导体层包括第一掺杂区域， 区域，以及依次布置的第二掺杂区域。 然后，对平坦化层进行图案化以在平坦化层中形成开口，以暴露电介质层的一部分，其中开口位于本征区域和第一和第二掺杂区域的部分上。 此后，至少在开口中形成图案化的透明导电层，覆盖本征区域和第一掺杂区域以及本征区域和第二掺杂区域的边界的边界。