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公开(公告)号：US11431345B2
公开(公告)日：2022-08-30
申请号：US17097741
申请日：2020-11-13
Inventor： John P. Lesso
IPC: H03M1/06
Abstract: This application describes method and apparatus for data conversion. An analogue-to-digital converter circuit receives an analogue input signal (SIN) and outputs a digital output signal (SOUT). The circuit has a sampling capacitor, a controlled oscillator and a counter for generating a count value based on a number of oscillations in an output of the controlled oscillator in a count period during a read-out phase. The digital output signal is based on the count value. The converter circuit is operable in a sampling phase and the read-out phase. In the sampling phase, the sampling capacitor is coupled to an input node for the input signal, e.g. via switch. In the read-out phase, the sampling capacitor is coupled to the controlled oscillator, e.g. via switch, such that capacitor powers the first controlled oscillator and a frequency of oscillation in the output of the first controlled oscillator depends on the voltage of the first capacitor.
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公开(公告)号：US11381239B1
公开(公告)日：2022-07-05
申请号：US17381546
申请日：2021-07-21
Inventor： John P. Lesso , John L. Melanson
IPC: H03K17/687 , H02N2/00
Abstract: The present disclosure relates to switching drivers for driving a transducer. A switching driver (202) has supply nodes for receiving supply voltages (VSH, VSL) defining at least one input voltage and an output node (104). A controller (205) controls operation of the first switching driver to generate a drive signal for the transducer at the output node (104), based on an input signal (Sin). A first capacitor (201a) is connected between first and second capacitor nodes (104, 204a) and a second capacitor (201b) is connected between the second capacitor node (204a) and a third capacitor node (204b). A network of switches (203) selectively connects any of the driver output node, the second capacitor node and the third capacitor node to either of a respective pair of said supply nodes, with the first capacitor node connected to the first driver output node.
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公开(公告)号：US11146277B2
公开(公告)日：2021-10-12
申请号：US16793243
申请日：2020-02-18
Inventor： John P. Lesso
Abstract: A clock generator receives first and second clock signals, and input representing a desired frequency ratio. A comparison is made between frequencies of an output clock signal and the first clock signal, and a first error signal represents the difference between the desired frequency ratio and this comparison result. The first error signal is filtered. A comparison is made between frequencies of the output clock signal and the second clock signal, and a second error signal represents the difference between the filtered first error signal and this comparison result. The second error signal is filtered. A numerically controlled oscillator receives the filtered second error signal and generates an output clock signal. As a result, the output clock signal has the jitter characteristics of the first input clock signal over a useful range of jitter frequencies and the frequency accuracy of the second input clock signal.
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公开(公告)号：US11134354B1
公开(公告)日：2021-09-28
申请号：US16901073
申请日：2020-06-15
Inventor： John P. Lesso
Abstract: A method is used of detecting whether a device is being worn, when the device comprises a first transducer and a second transducer. It is determined when a signal detected by at least one of the first and second transducers represents speech. It is then determined when said speech contains speech of a first acoustic class and speech of a second acoustic class. A first correlation signal is generated, representing a correlation between signals generated by the first and second transducers during at least one period when said speech contains speech of the first acoustic class. A second correlation signal is generated, representing a correlation between signals generated by the first and second transducers during at least one period when said speech contains speech of the second acoustic class. It is then determined from the first correlation signal and the second correlation signal whether the device is being worn.
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公开(公告)号：US11089415B1
公开(公告)日：2021-08-10
申请号：US16829600
申请日：2020-03-25
Inventor： John P. Lesso
IPC: H04R29/00
Abstract: The disclosure relates in general to on-ear transition detection, and in particular to on-ear transition detection circuitry comprising: a monitoring unit operable to monitor a speaker current flowing through a speaker and/or a speaker voltage induced across the speaker, and to generate a monitor signal indicative of the speaker current and/or the speaker voltage; and an event detector operable to detect a qualifying disturbance in a sensor signal indicative of a qualifying pressure change incident on the speaker caused by the speaker transitioning from an on-ear state to an off-ear state or vice versa, wherein the sensor signal is, or is derived from, the monitor signal.
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Patent Agency Ranking
公开(公告)号：US10819229B2
公开(公告)日：2020-10-27
申请号：US16450129
申请日：2019-06-24
Inventor： John P. Lesso , Peter J. Frith , John L. Pennock
Abstract: A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes and a second pair of output nodes, and two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first bipolar output voltage at the first pair of output nodes and a second bipolar output voltage at the second pair of bipolar output nodes.
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公开(公告)号：US20200186154A1
公开(公告)日：2020-06-11
申请号：US16793243
申请日：2020-02-18
Inventor： John P. Lesso
Abstract: A clock generator receives first and second clock signals, and input representing a desired frequency ratio. A comparison is made between frequencies of an output clock signal and the first clock signal, and a first error signal represents the difference between the desired frequency ratio and this comparison result. The first error signal is filtered. A comparison is made between frequencies of the output clock signal and the second clock signal, and a second error signal represents the difference between the filtered first error signal and this comparison result. The second error signal is filtered. A numerically controlled oscillator receives the filtered second error signal and generates an output clock signal. As a result, the output clock signal has the jitter characteristics of the first input clock signal over a useful range of jitter frequencies and the frequency accuracy of the second input clock signal.
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公开(公告)号：US10601430B2
公开(公告)日：2020-03-24
申请号：US16434617
申请日：2019-06-07
Inventor： John P. Lesso
Abstract: A clock generator receives first and second clock signals, and input representing a desired frequency ratio. A comparison is made between frequencies of an output clock signal and the first clock signal, and a first error signal represents the difference between the desired frequency ratio and this comparison result. The first error signal is filtered. A comparison is made between frequencies of the output clock signal and the second clock signal, and a second error signal represents the difference between the filtered first error signal and this comparison result. The second error signal is filtered. A numerically controlled oscillator receives the filtered second error signal and generates an output clock signal. As a result, the output clock signal has the jitter characteristics of the first input clock signal over a useful range of jitter frequencies and the frequency accuracy of the second input clock signal.
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公开(公告)号：US20200052582A9
公开(公告)日：2020-02-13
申请号：US15597900
申请日：2017-05-17
Inventor： John P. Lesso , John L. Pennock , Peter J. Frith
Abstract: A signal amplifying circuit and associated methods and apparatuses, the circuit comprising: a signal path extending from an input terminal to an output terminal, a gain controller arranged to control the gain applied along the signal path in response to a control signal; an output stage within the signal path for generating the output signal, the output stage having a gain that is substantially independent of its supply voltage, and a variable voltage power supply comprising a charge pump for providing positive and negative output voltages, the charge pump comprising a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of the states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage.
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公开(公告)号：US20190356222A1
公开(公告)日：2019-11-21
申请号：US16427892
申请日：2019-05-31
Inventor： John P. Lesso , Peter J. Frith , John L. Pennock
Abstract: A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes, two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first mode and a second mode when in use with two flying capacitors connected to the flying capacitor nodes, wherein at least the first mode corresponds to a bipolar output voltage of +/−3VV, +/−VV/5 or +/−VV/6.
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