公开(公告)号：US20110068370A1

公开(公告)日：2011-03-24

申请号：US12923126

申请日：2010-09-03

申请人： Jong-seob Kim ,  Ki-ha Hong ,  Jae-joon Oh ,  Hyuk-soon Choi ,  In-jun Whang ,  Jai-kwang Shin

发明人： Jong-seob Kim ,  Ki-ha Hong ,  Jae-joon Oh ,  Hyuk-soon Choi ,  In-jun Whang ,  Jai-kwang Shin

IPC分类号： H01L29/778 ,  H01L21/335

CPC分类号： H01L29/207 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787

摘要： Power electronic devices including 2-dimensional electron gas (2DEG) channels and methods of manufacturing the same. A power electronic device includes lower and upper material layers for forming a 2DEG channel, and a gate contacting an upper surface of the upper material layer. A region below the gate of the 2DEG channel is an off region where the density of a 2DEG is reduced or zero. The entire upper material layer may be continuous and may have a uniform thickness. A region of the upper material layer under the gate contains an impurity for reducing or eliminating a lattice constant difference between the lower and upper material layers.

摘要翻译： 包括二维电子气体（2DEG）通道的电力电子装置及其制造方法。 电力电子设备包括用于形成2DEG通道的下部和上部材料层，以及与上部材料层的上表面接触的栅极。 2DEG通道的栅极下方的区域是2DEG的密度减小或为零的截止区域。 整个上部材料层可以是连续的并且可以具有均匀的厚度。 在栅极下方的上部材料层的区域包含用于减少或消除下部和上部材料层之间的晶格常数差的杂质。

公开(公告)号：US20100302870A1

公开(公告)日：2010-12-02

申请号：US12805498

申请日：2010-08-03

申请人： Ki-ha Hong ,  Sung-hoon Lee ,  Jae-woong Hyun ,  Jai-kwang Shin ,  Young-gu Jin ,  Sung-iI Park ,  Jong-seob Kim

发明人： Ki-ha Hong ,  Sung-hoon Lee ,  Jae-woong Hyun ,  Jai-kwang Shin ,  Young-gu Jin ,  Sung-iI Park ,  Jong-seob Kim

IPC分类号： G11C16/04

CPC分类号： G11C16/16 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： Provided is a method of reliably operating a highly integratable nonvolatile memory device. The nonvolatile memory device may include a string selection transistor, a plurality of memory transistors, and a ground selection transistor between a bit line and a common source line. In the nonvolatile memory device, data may be erased from the memory transistors by applying an erasing voltage to the bit line or the common source line.

摘要翻译： 提供了可靠地操作高度可积分的非易失性存储器件的方法。 非易失性存储器件可以包括串选择晶体管，多个存储晶体管和位线和公共源极线之间的接地选择晶体管。 在非易失性存储器件中，通过向位线或公共源极线施加擦除电压，可以从存储晶体管擦除数据。

公开(公告)号：US07813185B2

公开(公告)日：2010-10-12

申请号：US12010706

申请日：2008-01-29

申请人： Ki-ha Hong ,  Sung-hoon Lee ,  Jae-woong Hyun ,  Jai-kwang Shin ,  Young-gu Jin ,  Sung-il Park ,  Jong-seob Kim

发明人： Ki-ha Hong ,  Sung-hoon Lee ,  Jae-woong Hyun ,  Jai-kwang Shin ,  Young-gu Jin ,  Sung-il Park ,  Jong-seob Kim

IPC分类号： G11C16/04

CPC分类号： G11C16/16 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： Provided is a method of reliably operating a highly integratable nonvolatile memory device. The nonvolatile memory device may include a string selection transistor, a plurality of memory transistors, and a ground selection transistor between a bit line and a common source line. In the nonvolatile memory device, data may be erased from the memory transistors by applying an erasing voltage to the bit line or the common source line.

公开(公告)号：US20100176428A1

公开(公告)日：2010-07-15

申请号：US12654349

申请日：2009-12-17

申请人： Ki-ha Hong ,  Jong-seob Kim ,  Jai-kwang Shin

发明人： Ki-ha Hong ,  Jong-seob Kim ,  Jai-kwang Shin

IPC分类号： H01L29/82

CPC分类号： H01L29/66984 ,  B82Y25/00 ,  H01F1/401 ,  H01F10/1936 ,  H01F10/3254

摘要： Provided are spin field effect logic devices, the logic devices including: a gate electrode; a channel formed of a magnetic material above the gate electrode to selectively transmit spin-polarized electrons; a source on the channel; and a drain and an output electrode on the channel outputting electrons transmitted from the source. The gate electrode may control a magnetization state of the channel in order to selectively transmit the electrons injected from the source to the channel.

摘要翻译： 提供的是自旋场效应逻辑器件，逻辑器件包括：栅电极; 由栅电极上方的磁性材料形成的沟道，以选择性地透射自旋极化电子; 频道上的来源; 以及沟道上的漏极和输出电极，输出从源极发射的电子。 栅电极可以控制通道的磁化状态，以选择性地将从源引入的电子传输到通道。

公开(公告)号：US20090121267A1

公开(公告)日：2009-05-14

申请号：US12081283

申请日：2008-04-14

申请人： Ki-ha Hong ,  Sung-hoon Lee ,  Jong-seob Kim ,  Jai kwang Shin

发明人： Ki-ha Hong ,  Sung-hoon Lee ,  Jong-seob Kim ,  Jai kwang Shin

IPC分类号： H01L29/82

CPC分类号： H01L29/66984 ,  B82Y25/00 ,  H01F1/401 ,  H01F1/404 ,  H01F10/1933 ,  H01F10/1936 ,  H01F10/3254 ,  H01F10/3295 ,  H01L29/82

摘要： A spin field effect transistor may include at least one gate electrode, a channel layer, a first stack and a second stack separate from each other on a substrate, wherein the channel layer is formed of a half metal. The half metal may be at least one material selected from the group consisting of chrome oxide (CrO2), magnetite (Fe3O4), a double perovskite structure material, a Heusler alloy, NiMnSb, La(1-x)AxMnO3 (A=Ca, Ba, Sr, x˜0.3), and GaN doped with Cu, and the double perovskite structure material is expressed as a chemical composition of A2BB′O6, and a material corresponding to A is Ca, Sr, or Ba, a material corresponding to B is a 3d orbital transition metal, and a material corresponding to B′ is a 4d orbital transition metal. The 3d orbital transition metal may be Fe or Co, and the 4d orbital transition metal is Mo or Re.

摘要翻译： 自旋场效应晶体管可以包括在基板上彼此分离的至少一个栅电极，沟道层，第一堆叠和第二堆叠，其中沟道层由半金属形成。 半金属可以是选自氧化铬（CrO 2），磁铁矿（Fe 3 O 4），双钙钛矿结构材料，Heusler合金，NiMnSb，La（1-x）AxMnO 3（A = Ca， Ba，Sr，x〜0.3）和掺杂有Cu的GaN，双钙钛矿结构材料表示为A2BB'O6的化学组成，对应于A的材料为Ca，Sr或Ba，与 B是3d轨道过渡金属，对应于B'的材料是4d轨道过渡金属。 3d轨道过渡金属可以是Fe或Co，4d轨道过渡金属是Mo或Re。

公开(公告)号：US20090021988A1

公开(公告)日：2009-01-22

申请号：US12010706

申请日：2008-01-29

申请人： Ki-ha Hong ,  Sung-hoon Lee ,  Jae-woong Hyun ,  Jai-kwang Shin ,  Young-gu Jin ,  Sung-il Park ,  Jong-seob Kim

发明人： Ki-ha Hong ,  Sung-hoon Lee ,  Jae-woong Hyun ,  Jai-kwang Shin ,  Young-gu Jin ,  Sung-il Park ,  Jong-seob Kim

IPC分类号： G11C16/06

CPC分类号： G11C16/16 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： Provided is a method of reliably operating a highly integratable nonvolatile memory device. The nonvolatile memory device may include a string selection transistor, a plurality of memory transistors, and a ground selection transistor between a bit line and a common source line. In the nonvolatile memory device, data may be erased from the memory transistors by applying an erasing voltage to the bit line or the common source line.

摘要翻译： 提供了可靠地操作高度可积分的非易失性存储器件的方法。 非易失性存储器件可以包括串选择晶体管，多个存储晶体管和位线和公共源极线之间的接地选择晶体管。 在非易失性存储器件中，通过向位线或公共源极线施加擦除电压，可以从存储晶体管擦除数据。

公开(公告)号：US08803565B2

公开(公告)日：2014-08-12

申请号：US13064264

申请日：2011-03-15

申请人： Ho-jung Kim ,  Jae-kwang Shin ,  Jae-joon Oh ,  Jong-seob Kim ,  Hyuk-soon Choi ,  In-jun Hwang ,  Ki-ha Hong

发明人： Ho-jung Kim ,  Jae-kwang Shin ,  Jae-joon Oh ,  Jong-seob Kim ,  Hyuk-soon Choi ,  In-jun Hwang ,  Ki-ha Hong

IPC分类号： H03K17/16

CPC分类号： H03K17/163 ,  H03K17/284

摘要： A power device includes a switching device having a control terminal and an output terminal; and a driving circuit configured to provide a driving voltage to the control terminal such that a voltage between the control terminal and the output terminal remains less than or equal to a critical voltage. A rise time required for the driving voltage to reach a target level is determined according to current-voltage characteristics of the switching device. And, when the voltage between the control terminal and the output terminal exceeds the critical voltage, leakage current is generated between the control terminal and the output terminal.

摘要翻译： 功率器件包括具有控制端子和输出端子的开关器件; 以及驱动电路，被配置为向控制端子提供驱动电压，使得控制端子和输出端子之间的电压保持小于或等于临界电压。 根据开关装置的电流 - 电压特性来确定驱动电压达到目标电平所需的上升时间。 而且，当控制端子与输出端子之间的电压超过临界电压时，控制端子与输出端子之间产生漏电流。

公开(公告)号：US20110273221A1

公开(公告)日：2011-11-10

申请号：US13064264

申请日：2011-03-15

申请人： Ho-jung Kim ,  Jae-kwang Shin ,  Jae-Joon Oh ,  Jong-seob Kim ,  Hyuk-soon Choi ,  In-jun Hwang ,  Ki-ha Hong

发明人： Ho-jung Kim ,  Jae-kwang Shin ,  Jae-Joon Oh ,  Jong-seob Kim ,  Hyuk-soon Choi ,  In-jun Hwang ,  Ki-ha Hong

IPC分类号： H03K17/284 ,  H03K17/687

CPC分类号： H03K17/163 ,  H03K17/284

摘要： A power device includes a switching device having a control terminal and an output terminal; and a driving circuit configured to provide a driving voltage to the control terminal such that a voltage between the control terminal and the output terminal remains less than or equal to a critical voltage. A rise time required for the driving voltage to reach a target level is determined according to current-voltage characteristics of the switching device. And, when the voltage between the control terminal and the output terminal exceeds the critical voltage, leakage current is generated between the control terminal and the output terminal.

摘要翻译： 功率器件包括具有控制端子和输出端子的开关器件; 以及驱动电路，被配置为向控制端子提供驱动电压，使得控制端子和输出端子之间的电压保持小于或等于临界电压。 根据开关装置的电流 - 电压特性来确定驱动电压达到目标电平所需的上升时间。 而且，当控制端子与输出端子之间的电压超过临界电压时，控制端子与输出端子之间产生漏电流。

公开(公告)号：US09343564B2

公开(公告)日：2016-05-17

申请号：US14718968

申请日：2015-05-21

申请人： Young-jin Cho ,  Kyoung-yeon Kim ,  Sang-moon Lee ,  Ki-ha Hong ,  Eui-chul Hwang

发明人： Young-jin Cho ,  Kyoung-yeon Kim ,  Sang-moon Lee ,  Ki-ha Hong ,  Eui-chul Hwang

IPC分类号： H01L29/06 ,  H01L29/778 ,  H01L29/66 ,  H01L29/20 ,  H01L29/78 ,  H01L21/02 ,  H01L29/12

CPC分类号： H01L29/7784 ,  H01L21/02538 ,  H01L29/122 ,  H01L29/127 ,  H01L29/158 ,  H01L29/20 ,  H01L29/205 ,  H01L29/42376 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/66522 ,  H01L29/66795 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/785

摘要： A semiconductor device including a group III-V barrier and a method of manufacturing the semiconductor device, the semiconductor device including: a substrate, insulation layers formed to be spaced apart on the substrate, a group III-V material layer for filling the space between the insulation layers and having a portion protruding higher than the insulation layers, a barrier layer for covering the side and upper surfaces of the protruding portion of the group III-V material layer and having a bandgap larger than that of the group III-V material layer, a gate insulation film for covering the surface of the barrier layer, a gate electrode formed on the gate insulation film, and source and drain electrodes formed apart from the gate electrode. The overall composition of the group III-V material layer is uniform. The barrier layer may include a group III-V material for forming a quantum well.

公开(公告)号：US09324852B2

公开(公告)日：2016-04-26

申请号：US14623394

申请日：2015-02-16

申请人： Young-jin Cho ,  Kyoung-yeon Kim ,  Sang-moon Lee ,  Ki-ha Hong ,  Eui-chul Hwang

发明人： Young-jin Cho ,  Kyoung-yeon Kim ,  Sang-moon Lee ,  Ki-ha Hong ,  Eui-chul Hwang

IPC分类号： H01L29/06 ,  H01L29/778 ,  H01L29/66 ,  H01L29/20 ,  H01L29/78 ,  H01L21/02 ,  H01L29/12

CPC分类号： H01L29/7784 ,  H01L21/02538 ,  H01L29/122 ,  H01L29/127 ,  H01L29/158 ,  H01L29/20 ,  H01L29/205 ,  H01L29/42376 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/66522 ,  H01L29/66795 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/785

摘要： A semiconductor device including a group III-V barrier and a method of manufacturing the semiconductor device, the semiconductor device including: a substrate, insulation layers formed to be spaced apart on the substrate, a group III-V material layer for filling the space between the insulation layers and having a portion protruding higher than the insulation layers, a barrier layer for covering the side and upper surfaces of the protruding portion of the group III-V material layer and having a bandgap larger than that of the group III-V material layer, a gate insulation film for covering the surface of the barrier layer, a gate electrode formed on the gate insulation film, and source and drain electrodes formed apart from the gate electrode. The overall composition of the group III-V material layer is uniform. The barrier layer may include a group III-V material for forming a quantum well.

摘要翻译： 一种包括III-V族阻挡层的半导体器件和制造半导体器件的方法，所述半导体器件包括：衬底，形成为在衬底上间隔开的绝缘层，用于填充所述衬底之间的空间的III-V族材料层 所述绝缘层具有比所述绝缘层突出的部分，用于覆盖所述III-V族材料层的所述突出部分的侧表面和上表面的阻挡层，并且具有比所述III-V族材料的带隙大的带隙 层，用于覆盖势垒层的表面的栅极绝缘膜，形成在栅极绝缘膜上的栅电极，以及与栅电极分开形成的源极和漏极。 III-V族材料层的总体组成是均匀的。 阻挡层可以包括用于形成量子阱的III-V族材料。