公开(公告)号：US20220310766A1

公开(公告)日：2022-09-29

申请号：US17841669

申请日：2022-06-16

Applicant: Japan Display Inc.

Inventor： Masumi NISHIMURA ,  Hiroshi TABATAKE ,  Akihito SATO

IPC: H01L27/32

Abstract: A display includes a plurality of first wirings which are provided on a first layer and each of which is arranged parallel to a first direction in a first area, and which are arranged on a second layer in a second area; a second wiring which is provided in the first layer in the first area and which is provided on a layer in the second area; and a third wiring which is provided on the first layer and arranged between the first wirings in the first area and which is arranged to intersect with first wirings in the second area. The first wirings is arranged to be inclined to the same side in the first direction in the second area. The second wiring is arranged to intersect with a portion of the plurality of first wirings in a plan view, in the second area.

公开(公告)号：US20220005994A1

公开(公告)日：2022-01-06

申请号：US17476953

申请日：2021-09-16

Applicant: Japan Display Inc.

Inventor： Tetsuo MORITA ,  Hiroshi TABATAKE ,  Yasuhiro OGAWA

IPC: H01L33/62 ,  H01L27/15 ,  H01L33/38

Abstract: According to one embodiment, a display device includes a substrate, a pixel electrode disposed on the substrate, a light emitting element mounted on the pixel electrode, a drive transistor configured to control a current supplied to the light emitting element through the pixel electrode, and a conductive layer formed between the pixel electrode and the drive transistor so as to at least partially overlap with the pixel electrode in a planar view. The conductive layer does not overlap with a region of the pixel electrode on which the light emitting element is mounted in a planar view.

公开(公告)号：US20210083025A1

公开(公告)日：2021-03-18

申请号：US17018731

申请日：2020-09-11

Applicant: Japan Display Inc.

Inventor： Kenji NAKAO ,  Hiroshi TABATAKE ,  Akihito SATO

IPC: H01L27/32

Abstract: The first light-emitting layer is higher in light-emission start voltage than each of the second light-emitting layer and the third light-emitting layer. The second light-emitting layer is higher in visibility of the emission color than each of the first light-emitting layer and the third light-emitting layer. The electroluminescence layer has an inter-pixel section between an adjacent pair of the openings and along the upper surface of the insulation layer. The inter-pixel section between the first opening and the second opening has a first resistance value. The inter-pixel section between the second opening and the third opening has a second resistance value. The inter-pixel section between the third opening and the first opening has a third resistance value. The first resistance value is larger than each of the second resistance value and the third resistance value.

公开(公告)号：US20210074738A1

公开(公告)日：2021-03-11

申请号：US16952455

申请日：2020-11-19

Applicant: Japan Display Inc.

Inventor： Tetsuo MORITA ,  Hiroyuki KIMURA ,  Makoto SHIBUSAWA ,  Hiroshi TABATAKE ,  Yasuhiro OGAWA

IPC: H01L27/12 ,  H01L27/13 ,  H01L29/786 ,  G02F1/1362

Abstract: Provided is a display device including: a capacitor having a first electrode, a first insulating film over the first electrode, and a second electrode over the first insulating film; and a first transistor over the capacitor. The first transistor includes the second electrode a second insulating film over the second electrode, an oxide semiconductor film over the second insulating film, and a first source electrode and a first drain electrode over the oxide semiconductor film. The first source electrode and the first drain electrode are electrically connected to the oxide semiconductor film.

公开(公告)号：US20190139995A1

公开(公告)日：2019-05-09

申请号：US16234838

申请日：2018-12-28

Applicant: Japan Display Inc.

Inventor： Tetsuo MORITA ,  Hiroyuki KIMURA ,  Makoto SHIBUSAWA ,  Hiroshi TABATAKE ,  Yasuhiro OGAWA

IPC: H01L27/12 ,  H01L29/786 ,  H01L27/13 ,  G02F1/1368 ,  H01L27/32

Abstract: Provided is a display device including: a capacitor having a first electrode, a first insulating film over the first electrode, and a second electrode over the first insulating film; and a first transistor over the capacitor. The first transistor includes the second electrode, a second insulating film over the second electrode, an oxide semiconductor film over the second insulating film, and a first source electrode and a first drain electrode over the oxide semiconductor film. The first source electrode and the first drain electrode are electrically connected to the oxide semiconductor film.

公开(公告)号：US20190073951A1

公开(公告)日：2019-03-07

申请号：US16177513

申请日：2018-11-01

Applicant: Japan Display Inc.

Inventor： Yasuhiro OGAWA ,  Hiroshi TABATAKE ,  Hiroyuki KIMURA ,  Tetsuo MORITA ,  Makoto SHIBUSAWA

IPC: G09G3/3233 ,  H01L27/32 ,  G09G3/20 ,  G02F1/1362 ,  G09G3/3258 ,  G02F1/1343 ,  G02F1/136

Abstract: A display device includes a switching element having a first input/output terminal electrically connected to a first signal line, a first wiring electrically connected to a second input/output terminal of the switching element, a transistor having a gate electrode connected to the first wiring, a second wiring electrically connected to a source or drain of the transistor, a pixel electrode connected to the second wiring, a first insulating layer which is arranged between the first wiring and the second wiring and is arranged between the first wiring and the pixel electrode, a second insulating layer between the first insulating layer and pixel electrode, and a conducting layer between the first insulating layer and the second insulating layer, the conducting layer including a region overlapping the pixel electrode. The conducting layer includes a dividing groove dividing the conducting layer into a plurality of regions at a region overlapping the pixel electrode.

公开(公告)号：US20180090068A1

公开(公告)日：2018-03-29

申请号：US15709661

申请日：2017-09-20

Applicant: Japan Display Inc.

Inventor： Yasuhiro OGAWA ,  Hiroshi TABATAKE ,  Hiroyuki KIMURA ,  Tetsuo MORITA ,  Makoto SHIBUSAWA

IPC: G09G3/3233 ,  G02F1/1343 ,  G09G3/3258 ,  G02F1/1362 ,  G09G3/20

CPC classification number: G09G3/3233 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/136213 ,  G02F1/13624 ,  G02F2001/13606 ,  G09G3/20 ,  G09G3/2003 ,  G09G3/2074 ,  G09G3/3258 ,  G09G2300/0426 ,  G09G2300/0439 ,  H01L27/3246

Abstract: A display device includes a switching element having a first input/output terminal electrically connected to a first signal line, a first wiring electrically connected to a second input/output terminal of the switching element, a transistor having a gate electrode connected to the first wiring, a second wiring electrically connected to a source or drain of the transistor, a pixel electrode connected to the second wiring, a first insulating layer which is arranged between the first wiring and the second wiring and is arranged between the first wiring and the pixel electrode, a second insulating layer between the first insulating layer and pixel electrode, and a conducting layer between the first insulating layer and the second insulating layer, the conducting layer including a region overlapping the pixel electrode. The conducting layer includes a dividing groove dividing the conducting layer into a plurality of regions at a region overlapping the pixel electrode.

公开(公告)号：US20180069126A1

公开(公告)日：2018-03-08

申请号：US15686831

申请日：2017-08-25

Applicant: Japan Display Inc.

Inventor： Toshinari SASAKI ,  Hiroshi TABATAKE

IPC: H01L29/786 ,  H01L29/32 ,  H01L27/12 ,  H01L29/66 ,  H01L49/02

CPC classification number: H01L29/7869 ,  G09G3/32 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0876 ,  G09G2310/0216 ,  G09G2320/0209 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/0274 ,  H01L21/441 ,  H01L21/465 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1255 ,  H01L28/60 ,  H01L29/32 ,  H01L29/66969 ,  H01L29/78696

Abstract: A semiconductor device includes an n-type oxide semiconductor layer, a gate electrode above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first terminal connected to the oxide semiconductor layer, and a second terminal connected to the gate electrode, a potential applied to the second terminal being higher than a potential applied to the first terminal.

公开(公告)号：US20180053470A1

公开(公告)日：2018-02-22

申请号：US15618202

申请日：2017-06-09

Applicant: Japan Display Inc.

Inventor： Tetsuo MORITA ,  Hiroyuki KIMURA ,  Makoto SHIBUSAWA ,  Hiroshi TABATAKE ,  Yasuhiro OGAWA

IPC: G09G3/3258

CPC classification number: G09G3/3258 ,  G09G3/3233 ,  G09G2300/043 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2300/0866 ,  G09G2300/0871 ,  G09G2310/08

Abstract: A driving method of a display device is provided. In a first period, threshold voltages are simultaneously compensated for all first transistors which are provided in a plurality of pixels arranged in a matrix form with n rows and m columns. In a second period, turning switches are turned off, and image data is written to the first transistors in the plurality of pixels row-by-row. In a third period, all light-emitting elements are made to simultaneously emit light. n and m are each an integer larger than 1. Each of the first transistors is configured so that the image data is input to a control terminal, a first terminal is electrically connected to a power-source line, and a second terminal is electrically connected to the light-emitting element. The power-source line is supplied with a high-level potential in the first and third periods and a low-level potential in the second period.

公开(公告)号：US20160086543A1

公开(公告)日：2016-03-24

申请号：US14858348

申请日：2015-09-18

Applicant: Japan Display Inc.

Inventor： Tetsuo MORITA ,  Hiroyuki KIMURA ,  Makoto SHIBUSAWA ,  Hiroshi NAKAYAMA ,  Hiroshi TABATAKE ,  Yutaka UMEDA

IPC: G09G3/32

CPC classification number: G09G3/3233 ,  G09G2300/0861 ,  G09G2310/0245 ,  G09G2330/021 ,  G09G2330/025 ,  G09G2330/026

Abstract: A flash phenomenon of OLEDs at the time of power source ON of a display device is suppressed. The OLED emits light when reference potentials VSS and VDD are applied from power source lines to the OLED's cathode and anode respectively. While the anode can be connected to one of the power source line via a driving TFT and a lighting switch, a reset potential VRS can be applied to the anode via a reset switch and the driving TFT. The lighting switch is turned OFF and the reset switch and the driving TFT are turned ON so that VRS is applied to the anode, before starting the application of the reference potentials to the power source lines. Following this state, the application of the reference potentials to the power source lines starts, and thus a normal operation of allowing the OLED to emit light starts.

Abstract translation: 抑制显示装置的电源ON时的OLED的闪光现象。 当参考电位VSS和VDD分别从电源线施加到OLED的阴极和阳极时，OLED发光。 当阳极可以经由驱动TFT和照明开关连接到电源线中的一个时，复位电位VRS可以经由复位开关和驱动TFT施加到阳极。 在开始向电源线施加参考电位之前，点亮开关被关闭并且复位开关和驱动TFT导通，使得VRS被施加到阳极。 在该状态之后，开始对电源线施加参考电位，因此开始允许OLED发光的正常操作。