公开(公告)号：US20240304676A1

公开(公告)日：2024-09-12

申请号：US18271447

申请日：2022-01-06

申请人： SUMITOMO ELECTRIC INDUSTRIES, LTD.

发明人： Takaya MIYASE ,  Hideyuki HISANABE

IPC分类号： H01L29/32 ,  C30B25/18 ,  C30B25/20 ,  C30B29/36 ,  H01L29/16

CPC分类号： H01L29/32 ,  C30B25/183 ,  C30B25/20 ,  C30B29/36 ,  H01L29/1608

摘要： A silicon carbide epitaxial layer includes a buffer layer in contact with the silicon carbide substrate, a transition layer disposed on the buffer layer, and a drift layer disposed on the transition layer. An area density of the first defect is a first area density, and an area density of the second defect is a second area density, the first area density is 0.03/cm2 or more, and a value obtained by dividing the second area density by a sum of the first area density and the second area density is less than 2.91%. The first defect, as viewed perpendicularly to the main surface, is shaped to bifurcate from a first origin. No recessed groove is present on an imaginary line segment connecting both ends of the first defect.

公开(公告)号：US20240204059A1

公开(公告)日：2024-06-20

申请号：US18080907

申请日：2022-12-14

申请人： Intel Corporation

发明人： Pratik KOIRALA ,  Michael S. BEUMER ,  Marko RADOSAVLJEVIC ,  Han Wui THEN

IPC分类号： H01L29/32 ,  H01L29/20 ,  H01L29/205 ,  H01L29/40 ,  H01L29/778

CPC分类号： H01L29/32 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/402 ,  H01L29/7786

摘要： Gallium nitride (GaN) with interlayers for integrated circuit technology is described. In an example, an integrated circuit structure includes a substrate including silicon. A layer including gallium and nitrogen is above the substrate. The layer including gallium and nitrogen has an interlayer therein. The interlayer confines a plurality of defects to a lower portion of the layer including gallium and nitrogen.

公开(公告)号：US20240178312A1

公开(公告)日：2024-05-30

申请号：US18551263

申请日：2022-03-16

申请人： DYNAX SEMICONDUCTOR, INC.

发明人： Hui ZHANG ,  Shigiang LI

IPC分类号： H01L29/778 ,  H01L21/02 ,  H01L21/3065 ,  H01L29/20 ,  H01L29/32

CPC分类号： H01L29/7786 ,  H01L21/0254 ,  H01L21/3065 ,  H01L29/2003 ,  H01L29/32

摘要： Embodiments of the present invention relate to an epitaxial structure of a semiconductor device and a manufacturing method thereof, and a semiconductor device. The epitaxial structure of the semiconductor device comprises: a substrate; and an epitaxial layer located on one side of the substrate, the epitaxial layer comprising at least a first sub-epitaxial layer group, the first sub-epitaxial layer group comprising a first sub-epitaxial layer and a second sub-epitaxial layer arranged in stack; wherein, a surface of one side of the first sub-epitaxial layer away from the substrate comprises a plurality of first dislocation pits, and sidewalls of the first dislocation pits intersect both a plane where the first sub-epitaxial layer is located and a first direction; and the second sub-epitaxial layer covers at least the sidewalls of the first dislocation pits. In the embodiments of the present invention, most of the dislocations in the second sub-epitaxial layer that originally extended upward along the first direction will change their extension direction at the first dislocation pit, and the dislocations bend, thereby reducing most of the dislocations extending upward along the first direction, improving the uniformity of the epitaxial layer, improving crystal quality and product yield, and reducing costs.

公开(公告)号：US11996452B2

公开(公告)日：2024-05-28

申请号：US17148525

申请日：2021-01-13

申请人： FUJI ELECTRIC CO., LTD.

发明人： Motoyoshi Kubouchi

IPC分类号： H01L29/32 ,  H01L21/22 ,  H01L27/06 ,  H01L29/10 ,  H01L29/739 ,  H01L29/861

CPC分类号： H01L29/32 ,  H01L21/221 ,  H01L27/0664 ,  H01L29/1095 ,  H01L29/7397 ,  H01L29/8613

摘要： There is provided a semiconductor device including: a semiconductor substrate that has an upper surface and a lower surface and that is provided with a drift region of a first conductivity type; a trench portion that is provided to reach the drift region from the upper surface of the semiconductor substrate; and a mesa portion that is interposed between trench portions, in which the mesa portion has a base region of a second conductivity type that is provided between the drift region and the upper surface, and a first region that has a concentration peak of a hydrogen chemical concentration at a first depth position in the mesa portion.

公开(公告)号：US11952676B2

公开(公告)日：2024-04-09

申请号：US17072973

申请日：2020-10-16

申请人： GlobalWafers Co., Ltd.

发明人： Ching-Shan Lin ,  Jian-Hsin Lu ,  Chien-Cheng Liou ,  Man-Hsuan Lin

IPC分类号： H01L29/16 ,  C30B23/00 ,  C30B23/02 ,  C30B25/02 ,  C30B29/36 ,  H01L21/02 ,  H01L29/32 ,  H01L29/36

CPC分类号： C30B23/025 ,  C30B23/005 ,  C30B25/02 ,  C30B29/36 ,  H01L21/02378 ,  H01L21/02447 ,  H01L21/02507 ,  H01L21/0251 ,  H01L21/02529 ,  H01L21/02576 ,  H01L21/02631 ,  H01L29/1608 ,  H01L29/32 ,  H01L29/36

摘要： A silicon carbide crystal includes a seed layer, a bulk layer and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer and the stress buffering structure are each formed with a dopant that cycles between high and low dopant concentration. The stress buffering structure includes a plurality of stacked buffer layers and a transition layer over the buffer layers. The buffer layer closest to the seed layer has the same variation trend of the dopant concentration as the buffer layer closest to the transition layer, and the dopant concentration of the transition layer is equal to the dopant concentration of the seed layer.

公开(公告)号：US11855077B2

公开(公告)日：2023-12-26

申请号：US16228803

申请日：2018-12-21

申请人： FUJI ELECTRIC CO., LTD.

发明人： Shigeki Sato ,  Seiji Momota ,  Tadashi Miyasaka

IPC分类号： H01L27/07 ,  H01L29/10 ,  H01L29/423 ,  H01L29/417 ,  H01L29/08 ,  H01L29/861 ,  H01L29/06 ,  H01L29/32 ,  H01L29/40 ,  H01L29/739

CPC分类号： H01L27/0716 ,  H01L29/0615 ,  H01L29/0657 ,  H01L29/0847 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/41708 ,  H01L29/4236 ,  H01L29/7397 ,  H01L29/8611 ,  H01L29/8613 ,  H01L29/407

摘要： A semiconductor device is preferably excellent in characteristics such as a loss characteristic. Provided is a semiconductor device including a semiconductor substrate, including an upper-surface electrode provided on an upper surface of the semiconductor substrate; an lower-surface electrode provided on a lower surface of the semiconductor substrate; a transistor portion provided in the semiconductor substrate and connected to the upper-surface electrode and the lower-surface electrode; a first diode portion provided in the semiconductor substrate and connected to the upper-surface electrode and the lower-surface electrode; and a second diode portion provided in the semiconductor substrate and connected to the upper-surface electrode and the lower-surface electrode, wherein the first diode portion and the second diode portion have different resistivities in a depth direction of the semiconductor substrate.

公开(公告)号：US11854782B2

公开(公告)日：2023-12-26

申请号：US17847170

申请日：2022-06-23

申请人： FUJI ELECTRIC CO., LTD.

发明人： Yasunori Agata ,  Takahiro Tamura ,  Toru Ajiki

IPC分类号： H01L21/00 ,  H01L21/22 ,  H01L21/265 ,  H01L27/06 ,  H01L29/32 ,  H01L29/739 ,  H01L29/861 ,  H01L29/36

CPC分类号： H01L21/221 ,  H01L21/26526 ,  H01L27/0664 ,  H01L29/32 ,  H01L29/36 ,  H01L29/7397 ,  H01L29/8613

摘要： A semiconductor device comprising a semiconductor substrate having upper and lower surfaces and a hydrogen containing region containing hydrogen and helium is provided. The carrier concentration distribution of the hydrogen containing region has: a first local maximum point; a second local maximum point closest to the first local maximum point among local maximum points positioned between the first local maximum point and the upper surface; a first intermediate point of the local minimum between the first and second local maximum points; and a second intermediate point closest to the second local maximum point among local minimum points or flat points where the carrier concentration remains constant positioned between the second local maximum point and the upper surface. A highest point of a helium concentration peak is positioned between the first and second local maximum points. The carrier concentration is lower at the first intermediate point than the second intermediate point.

公开(公告)号：US20230407522A1

公开(公告)日：2023-12-21

申请号：US18337493

申请日：2023-06-20

申请人： AXT, Inc.

发明人： Rajaram Shetty ,  Weiguo Liu ,  Morris Young

IPC分类号： C30B29/42 ,  C30B11/00 ,  H01L29/36 ,  H01L29/20 ,  H01L29/32

CPC分类号： C30B29/42 ,  C30B11/006 ,  H01L29/36 ,  H01L29/20 ,  H01L29/32 ,  C30B11/002 ,  H01L29/30

摘要： Methods and systems for low etch pit density 6 inch semi-insulating gallium arsenide wafers may include a semi-insulating gallium arsenide single crystal wafer having a diameter of 6 inches or greater without intentional dopants for reducing dislocation density, an etch pit density of less than 1000 cm−2, and a resistivity of 1×107 Ω-cm or more. The wafer may have an optical absorption of less than 5 cm−1 less than 4 cm−1 or less than 3 cm−1 at 940 nm wavelength. The wafer may have a carrier mobility of 3000 cm2/V-sec or higher. The wafer may have a thickness of 500 μm or greater. Electronic devices may be formed on a first surface of the wafer. The wafer may have a carrier concentration of 1.1×107 cm−3 or less.

公开(公告)号：US20230361111A1

公开(公告)日：2023-11-09

申请号：US18353907

申请日：2023-07-18

申请人： FUJI ELECTRIC CO., LTD.

发明人： Tatsuya NAITO

IPC分类号： H01L27/06 ,  H01L21/76 ,  H01L27/07 ,  H01L29/08 ,  H01L29/36 ,  H01L29/40 ,  H01L29/861 ,  H01L29/423 ,  H01L29/78 ,  H01L29/739 ,  H01L21/765 ,  H01L29/06 ,  H01L29/10 ,  H01L29/32

CPC分类号： H01L27/0635 ,  H01L21/76 ,  H01L27/0727 ,  H01L29/0834 ,  H01L29/36 ,  H01L29/405 ,  H01L29/407 ,  H01L29/404 ,  H01L29/8613 ,  H01L29/4238 ,  H01L29/78 ,  H01L29/739 ,  H01L21/765 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/7397 ,  H01L29/8611

摘要： A semiconductor device includes a semiconductor substrate having a first conductivity type drift region and a second conductivity type base region above the drift region, trench portions at an upper surface of the semiconductor substrate arrayed parallel to one another, each of them penetrating the base region, and mesa portions between respective trench portions. Among the mesa portions, at least one mesa portion includes a first conductivity type first semiconductor region having a higher concentration than the drift region, a second conductivity type second semiconductor region having a higher concentration than the base region, and a first conductivity type accumulation region between the base and drift regions and has a higher concentration than the drift region. The drift region does not extend above the accumulation region. In a longitudinal direction of the trench portions, the accumulation region extends beyond an end portion of the first semiconductor region.

公开(公告)号：US20230360915A1

公开(公告)日：2023-11-09

申请号：US18355426

申请日：2023-07-20

申请人： FUJI ELECTRIC CO., LTD.

发明人： Yasunori AGATA ,  Takashi YOSHIMURA ,  Hiroshi TAKISHITA ,  Misaki MEGURO ,  Naoko KODAMA ,  Yoshihiro IKURA ,  Seiji NOGUCHI ,  Yuichi HARADA ,  Yosuke SAKURAI

IPC分类号： H01L21/22 ,  H01L21/265 ,  H01L21/268 ,  H01L27/06 ,  H01L29/06 ,  H01L29/10 ,  H01L29/32 ,  H01L29/40 ,  H01L29/66 ,  H01L29/739 ,  H01L29/861

CPC分类号： H01L21/221 ,  H01L21/26526 ,  H01L21/268 ,  H01L27/0664 ,  H01L29/0623 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/404 ,  H01L29/66348 ,  H01L29/7397 ,  H01L29/8613

摘要： A semiconductor device including a semiconductor substrate having an upper surface and a lower surface is provided. In a depth direction connecting the upper and lower surfaces of the semiconductor substrate, a donor concentration distribution includes a first donor concentration peak at a first depth, a second donor concentration peak at a second depth between the first donor concentration peak and the upper surface, a flat region between the first donor concentration peak and the second donor concentration peak, and a plurality of donor concentration peaks between the first donor concentration peak and the lower surface. The second donor concentration peak has a lower concentration than the first donor concentration peak. The donor concentration distribution in the flat region is substantially flat. The thickness of the flat region in the depth direction is 10% or more of the thickness of the semiconductor substrate.