公开(公告)号：US20150154928A1

公开(公告)日：2015-06-04

申请号：US14615410

申请日：2015-02-05

Applicant: Japan Display Inc.

Inventor： Hiroyuki ABE ,  Masahiro MAKI ,  Takayuki SUZUKI

IPC: G09G3/36 ,  G11C19/28

CPC classification number: G09G3/3677 ,  G09G1/005 ,  G09G2310/0283 ,  G09G2310/0286 ,  G11C19/28

Abstract: A display device includes a first-stage output circuit adapted to perform output to a first-stage output signal line as an endmost output signal line out of a plurality of output signal lines disposed in parallel to each other, and the first-stage output circuit includes a start signal line to which a start signal for applying a conducting potential sequentially to the plurality of output signal lines is applied, a first clock signal line to which a first clock signal is applied, a second clock signal line to which a second clock signal is applied, a first transistor having a source to which the first-stage output signal line is connected, and a drain to which the first clock signal line is connected, and a second transistor having a gate to which the start signal line is connected.

Abstract translation: 显示装置包括：第一级输出电路，其适于对作为彼此并联布置的多个输出信号线中的最终输出信号线的第一级输出信号线进行输出;以及第一级输出电路 包括起始信号线，向该多个输出信号线顺序施加用于施加导通电位的开始信号，施加第一时钟信号的第一时钟信号线，第二时钟信号线，第二时钟信号线 信号被施加，具有连接第一级输出信号线的源极和与第一时钟信号线连接的漏极的第一晶体管和具有连接起始信号线的栅极的第二晶体管 。

公开(公告)号：US20250095600A1

公开(公告)日：2025-03-20

申请号：US18965069

申请日：2024-12-02

Applicant: Japan Display Inc.

Inventor： Takayuki SUZUKI ,  Hiroyuki ABE

IPC: G09G3/36 ,  G02F1/1345 ,  G02F1/1362 ,  G02F1/1368 ,  G11C19/28

Abstract: A display device with a variant-shape display region other than the rectangular display region is configured to form a scanning line drive circuit along the variant-shape display region. The scanning line drive circuit includes bus wiring group with clock wiring for supplying clocks with three or more phases and the power supply wiring for supplying power, and the unit circuits for configuring the shift register including five or more transistors. The bus wiring and the unit circuits are formed on the different regions so as not to cross with one another.

公开(公告)号：US20240332318A1

公开(公告)日：2024-10-03

申请号：US18594349

申请日：2024-03-04

Applicant: Japan Display Inc.

Inventor： Akihiko SAITOH ,  Hiroyuki ABE

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: H01L27/1244 ,  G02F1/136209 ,  G02F1/136286 ,  G02F1/1368

Abstract: According to one embodiment, an array substrate includes signal lines and a switch circuit. The signal lines include first and second signal lines. The switch circuit includes a circuit unit including first and second transistors, a first input line, first and second select lines, a first output line which intersects with the first select line, and a second output line which intersects with the first select line. A first intersection of the first output line which intersects with the first select line and a second intersection of the second output line which intersects with the first select line are formed in different layers.

公开(公告)号：US20230251539A1

公开(公告)日：2023-08-10

申请号：US18302284

申请日：2023-04-18

Applicant: Japan Display Inc.

Inventor： Hiroyuki ABE ,  Kentaro AGATA

IPC: G02F1/1362 ,  G02F1/1333 ,  G02F1/1339 ,  G09G3/36 ,  G02F1/1345

CPC classification number: G02F1/136286 ,  G02F1/1339 ,  G02F1/1345 ,  G02F1/13452 ,  G02F1/133345 ,  G09G3/3688 ,  G02F1/13454 ,  G02F1/13456 ,  G02F1/13458 ,  G02F1/13629 ,  G02F1/136295 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2300/0452 ,  G09G2310/0297

Abstract: It is possible to reduce a size of a lower frame region to ensure a wiring corrosion margin equivalent to that of a conventional technique. In a display device, a video signal wiring arranged in the lower frame region includes, in a region between a terminal section (terminal) and a video signal line, a first wiring formed on a first wiring layer and having one end connected to the terminal section to which a video signal line driving circuit is connected, a second wiring formed on a second wiring layer different from the first wiring layer and having one end connected to the other end of the first wiring, and a third wiring formed on the first wiring layer and having one end connected to the other end of the second wiring. The other end of the third wiring is connected to the video signal line via a fourth wiring formed on the second wiring layer, and the first wiring layer is formed on the side closer to an array substrate than to the second wiring layer.

公开(公告)号：US20220397785A1

公开(公告)日：2022-12-15

申请号：US17834514

申请日：2022-06-07

Applicant: Japan Display Inc.

Inventor： Akihiko SAITOH ,  Hiroyuki ABE ,  Masateru MORIMOTO

IPC: G02F1/1333 ,  G06V40/13 ,  G02F1/1343

Abstract: According to one embodiment, a display device includes a first substrate, a second substrate and a liquid crystal layer. The first substrate includes a base material, a sensor including a photoelectric conversion element outputting a detection signal based on incident light from a liquid crystal layer side, and a first line electrically connected to the sensor. The pixel includes a first subpixel, a second subpixel and a third subpixel. The photoelectric conversion element is provided in an area in which the third subpixel is located. The first line includes a first branch portion overlapping the photoelectric conversion element and including an opening, and a second branch portion overlapping a through-hole provided such that the first line is electrically connected to the sensor.

公开(公告)号：US20210110780A1

公开(公告)日：2021-04-15

申请号：US17132349

申请日：2020-12-23

Applicant: Japan Display Inc.

Inventor： Takayuki SUZUKI ,  Hiroyuki ABE

IPC: G09G3/36 ,  G02F1/1345 ,  G11C19/28 ,  G02F1/1368

Abstract: A display device with a variant-shape display region other than the rectangular display region is configured to form a scanning line drive circuit along the variant-shape display region. The scanning line drive circuit includes bus wiring group with clock wiring for supplying clocks with three or more phases and the power supply wiring for supplying power, and the unit circuits for configuring the shift register including five or more transistors. The bus wiring and the unit circuits are formed on the different regions so as not to cross with one another.

公开(公告)号：US20200241347A1

公开(公告)日：2020-07-30

申请号：US16850311

申请日：2020-04-16

Applicant: Japan Display Inc.

Inventor： Hiroyuki ABE ,  Kentaro AGATA ,  Masaki MURASE ,  Kazune MATSUMURA

IPC: G02F1/1345 ,  H05K9/00 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/12

Abstract: In an IPS-mode liquid crystal display device, the area of a terminal portion is decreased. A liquid crystal display device includes a TFT substrate and a counter substrate attached to the TFT substrate with a sealing material, and includes a display region and a terminal portion formed on the TFT substrate. A shielding transparent conductive film is formed on the outer side of the counter substrate. On the terminal portion, an earth pad formed with a transparent conductive film is formed on an organic passivation film. The shielding transparent conductive film is connected to the earth pad through a conductor. Below organic passivation film of the terminal portion, a wire is formed.

公开(公告)号：US20200174331A1

公开(公告)日：2020-06-04

申请号：US16782223

申请日：2020-02-05

Applicant: Japan Display Inc.

Inventor： Takayuki SUZUKI ,  Hiroyuki ABE

IPC: G02F1/1362 ,  H01L27/12 ,  G02F1/1368 ,  G02F1/1333 ,  G02F1/133 ,  G09G3/36 ,  G02F1/1345

Abstract: A liquid crystal display device having an outer shape of a display region formed other than a rectangle. A driver for supplying a video signal is disposed outside the display region. A selector with selector TFT is disposed between the display region and the driver. A video signal line is disposed between the driver and the selector, and a drain line is disposed between the selector and the display region. A scanning circuit for supplying a scanning signal to the scanning line is disposed outside the display region. The selector is disposed between the scanning line and the display region, and covered with ITO as the common electrode. The common bus wiring is disposed outside the selector.

公开(公告)号：US20200166816A1

公开(公告)日：2020-05-28

申请号：US16774424

申请日：2020-01-28

Applicant: Japan Display Inc

Inventor： Hiroyuki ABE ,  Kentaro AGATA

IPC: G02F1/1362 ,  G02F1/1333 ,  G02F1/1339 ,  G09G3/36 ,  G02F1/1345

Abstract: It is possible to reduce a size of a lower frame region to ensure a wiring corrosion margin equivalent to that of a conventional technique. In a display device, a video signal wiring arranged in the lower frame region includes, in a region between a terminal section (terminal) and a video signal line, a first wiring formed on a first wiring layer and having one end connected to the terminal section to which a video signal line driving circuit is connected, a second wiring formed on a second wiring layer different from the first wiring layer and having one end connected to the other end of the first wiring, and a third wiring formed on the first wiring layer and having one end connected to the other end of the second wiring. The other end of the third wiring is connected to the video signal line via a fourth wiring formed on the second wiring layer, and the first wiring layer is formed on the side closer to an array substrate than to the second wiring layer.

公开(公告)号：US20200019031A1

公开(公告)日：2020-01-16

申请号：US16508989

申请日：2019-07-11

Applicant: Japan Display Inc.

Inventor： Gen KOIDE ,  Hiroyuki ABE ,  Kazune MATSUMURA

IPC: G02F1/1362 ,  G09G3/36

Abstract: According to an aspect, a display device includes: a first substrate having a first side and a second side opposed to the first side; a display region provided with pixels; a first partial peripheral region between the first side and the display region; a second partial peripheral region between the second side and the display region; a plurality of signal lines configured to supply signals to switching elements in the pixels; a plurality of first terminals provided in the first partial peripheral region and configured to be electrically coupled to a driver integrated circuit; a plurality of second terminals provided in the second partial peripheral region and configured to be supplied with signals for inspection; and a first coupling circuit provided between the first terminals and the display region in the first partial peripheral region and configured to switch between coupling and decoupling the signal lines and the second terminals.