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408 条记录 (耗时 0.023 秒)

    Polysilicon control etch-back indicator
    51.
    发明授权
    Polysilicon control etch-back indicator 有权
    多晶硅控制回蚀指示器

    公开(公告)号：US07632733B2

    公开(公告)日：2009-12-15

    申请号：US11413248

    申请日：2006-04-29

    申请人： Yu Wang ,  Tiesheng Li ,  Sung-Shan Tai ,  Hong Chang

    发明人： Yu Wang ,  Tiesheng Li ,  Sung-Shan Tai ,  Hong Chang

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7813 ,  H01L22/12 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/66734 ,  H01L2924/0002 ,  H01L2924/00

    摘要： This invention discloses a semiconductor wafer for manufacturing electronic circuit thereon. The semiconductor substrate further includes an etch-back indicator that includes trenches of different sizes having polysilicon filled in the trenches and then completely removed from some of the trenches of greater planar trench dimensions and the polysilicon still remaining in a bottom portion in some of the trenches having smaller planar trench dimensions.

    摘要翻译： 本发明公开了一种用于在其上制造电子电路的半导体晶片。 半导体衬底还包括回蚀指示器，其包括不同尺寸的沟槽，其具有填充在沟槽中的多晶硅，然后从更大的平面沟槽尺寸的一些沟槽中完全去除，并且多晶硅仍保留在一些沟槽中的底部 具有较小的平面沟槽尺寸。

    RESISTANCE-BASED ETCH DEPTH DETERMINATION FOR SGT TECHNOLOGY
    54.
    发明申请
    RESISTANCE-BASED ETCH DEPTH DETERMINATION FOR SGT TECHNOLOGY 有权
    用于SGT技术的基于电阻的蚀刻深度测定

    公开(公告)号：US20090166621A1

    公开(公告)日：2009-07-02

    申请号：US12399632

    申请日：2009-03-06

    申请人： Tiesheng Li ,  Yu Wang ,  Yingying Lou ,  Anup Bhalla

    发明人： Tiesheng Li ,  Yu Wang ,  Yingying Lou ,  Anup Bhalla

    IPC分类号： H01L23/58

    CPC分类号： H01L22/34 ,  H01L22/12 ,  H01L22/14 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method for determining the depth etch, a method of forming a shielded gate trench (SGT) structure and a semiconductor device wafer are disclosed. A material layer is formed over part of a substrate having a trench. The material fills the trench. A resist mask is placed over a test portion of the material layer thereby defining a test structure that lies underneath the resist mask. The resist mask does not cover the trench. The material is isotropically etched and a signal related to a resistance change of the test structure is measured. A lateral undercut DL of the test structure is determined from the signal and an etch depth DT is determined from DL. The wafer may comprise one or more test structures forming a bridge circuit; one or more metal contacts that electrically connect the test structures through contact holes: and resist layer including over the test structures.

    摘要翻译： 公开了一种用于确定深度蚀刻的方法，形成屏蔽栅沟槽（SGT）结构的方法和半导体器件晶片。 在具有沟槽的衬底的一部分上形成材料层。 材料填充沟槽。 将抗蚀剂掩模放置在材料层的测试部分上，从而限定位于抗蚀剂掩模下方的测试结构。 抗蚀剂掩模不覆盖沟槽。 该材料被各向同性地蚀刻并且测量与测试结构的电阻变化相关的信号。 从信号确定测试结构的横向底切DL，并且从DL确定蚀刻深度DT。 晶片可以包括形成桥接电路的一个或多个测试结构; 通过接触孔将测试结构电连接的一个或多个金属触点和包括在测试结构上的抗蚀剂层。

    Automatically identifying unique language independent keys correlated with appropriate text strings of various locales by key search
    55.
    发明申请
    Automatically identifying unique language independent keys correlated with appropriate text strings of various locales by key search 失效
    通过关键搜索自动识别与各种语言环境的适当文本字符串相关的独特语言独立键

    公开(公告)号：US20090030673A1

    公开(公告)日：2009-01-29

    申请号：US11828695

    申请日：2007-07-26

    申请人： Al Chakra ,  John F. Sefler ,  Teppei Tsurumi ,  Yu Wang ,  Morgan Louis Johnson

    发明人： Al Chakra ,  John F. Sefler ,  Teppei Tsurumi ,  Yu Wang ,  Morgan Louis Johnson

    IPC分类号： G06F17/20

    CPC分类号： G06F9/454

    摘要： A method, system and computer program product for automatically identifying unique language independent keys. A “key search” is performed which searches for various language independent keys in a properties file associated with a value or text string entered in a first locale. A second locale is suggested to narrow the number of language independent keys displayed in connection with the value entered in the first locale. Upon receiving the value for the second locale, another key search is performed, where this key search is performed on the language independent keys displayed in connection with the first value entered in association with the first locale. A unique language independent key may be identified based on this subsequent key search. By performing key searches and suggesting a second locale to narrow the number of language independent keys, the time in identifying a unique language independent key is reduced and efficiency is improved.

    摘要翻译： 一种用于自动识别独特的独立密钥的方法，系统和计算机程序产品。 执行“键搜索”，其搜索与在第一区域设置中输入的值或文本串相关联的属性文件中的各种与语言无关的键。 建议第二个区域设置来缩小与第一个区域设置中输入的值相关的显示的独立语言密钥的数量。 在接收到第二区域的值时，执行另一个键搜索，其中对与第一语言环境相关联地输入的第一值显示的与语言无关的键执行该键搜索。 可以基于该随后的密钥搜索来识别独特的语言独立密钥。 通过执行关键搜索并建议第二语言环境以缩小语言无关键的数量，减少了识别独特语言的密钥的时间并提高了效率。

    RESISTANCE-BASED ETCH DEPTH DETERMINATION FOR SGT TECHNOLOGY
    56.
    发明申请
    RESISTANCE-BASED ETCH DEPTH DETERMINATION FOR SGT TECHNOLOGY 有权
    用于SGT技术的基于电阻的蚀刻深度测定

    公开(公告)号：US20080272371A1

    公开(公告)日：2008-11-06

    申请号：US11690581

    申请日：2007-03-23

    申请人： Tiesheng Li ,  Yu Wang ,  Yingying Lou ,  Anup Bhalla

    发明人： Tiesheng Li ,  Yu Wang ,  Yingying Lou ,  Anup Bhalla

    IPC分类号： H01L23/58

    CPC分类号： H01L22/34 ,  H01L22/12 ,  H01L22/14 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method for determining the depth etch, a method of forming a shielded gate trench (SGT) structure and a semiconductor device wafer are disclosed. A material layer is formed over part of a substrate having a trench. The material fills the trench. A resist mask is placed over a test portion of the material layer thereby defining a test structure that lies underneath the resist mask. The resist mask does not cover the trench. The material is isotropically etched and a signal related to a resistance change of the test structure is measured. A lateral undercut DL of the test structure is determined from the signal and an etch depth DT is determined from DL. The wafer may comprise one or more test structures forming a bridge circuit; one or more metal contacts that electrically connect the test structures through contact holes: and resist layer including over the test structures.

    摘要翻译： 公开了一种用于确定深度蚀刻的方法，形成屏蔽栅沟槽（SGT）结构的方法和半导体器件晶片。 在具有沟槽的衬底的一部分上形成材料层。 材料填充沟槽。 将抗蚀剂掩模放置在材料层的测试部分上，从而限定位于抗蚀剂掩模下方的测试结构。 抗蚀剂掩模不覆盖沟槽。 该材料被各向同性地蚀刻并且测量与测试结构的电阻变化相关的信号。 根据信号确定测试结构的横向底切D L L，并且从D L确定蚀刻深度D T T。 晶片可以包括形成桥接电路的一个或多个测试结构; 通过接触孔将测试结构电连接的一个或多个金属触点和包括在测试结构上的抗蚀剂层。

    Powder coating for generator stator bar end fitting and method for applying the powder coating
    57.
    发明授权
    Powder coating for generator stator bar end fitting and method for applying the powder coating 失效
    发电机定子棒末端配件用粉末涂料及粉末涂料施工方法

    公开(公告)号：US07417341B2

    公开(公告)日：2008-08-26

    申请号：US11594872

    申请日：2006-11-09

    申请人： Waheed Tony Mall ,  Roderick Mark Lusted ,  Yu Wang

    发明人： Waheed Tony Mall ,  Roderick Mark Lusted ,  Yu Wang

    IPC分类号： H02K9/00

    CPC分类号： H02K3/44 ,  H02K15/0093 ,  H02K15/12 ,  Y10T29/49009

    摘要： A method of sealing a generator stator bar and a stator bar end fitting receiving the end including the steps of: brazing the fitting to the end of the stator bar with a braze material; applying a powder coating material to the end of the stator bar in the fitting; and curing the powder coating material to form a barrier coating on the end of the stator bar and the adjoining interior surfaces of the fitting.

    摘要翻译： 一种密封发电机定子杆和接收端部的定子杆端配件的方法，包括以下步骤：用铜焊材料将配件钎焊到定子棒的端部; 将粉末涂料施加到配件中的定子棒的端部; 并固化粉末涂料以在定子棒的端部和配件的相邻内表面上形成阻挡涂层。