公开(公告)号：US08149633B2

公开(公告)日：2012-04-03

申请号：US13185043

申请日：2011-07-18

申请人： Khil-Ohk Kang

发明人： Khil-Ohk Kang

IPC分类号： G11C7/00 ,  G11C8/00

CPC分类号： G11C29/48 ,  G11C29/1201

摘要： A semiconductor memory device is provided which includes a voltage detecting unit configured to compare a target voltage level with a fed-back internal voltage to output a detection signal in a normal mode, a driving unit configured to selectively drive an internal voltage terminal to a first or second power supply voltage according to an operation mode in response to the detection signal, and an enable control unit configured to control the driving unit in response to a control signal corresponding to the operation mode.

摘要翻译： 提供一种半导体存储器件，其包括：电压检测单元，被配置为将目标电压电平与反馈内部电压进行比较，以在正常模式下输出检测信号;驱动单元，被配置为选择性地将内部电压端子驱动到第一 或第二电源电压，以及响应于与操作模式相对应的控制信号来配置为控制驱动单元的使能控制单元。

公开(公告)号：US07969136B2

公开(公告)日：2011-06-28

申请号：US11987936

申请日：2007-12-06

申请人： Khil-Ohk Kang ,  Sang-Jin Byeon

发明人： Khil-Ohk Kang ,  Sang-Jin Byeon

IPC分类号： G05F3/30

CPC分类号： G05F3/30 ,  G11C5/143 ,  G11C5/147 ,  G11C7/04

摘要： A semiconductor device includes: a first reference voltage generator for generating a first reference voltage; a first band gap circuit for dividing a voltage at a second reference voltage output node to produce a first and a second band gap voltages having a property relative to temperature variations; a first comparator for receiving the first reference voltage as a bias input and comparing the first band gap voltage with the second band gap voltage; and a first driver for pull-up driving the second reference voltage output node in response to an output signal of the first comparator.

摘要翻译： 半导体器件包括：用于产生第一参考电压的第一参考电压发生器; 第一带隙电路，用于分割第二参考电压输出节点处的电压，以产生具有相对于温度变化的性质的第一和第二带隙电压; 第一比较器，用于接收第一参考电压作为偏置输入，并将第一带隙电压与第二带隙电压进行比较; 以及用于响应于第一比较器的输出信号上拉驱动第二参考电压输出节点的第一驱动器。

公开(公告)号：US07961531B2

公开(公告)日：2011-06-14

申请号：US12134825

申请日：2008-06-06

申请人： Woo-Seung Han ,  Khil-Ohk Kang

发明人： Woo-Seung Han ,  Khil-Ohk Kang

IPC分类号： G11C5/14

CPC分类号： G11C5/145

摘要： Herein, a voltage sensing circuit, which is capable of controlling a pumping voltage to be stably generated in a low voltage environment, is provided. The voltage sensing circuit includes a current mirror having first and second terminals, a first switching element configured to control current on the first terminal of the current mirror by a reference voltage, a second switching element configured to control current from the second terminal of the current mirror in response to a pumping voltage, and a third switching element configured to control current sources of the first and second switching elements to receive a negative voltage.

摘要翻译： 这里，提供了能够在低电压环境下稳定地产生泵浦电压的电压检测电路。 电压检测电路包括具有第一和第二端子的电流镜，第一开关元件，被配置为通过参考电压来控制电流镜的第一端子上的电流;第二开关元件，被配置为控制来自电流的第二端子的电流 响应于泵浦电压反射镜;以及第三开关元件，其被配置为控制第一和第二开关元件的电流源以接收负电压。

公开(公告)号：US07684269B2

公开(公告)日：2010-03-23

申请号：US11967582

申请日：2007-12-31

申请人： Khil-Ohk Kang

发明人： Khil-Ohk Kang

IPC分类号： G11C29/00

CPC分类号： G11C29/48 ,  G11C29/021 ,  G11C29/1201

摘要： A semiconductor memory device is capable of measuring internal voltages via a shared pad to reduce a chip size. The semiconductor memory device includes a selector and a monitoring pad. The selector is configured to select one of a plurality of internal signals in response to a test signal and output the selected internal signal. The monitoring pad is configured to output an output signal of the selector to an outside of the semiconductor memory device.

摘要翻译： 半导体存储器件能够通过共享焊盘测量内部电压以减小芯片尺寸。 半导体存储器件包括选择器和监视器。 选择器被配置为响应于测试信号选择多个内部信号之一并输出所选择的内部信号。 监视焊盘被配置为将选择器的输出信号输出到半导体存储器件的外部。

公开(公告)号：US07623393B2

公开(公告)日：2009-11-24

申请号：US11819633

申请日：2007-06-28

申请人： Khil-Ohk Kang

发明人： Khil-Ohk Kang

IPC分类号： G11C5/14

CPC分类号： G11C5/14

摘要： A semiconductor memory apparatus includes: a driving controller that decodes bank activating signals to generate a plurality of driving control signals, activates some of the driving control signals, and outputs the activated driving signals; and a plurality of internal voltage generators each of which outputs an internal voltage in response to a reference voltage and the corresponding driving control signal and is disposed between two different banks among a plurality of banks.

摘要翻译： 半导体存储装置包括：驱动控制器，其对存储体激活信号进行解码以产生多个驱动控制信号，激活一些驱动控制信号，并输出激活的驱动信号; 以及多个内部电压发生器，每个内部电压发生器响应于参考电压和相应的驱动控制信号输出内部电压并且被布置在多个存储体中的两个不同的存储体之间。

公开(公告)号：US07583548B2

公开(公告)日：2009-09-01

申请号：US11822655

申请日：2007-07-09

申请人： Khil-Ohk Kang

发明人： Khil-Ohk Kang

IPC分类号： G11C7/02

CPC分类号： G11C11/406 ,  G11C7/08 ,  G11C11/40618 ,  G11C11/4091 ,  G11C2207/065 ,  G11C2211/4065

摘要： A semiconductor memory apparatus includes an active signal generation unit that generates a plurality of active signals having different enable timings in response to a refresh signal, a precharge signal generation unit that delays at least one of the active signals to generate at least one precharge signal for enabling at least two equalizer signals at the same time, and a sense amplifier driver control unit that generates the plurality of equalizer signals for controlling individual sense amplifier drivers in response to the plurality of active signals and the precharge signal.

摘要翻译： 一种半导体存储装置，包括有源信号生成单元，其响应于刷新信号生成具有不同的使能定时的多个有源信号;预充电信号生成单元，其延迟至少一个有源信号以生成至少一个预充电信号， 同时实现至少两个均衡器信号;以及读出放大器驱动器控制单元，其响应于所述多个有源信号和预充电信号而产生用于控制各个读出放大器驱动器的多个均衡器信号。

公开(公告)号：US20090122634A1

公开(公告)日：2009-05-14

申请号：US12169591

申请日：2008-07-08

申请人： Khil-Ohk Kang

发明人： Khil-Ohk Kang

IPC分类号： G11C5/14

CPC分类号： G11C5/147

摘要： A reference voltage supplying circuit can include an internal reference voltage generating unit configured to generate an internal reference voltage, a pad configured to receive an external reference voltage, a switching unit selectively configured to supply the internal reference voltage or the external reference voltage to an internal voltage generator in a test mode.

摘要翻译： 参考电压提供电路可以包括内部参考电压产生单元，其被配置为产生内部参考电压，被配置为接收外部参考电压的焊盘，选择性地被配置为将内部参考电压或外部参考电压提供给内部参考电压的开关单元 电压发生器处于测试模式。

公开(公告)号：US20080298141A1

公开(公告)日：2008-12-04

申请号：US12187841

申请日：2008-08-07

申请人： Khil-Ohk Kang

发明人： Khil-Ohk Kang

IPC分类号： G11C7/00 ,  G11C8/00

CPC分类号： G11C5/145 ,  G11C7/06 ,  G11C7/12 ,  G11C11/4074 ,  G11C11/4091

摘要： A semiconductor memory device includes a bit line sense amplifier for sensing and amplifying data applied on a bit line; a first driver for driving a pull-up voltage line of the bit line sense amplifier to a voltage applied on a normal driving voltage terminal; an overdriving signal generator for generating an overdriving signal defining an overdriving period in response to an active command; an overdriving control signal generator for receiving the overdriving signal to generate an overdriving control signal for selectively performing an overdriving operation according to a voltage level of an overdriving voltage; and a second driver for driving the normal driving voltage terminal to the overdriving voltage in response to the overdriving control signal.

摘要翻译： 一种半导体存储器件包括用于感测和放大施加在位线上的数据的位线读出放大器; 用于将位线读出放大器的上拉电压线驱动到施加在正常驱动电压端子上的电压的第一驱动器; 过驱动信号发生器，用于产生响应于有效命令定义过驱动周期的过驱动信号; 过驱动控制信号发生器，用于接收过驱动信号以产生过驱动控制信号，用于根据过驱动电压的电压电平选择性地执行过驱动; 以及用于响应于过驱动控制信号将正常驱动电压端驱动到过驱动电压的第二驱动器。

公开(公告)号：US20080225610A1

公开(公告)日：2008-09-18

申请号：US12003683

申请日：2007-12-31

申请人： Khil-Ohk Kang

发明人： Khil-Ohk Kang

IPC分类号： G11C7/00

CPC分类号： G11C7/1078 ,  G11C7/1048 ,  G11C7/1096

摘要： A write driver of a semiconductor memory device over drives a local input/output line at a write operation in order to transmit data provided in a global input/output line to a core area at a stable voltage level. Therefore the write driver charges a stable voltage level corresponding to data inputted at the write operation in a cell capacitor. The write driver includes a pull-up/pull-down driver for pull-up/pull-down driving a second data line depending on data loaded on a first data line, a pulse generation circuit for generating pull-up over driving pulses activated for a predetermined time period at the initial time of an interval that the second data line is pull-up driven, and an over driver for pull-up driving the second data line by an over driving voltage higher than a pull-up voltage of the pull-up/pull-down driver in response to the pull-up over driving pulses.

摘要翻译： 半导体存储器件的写驱动器在写操作时驱动本地输入/输出线，以便以稳定的电压电平将全局输入/输出线中提供的数据发送到核心区域。 因此，写入驱动器对与在单元电容器中的写入操作期间输入的数据相对应的稳定电压电平进行充电。 写入驱动器包括用于根据加载在第一数据线上的数据上拉/下拉驱动第二数据线的上拉/下拉驱动器，用于产生上拉驱动脉冲的脉冲产生电路 在第二数据线被上拉驱动的间隔的初始时间的预定时间段，以及用于上拉驱动第二数据线的过驱动器，该驱动电压高于拉动的上拉电压 响应于上拉驱动脉冲的上/下拉驱动器。

公开(公告)号：US20080219073A1

公开(公告)日：2008-09-11

申请号：US12003547

申请日：2007-12-28

申请人： Khil-Ohk Kang

发明人： Khil-Ohk Kang

IPC分类号： G11C7/06

CPC分类号： G11C11/4091 ,  G11C7/08

摘要： A semiconductor memory device can stabilize a voltage level of a normal driving voltage terminal in a normal driving operation, which is performed after an overdriving operation, even when an overdriving voltage is unstable due to environmental factors of the semiconductor memory device in the overdriving operation. The semiconductor memory device includes a bit line sense amplifier for performing an amplification operation using a normal driving voltage or an overdriving voltage to sense and amplify data applied to bit lines, a normal driving voltage compensator configured to drive a normal driving voltage terminal according to a voltage level of the normal driving voltage terminal and target normal driving voltage levels, and a discharge enable signal generator configured to generate a discharge enable signal by adjusting an activation period of the discharge enable signal according to the overdriving voltage.

摘要翻译： 半导体存储器件即使在过驱动操作中由于半导体存储器件的环境因素导致过驱动电压不稳定，也能够在过驱动之后执行的正常驱动操作中稳定正常驱动电压端子的电压电平。 半导体存储器件包括：位线读出放大器，用于使用正常驱动电压或过驱动电压进行放大操作，以检测和放大施加到位线的数据;正常驱动电压补偿器，被配置为驱动正常驱动电压端子， 正常驱动电压端子的电压电平和目标正常驱动电压电平，以及放电使能信号发生器，被配置为通过根据过驱动电压调节放电使能信号的激活周期来产生放电使能信号。