公开(公告)号：US20110258372A1

公开(公告)日：2011-10-20

申请号：US13140887

申请日：2010-07-27

申请人： Masayuki Toyama ,  Hirokazu So

发明人： Masayuki Toyama ,  Hirokazu So

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F3/0613 ,  G06F3/064 ,  G06F3/0679 ,  G06F2212/7202 ,  G11B27/034 ,  G11B27/105 ,  G11B2220/61 ,  H04N5/76 ,  H04N21/4147 ,  H04N21/4184

摘要： A memory device, a host device, and a memory system enable real-time recording of a plurality of files of data while preventing the buffer size of a host device from increasing. A memory device (1) has first and second data write modes. A host device (2) uses the second data write mode when recording a plurality of files of data. In accordance with a command provided from the host device (2), the memory device (1) relocates data that has been written in the second data write mode in a manner that the data is arranged in the same state as when the data is written in the first data write mode.

摘要翻译： 存储器装置，主机装置和存储器系统能够实现多个数据文件的实时记录，同时防止主机装置的缓冲器大小增加。 存储器件（1）具有第一和第二数据写入模式。 当记录多个数据文件时，主机设备（2）使用第二数据写入模式。 根据从主设备（2）提供的命令，存储设备（1）以与数据写入相同的状态将数据重新定位为以第二数据写入模式写入的数据 在第一个数据写入模式。

公开(公告)号：US20110225370A1

公开(公告)日：2011-09-15

申请号：US13130360

申请日：2010-08-10

申请人： Hirokazu So ,  Takuji Maeda ,  Masayuki Toyama

发明人： Hirokazu So ,  Takuji Maeda ,  Masayuki Toyama

IPC分类号： G06F12/08

CPC分类号： G06F12/0246 ,  G06F12/0868 ,  G06F12/0893

摘要： When multiple pieces of content data are being recorded continuously to a nonvolatile storage device having page cache function, a preparation time before starting next content data recording is reduced. When a cache releasing section of a nonvolatile storage device (1) receives cache releasing from an access device (2), it releases addresses included in one logical block among multiple addresses which are cache objects at the same time. Further, the nonvolatile storage device (1) includes a cache information outputting section which outputs information regarding a time period required for releasing addresses which are cache objects outside, and the access device (2) refers to the information to select the address to be an object of releasing.

摘要翻译： 当多条内容数据被连续地记录到具有页面缓存功能的非易失性存储装置时，减少开始下一内容数据记录之前的准备时间。 当非易失性存储设备（1）的缓存释放部分从接入设备（2）接收缓存释放时，它同时释放多个地址之中包含在一个逻辑块中的地址。 此外，非易失性存储装置（1）具有高速缓存信息输出部，其输出关于释放作为外部的高速缓存对象的地址所需的时间的信息，并且，访问装置（2）参照将该地址选择为 释放对象

公开(公告)号：US20110167208A1

公开(公告)日：2011-07-07

申请号：US13061731

申请日：2010-05-14

申请人： Hirokazu So ,  Masayuki Toyama

发明人： Hirokazu So ,  Masayuki Toyama

IPC分类号： G06F12/00

CPC分类号： G06F12/0246

摘要： The nonvolatile memory device prevents data writing from temporarily slowing down significantly in the middle of writing data to a block when an access device writes all the data in the block in units of a smaller size than the block. The nonvolatile memory device (100) comprises a memory controller (110) including an interface unit (101) configured to receive a first command that identifies a first write range for writing data, and a second command that identifies a second write range that is a part of the first write range and orders to write data to the second write range, an address management unit (106) configured to determine, before data is written into a nonvolatile memory, a new block for writing data to the first write range based on the first command, and a read/write control unit (103) configured to write data to the new block in response to the second command.

摘要翻译： 非易失性存储器件在访问设备以块大小的单位写入块中的所有数据时，防止数据写入中间向数据块写入数据时暂时减慢。 非易失性存储器件（100）包括存储器控制器（110），该存储器控制器（110）包括被配置为接收标识用于写入数据的第一写入范围的第一命令的接口单元（101），以及识别作为第 第一写入范围的一部分和将数据写入第二写入范围的命令，地址管理单元（106）被配置为在将数据写入非易失性存储器之前，基于 第一命令和读/写控制单元（103），被配置为响应于第二命令向新块写入数据。

公开(公告)号：US07843224B2

公开(公告)日：2010-11-30

申请号：US12262613

申请日：2008-10-31

申请人： Hiroshi Suenaga ,  Osamu Shibata ,  Yoshiyuki Saito ,  Toru Iwata ,  Masayuki Toyama ,  Kyoko Hirata

发明人： Hiroshi Suenaga ,  Osamu Shibata ,  Yoshiyuki Saito ,  Toru Iwata ,  Masayuki Toyama ,  Kyoko Hirata

IPC分类号： H03K19/094

CPC分类号： H04L25/028 ,  H04L25/0272

摘要： An object of the present invention is to realize reduction in an area of an output stage driver in an interface circuit that switches between two transmission systems. The interface circuit has two driver circuits and a drive control circuit that can switch between two driving systems that are a voltage driving system and a current driving system. The two driver circuits are connected to a power supply potential via the drive control circuit. Two input signals and inverted logic signals of the input signals are inputted via a selection circuit. According to a control signal inputted into the drive control circuit, the interface circuit switches between the voltage-driving type single-ended transmission system and current driving type differential transmission system.

摘要翻译： 本发明的目的是实现在两个传输系统之间切换的接口电路中的输出级驱动器的面积的减小。 接口电路具有两个驱动电路和驱动控制电路，该电路可以在作为电压驱动系统和电流驱动系统的两个驱动系统之间切换。 两个驱动电路通过驱动控制电路连接到电源电位。 通过选择电路输入输入信号的两个输入信号和反相逻辑信号。 根据输入到驱动控制电路的控制信号，接口电路在电压驱动型单端传输系统和电流驱动型差动传输系统之间切换。

公开(公告)号：US07818477B2

公开(公告)日：2010-10-19

申请号：US11909749

申请日：2006-03-24

申请人： Masayuki Toyama ,  Masahiro Nakanishi ,  Tomoaki Izumi ,  Tetsushi Kasahara ,  Kazuaki Tamura ,  Kiminori Matsuno ,  Manabu Inoue

发明人： Masayuki Toyama ,  Masahiro Nakanishi ,  Tomoaki Izumi ,  Tetsushi Kasahara ,  Kazuaki Tamura ,  Kiminori Matsuno ,  Manabu Inoue

IPC分类号： G06F3/00 ,  G06F13/00 ,  G06F1/00 ,  G06F11/00

CPC分类号： G06F3/0659 ,  G06F3/061 ,  G06F3/0656 ,  G06F3/0658 ,  G06F3/0676 ,  G06F11/1441

摘要： When a control unit (160) in a storage device (100) detects that a write end command or a data amount to be written has been transmitted from a host device (110), the control unit (160) saves control information required for writing data in a control information save memory (142). The control unit (160) also saves data which has not been written in storage medium into a buffer save memory (152) from a data buffer (151) and releases the busy state for the host device (110). The control unit (160) writes the saved data into a storage medium (120). Even if the power is turned OFF before completion of write, write can be performed into the storage medium (120) by using the saved data when the power is turned ON next time.

摘要翻译： 当存储装置（100）中的控制单元（160）检测到从主机（110）发送写入结束命令或写入数据量时，控制单元（160）保存写入所需的控制信息 控制信息中的数据保存存储器（142）。 控制单元（160）还将从存储介质中未被写入的数据从数据缓冲器（151）保存到缓冲存储器（152）中，并且释放主机设备（110）的忙状态。 控制单元（160）将保存的数据写入存储介质（120）。 即使在完成写入之前电源被关闭，当下一次接通电源时，也可以通过使用保存的数据来对存储介质（120）进行写入。

公开(公告)号：US20100169558A1

公开(公告)日：2010-07-01

申请号：US12665064

申请日：2008-07-30

申请人： Toshiyuki Honda ,  Masayuki Toyama ,  Masahiro Nakanishi

发明人： Toshiyuki Honda ,  Masayuki Toyama ,  Masahiro Nakanishi

IPC分类号： G06F12/00 ,  G06F15/177 ,  G06F12/02 ,  G06F12/10

CPC分类号： G06F9/4403 ,  G06F12/0246 ,  G06F2212/7201

摘要： A nonvolatile storage device includes a controller and a nonvolatile memory. The controller has: a logical-physical address conversion part for converting a logical address designated by a host device into a physical address; and a boot code address conversion part for converting boot code address information designated by the host device into a physical address. After the power-on and before the logical-physical address conversion part becomes usable, a boot code is read from a part of region which can be accessed by designating a logical address from the host device by designating the boot code address information from the outside. Thus, it is possible to rapidly start the nonvolatile memory system after the power-on. In the state where the logical-physical address conversion part can be used, data-reading and data-writing are carried out by designating a logical address from the host device.

摘要翻译： 非易失性存储装置包括控制器和非易失性存储器。 控制器具有：逻辑 - 物理地址转换部分，用于将由主机设备指定的逻辑地址转换成物理地址; 以及引导代码地址转换部分，用于将由主机设备指定的引导代码地址信息转换为物理地址。 在上电之后并且在逻辑 - 物理地址转换部分变得可用之前，通过从外部指定引导代码地址信息从主机设备指定逻辑地址可以访问的区域的一部分读取引导代码 。 因此，可以在通电之后快速启动非易失性存储器系统。 在可以使用逻辑 - 物理地址转换部分的状态下，通过从主机设备指定逻辑地址来执行数据读取和数据写入。

公开(公告)号：US20100023678A1

公开(公告)日：2010-01-28

申请号：US12523756

申请日：2008-01-25

申请人： Masahiro Nakanishi ,  Isao Kato ,  Masayuki Toyama ,  Tatsuya Adachi ,  Hirofumi Nakagaki ,  Takuji Maeda

发明人： Masahiro Nakanishi ,  Isao Kato ,  Masayuki Toyama ,  Tatsuya Adachi ,  Hirofumi Nakagaki ,  Takuji Maeda

IPC分类号： G06F12/00 ,  H01L35/00

CPC分类号： G06F1/206 ,  G11C7/04 ,  G11C16/102

摘要： When an access device accesses a nonvolatile memory device, the nonvolatile memory device or the access device detects or calculates a temperature T of the nonvolatile memory device. A temperature-adaptive control part of the nonvolatile memory device controls an access rate to a nonvolatile memory on the basis of the temperature T. Accordingly, the control part controls the rate so that the temperature T of the nonvolatile memory devices cannot exceed a limit temperature Trisk. In this manner, a nonvolatile memory system can eliminate a risk of a burn when ejecting the semiconductor memory device and can read and write data at a high speed.

摘要翻译： 当访问设备访问非易失性存储设备时，非易失性存储设备或访问设备检测或计算非易失性存储设备的温度T. 非易失性存储器件的温度自适应控制部分基于温度T控制对非易失性存储器的访问速率。因此，控制部分控制速率使得非易失性存储器件的温度T不能超过极限温度 Trisk。 以这种方式，非易失性存储器系统可以在喷射半导体存储器件时消除燃烧的危险，并且可以高速读取和写入数据。

公开(公告)号：US20090108872A1

公开(公告)日：2009-04-30

申请号：US12262613

申请日：2008-10-31

申请人： Hiroshi Suenaga ,  Osamu Shibata ,  Yoshiyuki Saito ,  Toru Iwata ,  Masayuki Toyama ,  Kyoko Hirata

发明人： Hiroshi Suenaga ,  Osamu Shibata ,  Yoshiyuki Saito ,  Toru Iwata ,  Masayuki Toyama ,  Kyoko Hirata

IPC分类号： H03K19/0175

CPC分类号： H04L25/028 ,  H04L25/0272

摘要： An object of the present invention is to realize reduction in an area of an output stage driver in an interface circuit that switches between two transmission systems. The interface circuit has two driver circuits and a drive control circuit that can switch between two driving systems that are a voltage driving system and a current driving system. The two driver circuits are connected to a power supply potential via the drive control circuit. Two input signals and inverted logic signals of the input signals are inputted via a selection circuit. According to a control signal inputted into the drive control circuit, the interface circuit switches between the voltage-driving type single-ended transmission system and current driving type differential transmission system.

摘要翻译： 本发明的目的是实现在两个传输系统之间切换的接口电路中的输出级驱动器的面积的减小。 接口电路具有两个驱动电路和驱动控制电路，该电路可以在作为电压驱动系统和电流驱动系统的两个驱动系统之间切换。 两个驱动电路通过驱动控制电路连接到电源电位。 通过选择电路输入输入信号的两个输入信号和反相逻辑信号。 根据输入到驱动控制电路的控制信号，接口电路在电压驱动型单端传输系统和电流驱动型差动传输系统之间切换。

公开(公告)号：US20080307152A1

公开(公告)日：2008-12-11

申请号：US11817532

申请日：2006-03-01

申请人： Masahiro Nakanishi ,  Tomoaki Izumi ,  Tetsushi Kasahara ,  Kazuaki Tamura ,  Kiminori Matsuno ,  Manabu Inoue ,  Masayuki Toyama ,  Kunihiro Maki

发明人： Masahiro Nakanishi ,  Tomoaki Izumi ,  Tetsushi Kasahara ,  Kazuaki Tamura ,  Kiminori Matsuno ,  Manabu Inoue ,  Masayuki Toyama ,  Kunihiro Maki

IPC分类号： G06F12/00

CPC分类号： G06F12/0638 ,  G06F11/1666 ,  G06F12/0246 ,  G06F2212/7201

摘要： In a storage having a nonvolatile RAM of destructive read type, the number of restorations attributed to data read from the nonvolatile RAM is decreased, and the overall life of the storage is prolonged. In a storage having a nonvolatile RAM of destructive read type and a volatile RAM and holding the same data in the nonvolatile and volatile RAMs, data is read out of the volatile RAM in reading and data is written in both volatile and nonvolatile RAMs in writing.

摘要翻译： 在具有破坏性读取类型的非易失性RAM的存储器中，归因于从非易失性RAM读取的数据的修复数量减少，并且存储器的总体寿命延长。 在具有破坏性读取类型的非易失性RAM和易失性RAM的存储器中，并且在非易失性和易失性RAM中保持相同的数据，在读取时从易失性RAM中读出数据，并将数据写入易失性和非易失性RAM两者中。

公开(公告)号：US20080281014A1

公开(公告)日：2008-11-13

申请号：US11662384

申请日：2005-09-09

申请人： Fumino Momose ,  Masayuki Toyama ,  Haruko Takahashi ,  Shinichi Maeda ,  Takashi Saitoh ,  Jun Nakauchi

发明人： Fumino Momose ,  Masayuki Toyama ,  Haruko Takahashi ,  Shinichi Maeda ,  Takashi Saitoh ,  Jun Nakauchi

IPC分类号： C08K3/04 ,  C08K5/09

CPC分类号： C09D7/70 ,  B29C39/006 ,  B29C39/26 ,  B29C39/42 ,  B82Y30/00 ,  C08K3/041 ,  C09D5/24 ,  C09D133/14 ,  C08L2666/04 ,  C08L33/14 ,  C08L33/20

摘要： A composition containing a nanosubstance is provided. Since the composition includes a nanosubstance (a), a (meth)acrylate compound (b) including a polar group, and a solvent (c)/polymerizable monomer (i-1), it is capable of being dispersed or solubilized in various solvents such as organic solvents, hydrous organic solvents and in polymerizable monomers without impairing characteristics of the nanosubstance itself wherein the nanosubstance neither separates out nor aggregates during a long-term storage, the composition being excellent in conductivity, film-forming property and moldability and capable of applying to or coating a substrate by a simple method. A coated film or cured film of a composite formed by the composition on at least one surface of the substrate shows high transparency, and the composite is excellent in water resistance, weatherability and hardness.

摘要翻译： 提供了包含纳米级的组合物。 由于组合物包括纳米级（a），包含极性基团的（甲基）丙烯酸酯化合物（b）和溶剂（c）/可聚合单体（i-1）），因此能够分散或溶解在各种溶剂中 例如有机溶剂，含水有机溶剂和可聚合单体，而不损害纳米级本身的特性，其中纳米物质在长期储存期间既不析出也不聚集，该组合物的导电性，成膜性和成型性优异，并且能够 通过简单的方法施加或涂覆基底。 通过该组合物在基材的至少一个表面上形成的复合物的涂膜或固化膜显示出高的透明度，并且该复合材料具有优异的耐水性，耐候性和硬度。